2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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2002-09-21 03:17:51 +04:00
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// $Id: stack32.cc,v 1.15 2002-09-20 23:17:51 kevinlawton Exp $
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2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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2001-04-10 06:20:02 +04:00
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// Copyright (C) 2001 MandrakeSoft S.A.
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2001-04-10 05:04:59 +04:00
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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2001-05-24 22:46:34 +04:00
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#define NEED_CPU_REG_SHORTCUTS 1
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2001-04-10 05:04:59 +04:00
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#include "bochs.h"
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merge in BRANCH-io-cleanup.
To see the commit logs for this use either cvsweb or
cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files.
In general this provides a generic interface for logging.
logfunctions:: is a class that is inherited by some classes, and also
. allocated as a standalone global called 'genlog'. All logging uses
. one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this
. class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros
. respectively.
.
. An example usage:
. BX_INFO(("Hello, World!\n"));
iofunctions:: is a class that is allocated once by default, and assigned
as the iofunction of each logfunctions instance. It is this class that
maintains the file descriptor and other output related code, at this
point using vfprintf(). At some future point, someone may choose to
write a gui 'console' for bochs to which messages would be redirected
simply by assigning a different iofunction class to the various logfunctions
objects.
More cleanup is coming, but this works for now. If you want to see alot
of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1.
Comments, bugs, flames, to me: todd@fries.net
2001-05-15 18:49:57 +04:00
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#define LOG_THIS BX_CPU_THIS_PTR
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2001-04-10 05:04:59 +04:00
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2001-05-23 12:16:07 +04:00
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#if BX_USE_CPU_SMF
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#define this (BX_CPU(0))
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#endif
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2001-04-10 05:04:59 +04:00
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2002-09-15 05:00:20 +04:00
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#if BX_SUPPORT_X86_64==0
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// Make life easier for merging 64&32-bit code.
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#define RBP EBP
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#endif
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2001-04-10 05:04:59 +04:00
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::POP_Ed(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit32u val32;
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pop_32(&val32);
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2002-09-20 07:52:59 +04:00
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if (i->modC0()) {
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2002-09-18 02:50:53 +04:00
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BX_WRITE_32BIT_REGZ(i->rm(), val32);
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2001-04-10 05:04:59 +04:00
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}
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else {
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// Note: there is one little weirdism here. When 32bit addressing
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// is used, it is possible to use ESP in the modrm addressing.
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// If used, the value of ESP after the pop is used to calculate
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// the address.
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2002-09-20 07:52:59 +04:00
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if (i->as32L() && (!i->modC0()) && (i->rm()==4) && (i->sibBase()==4)) {
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2001-05-23 12:16:07 +04:00
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// call method on BX_CPU_C object
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BX_CPU_CALL_METHOD (i->ResolveModrm, (i));
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2001-04-10 05:04:59 +04:00
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}
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2002-09-18 09:36:48 +04:00
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write_virtual_dword(i->seg(), RMAddr(i), &val32);
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2001-04-10 05:04:59 +04:00
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}
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::PUSH_ERX(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-21 03:17:51 +04:00
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push_32(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx);
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2001-04-10 05:04:59 +04:00
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::POP_ERX(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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Bit32u erx;
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pop_32(&erx);
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2002-09-21 03:17:51 +04:00
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BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx = erx;
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2001-04-10 05:04:59 +04:00
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::PUSH_CS(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L())
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2001-04-10 05:04:59 +04:00
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::PUSH_DS(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L())
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2001-04-10 05:04:59 +04:00
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::PUSH_ES(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L())
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2001-04-10 05:04:59 +04:00
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::PUSH_FS(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L())
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2001-04-10 05:04:59 +04:00
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::PUSH_GS(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L())
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2001-04-10 05:04:59 +04:00
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::PUSH_SS(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L())
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2001-04-10 05:04:59 +04:00
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::POP_DS(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L()) {
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2001-04-10 05:04:59 +04:00
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Bit32u ds;
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pop_32(&ds);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], (Bit16u) ds);
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}
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else {
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Bit16u ds;
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pop_16(&ds);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
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}
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::POP_ES(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L()) {
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2001-04-10 05:04:59 +04:00
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Bit32u es;
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pop_32(&es);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], (Bit16u) es);
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}
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else {
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Bit16u es;
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pop_16(&es);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es);
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}
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::POP_FS(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L()) {
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2001-04-10 05:04:59 +04:00
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Bit32u fs;
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pop_32(&fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], (Bit16u) fs);
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}
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else {
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Bit16u fs;
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pop_16(&fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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}
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::POP_GS(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L()) {
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2001-04-10 05:04:59 +04:00
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Bit32u gs;
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pop_32(&gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], (Bit16u) gs);
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}
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else {
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Bit16u gs;
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pop_16(&gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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}
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::POP_SS(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2002-09-18 09:36:48 +04:00
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if (i->os32L()) {
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2001-04-10 05:04:59 +04:00
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Bit32u ss;
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pop_32(&ss);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], (Bit16u) ss);
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}
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else {
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Bit16u ss;
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pop_16(&ss);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);
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}
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// POP SS inhibits interrupts, debug exceptions and single-step
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// trap exceptions until the execution boundary following the
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// next instruction is reached.
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// Same code as MOV_SwEw()
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BX_CPU_THIS_PTR inhibit_mask |=
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BX_INHIBIT_INTERRUPTS | BX_INHIBIT_DEBUG;
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BX_CPU_THIS_PTR async_event = 1;
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::PUSHAD32(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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#if BX_CPU_LEVEL < 2
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2001-05-30 22:56:02 +04:00
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BX_PANIC(("PUSHAD: not supported on an 8086"));
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2001-04-10 05:04:59 +04:00
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#else
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Bit32u temp_ESP;
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Bit32u esp;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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temp_ESP = ESP;
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else
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temp_ESP = SP;
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if (protected_mode()) {
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if ( !can_push(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache, temp_ESP, 32) ) {
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2001-05-30 22:56:02 +04:00
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BX_PANIC(("PUSHAD(): stack doesn't have enough room!"));
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2001-04-10 05:04:59 +04:00
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exception(BX_SS_EXCEPTION, 0, 0);
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return;
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}
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}
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else {
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if (temp_ESP < 32)
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2001-05-30 22:56:02 +04:00
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BX_PANIC(("pushad: eSP < 32"));
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2001-04-10 05:04:59 +04:00
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}
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esp = ESP;
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/* ??? optimize this by using virtual write, all checks passed */
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push_32(EAX);
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push_32(ECX);
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push_32(EDX);
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push_32(EBX);
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push_32(esp);
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push_32(EBP);
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push_32(ESI);
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push_32(EDI);
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#endif
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::POPAD32(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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#if BX_CPU_LEVEL < 2
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2001-05-30 22:56:02 +04:00
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BX_PANIC(("POPAD not supported on an 8086"));
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2001-04-10 05:04:59 +04:00
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#else /* 286+ */
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Bit32u edi, esi, ebp, etmp, ebx, edx, ecx, eax;
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if (protected_mode()) {
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if ( !can_pop(32) ) {
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2001-05-30 22:56:02 +04:00
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BX_PANIC(("pop_ad: not enough bytes on stack"));
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2001-04-10 05:04:59 +04:00
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exception(BX_SS_EXCEPTION, 0, 0);
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return;
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}
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}
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/* ??? optimize this */
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pop_32(&edi);
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pop_32(&esi);
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pop_32(&ebp);
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pop_32(&etmp); /* value for ESP discarded */
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pop_32(&ebx);
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pop_32(&edx);
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pop_32(&ecx);
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pop_32(&eax);
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EDI = edi;
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ESI = esi;
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EBP = ebp;
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EBX = ebx;
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EDX = edx;
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ECX = ecx;
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EAX = eax;
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|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::PUSH_Id(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
#if BX_CPU_LEVEL < 2
|
2001-05-30 22:56:02 +04:00
|
|
|
BX_PANIC(("PUSH_Iv: not supported on 8086!"));
|
2001-04-10 05:04:59 +04:00
|
|
|
#else
|
|
|
|
|
|
|
|
Bit32u imm32;
|
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
imm32 = i->Id();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
push_32(imm32);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::PUSH_Ed(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
Bit32u op1_32;
|
|
|
|
|
|
|
|
/* op1_32 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 02:50:53 +04:00
|
|
|
op1_32 = BX_READ_32BIT_REG(i->rm());
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
push_32(op1_32);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::ENTER_IwIb(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
#if BX_CPU_LEVEL < 2
|
2001-05-30 22:56:02 +04:00
|
|
|
BX_PANIC(("ENTER_IwIb: not supported by 8086!"));
|
2001-04-10 05:04:59 +04:00
|
|
|
#else
|
|
|
|
Bit32u frame_ptr32;
|
|
|
|
Bit16u frame_ptr16;
|
|
|
|
Bit8u level;
|
2002-03-05 18:50:17 +03:00
|
|
|
static Bit8u first_time = 1;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
level = i->Ib2();
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
|
|
|
level %= 32;
|
|
|
|
/* ??? */
|
2002-03-05 18:50:17 +03:00
|
|
|
if (first_time && level>0) {
|
|
|
|
BX_ERROR(("enter() with level > 0. The emulation of this instruction may not be complete. This warning will be printed only once per bochs run."));
|
|
|
|
first_time = 0;
|
|
|
|
}
|
2002-09-18 09:36:48 +04:00
|
|
|
//if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b && i->os32L()==0) {
|
2001-05-30 22:56:02 +04:00
|
|
|
// BX_INFO(("enter(): stacksize!=opsize: I'm unsure of the code for this"));
|
|
|
|
// BX_PANIC((" The Intel manuals are a mess on this one!"));
|
2001-04-10 05:04:59 +04:00
|
|
|
// }
|
|
|
|
|
|
|
|
if ( protected_mode() ) {
|
|
|
|
Bit32u bytes_to_push, temp_ESP;
|
|
|
|
|
|
|
|
if (level == 0) {
|
2002-09-18 09:36:48 +04:00
|
|
|
if (i->os32L())
|
2002-09-18 02:50:53 +04:00
|
|
|
bytes_to_push = 4 + i->Iw();
|
2001-04-10 05:04:59 +04:00
|
|
|
else
|
2002-09-18 02:50:53 +04:00
|
|
|
bytes_to_push = 2 + i->Iw();
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else { /* level > 0 */
|
2002-09-18 09:36:48 +04:00
|
|
|
if (i->os32L())
|
2002-09-18 02:50:53 +04:00
|
|
|
bytes_to_push = 4 + (level-1)*4 + 4 + i->Iw();
|
2001-04-10 05:04:59 +04:00
|
|
|
else
|
2002-09-18 02:50:53 +04:00
|
|
|
bytes_to_push = 2 + (level-1)*2 + 2 + i->Iw();
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
|
|
|
|
temp_ESP = ESP;
|
|
|
|
else
|
|
|
|
temp_ESP = SP;
|
|
|
|
if ( !can_push(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache, temp_ESP, bytes_to_push) ) {
|
2001-05-30 22:56:02 +04:00
|
|
|
BX_PANIC(("ENTER: not enough room on stack!"));
|
2001-04-10 05:04:59 +04:00
|
|
|
exception(BX_SS_EXCEPTION, 0, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2002-09-18 09:36:48 +04:00
|
|
|
if (i->os32L())
|
2001-04-10 05:04:59 +04:00
|
|
|
push_32(EBP);
|
|
|
|
else
|
|
|
|
push_16(BP);
|
|
|
|
|
|
|
|
// can just do frame_ptr32 = ESP for either case ???
|
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
|
|
|
|
frame_ptr32 = ESP;
|
|
|
|
else
|
|
|
|
frame_ptr32 = SP;
|
|
|
|
|
|
|
|
if (level > 0) {
|
|
|
|
/* do level-1 times */
|
|
|
|
while (--level) {
|
2002-09-18 09:36:48 +04:00
|
|
|
if (i->os32L()) {
|
2001-04-10 05:04:59 +04:00
|
|
|
Bit32u temp32;
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
|
|
|
|
EBP -= 4;
|
|
|
|
read_virtual_dword(BX_SEG_REG_SS, EBP, &temp32);
|
|
|
|
ESP -= 4;
|
|
|
|
write_virtual_dword(BX_SEG_REG_SS, ESP, &temp32);
|
|
|
|
}
|
|
|
|
else { /* 16bit stacksize */
|
|
|
|
BP -= 4;
|
|
|
|
read_virtual_dword(BX_SEG_REG_SS, BP, &temp32);
|
|
|
|
SP -= 4;
|
|
|
|
write_virtual_dword(BX_SEG_REG_SS, SP, &temp32);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else { /* 16bit opsize */
|
|
|
|
Bit16u temp16;
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
|
|
|
|
EBP -= 2;
|
|
|
|
read_virtual_word(BX_SEG_REG_SS, EBP, &temp16);
|
|
|
|
ESP -= 2;
|
|
|
|
write_virtual_word(BX_SEG_REG_SS, ESP, &temp16);
|
|
|
|
}
|
|
|
|
else { /* 16bit stacksize */
|
|
|
|
BP -= 2;
|
|
|
|
read_virtual_word(BX_SEG_REG_SS, BP, &temp16);
|
|
|
|
SP -= 2;
|
|
|
|
write_virtual_word(BX_SEG_REG_SS, SP, &temp16);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} /* while (--level) */
|
|
|
|
|
|
|
|
/* push(frame pointer) */
|
2002-09-18 09:36:48 +04:00
|
|
|
if (i->os32L()) {
|
2001-04-10 05:04:59 +04:00
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
|
|
|
|
ESP -= 4;
|
|
|
|
write_virtual_dword(BX_SEG_REG_SS, ESP, &frame_ptr32);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
SP -= 4;
|
|
|
|
write_virtual_dword(BX_SEG_REG_SS, SP, &frame_ptr32);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else { /* 16bit opsize */
|
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
|
|
|
|
frame_ptr16 = frame_ptr32;
|
|
|
|
ESP -= 2;
|
|
|
|
write_virtual_word(BX_SEG_REG_SS, ESP, &frame_ptr16);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
frame_ptr16 = frame_ptr32;
|
|
|
|
SP -= 2;
|
|
|
|
write_virtual_word(BX_SEG_REG_SS, SP, &frame_ptr16);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} /* if (level > 0) ... */
|
|
|
|
|
2002-09-18 09:36:48 +04:00
|
|
|
if (i->os32L())
|
2002-09-15 05:00:20 +04:00
|
|
|
RBP = frame_ptr32;
|
2001-04-10 05:04:59 +04:00
|
|
|
else
|
|
|
|
BP = frame_ptr32;
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
|
2002-09-18 02:50:53 +04:00
|
|
|
ESP = ESP - i->Iw();
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else { /* 16bit stack */
|
2002-09-18 02:50:53 +04:00
|
|
|
SP = SP - i->Iw();
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::LEAVE(bxInstruction_c *i)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
|
|
|
#if BX_CPU_LEVEL < 2
|
2001-05-30 22:56:02 +04:00
|
|
|
BX_PANIC(("LEAVE: not supported by 8086!"));
|
2001-04-10 05:04:59 +04:00
|
|
|
#else
|
|
|
|
Bit32u temp_EBP;
|
|
|
|
|
|
|
|
|
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
|
|
|
#if BX_CPU_LEVEL >= 3
|
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
|
|
|
|
temp_EBP = EBP;
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
temp_EBP = BP;
|
|
|
|
|
|
|
|
if ( protected_mode() ) {
|
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.c_ed) { /* expand up */
|
|
|
|
if (temp_EBP <= BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled) {
|
2001-05-30 22:56:02 +04:00
|
|
|
BX_PANIC(("LEAVE: BP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].limit"));
|
2001-04-10 05:04:59 +04:00
|
|
|
exception(BX_SS_EXCEPTION, 0, 0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else { /* normal */
|
|
|
|
if (temp_EBP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled) {
|
2001-05-30 22:56:02 +04:00
|
|
|
BX_PANIC(("LEAVE: BP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].limit"));
|
2001-04-10 05:04:59 +04:00
|
|
|
exception(BX_SS_EXCEPTION, 0, 0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// delete frame
|
|
|
|
#if BX_CPU_LEVEL >= 3
|
|
|
|
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
|
|
|
|
ESP = EBP;
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
SP = BP;
|
|
|
|
|
|
|
|
// restore frame pointer
|
|
|
|
#if BX_CPU_LEVEL >= 3
|
2002-09-18 09:36:48 +04:00
|
|
|
if (i->os32L()) {
|
2001-04-10 05:04:59 +04:00
|
|
|
Bit32u temp32;
|
|
|
|
|
|
|
|
pop_32(&temp32);
|
2002-09-15 05:00:20 +04:00
|
|
|
RBP = temp32;
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
{
|
|
|
|
Bit16u temp16;
|
|
|
|
|
|
|
|
pop_16(&temp16);
|
|
|
|
BP = temp16;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|