2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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2009-02-08 12:05:52 +03:00
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// $Id: pit82c54.cc,v 1.36 2009-02-08 09:05:52 vruppert Exp $
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2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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2009-02-08 12:05:52 +03:00
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//
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// Copyright (C) 2001 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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2008-02-16 01:05:43 +03:00
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2001-05-25 01:44:14 +04:00
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/*
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2001-05-25 17:11:52 +04:00
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* Emulator of an Intel 8254/82C54 Programmable Interval Timer.
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* Greg Alexander <yakovlev@usa.com>
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2001-05-25 01:44:14 +04:00
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*
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2008-01-27 01:24:03 +03:00
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*
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2001-05-25 17:11:52 +04:00
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* Things I am unclear on (greg):
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* 1.)What happens if both the status and count registers are latched,
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2001-05-25 01:44:14 +04:00
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* but the first of the two count registers has already been read?
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2008-01-27 01:24:03 +03:00
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* I.E.:
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2001-05-25 01:44:14 +04:00
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* latch count 0 (16-bit)
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* Read count 0 (read LSByte)
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* READ_BACK status of count 0
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* Read count 0 - do you get MSByte or status?
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* This will be flagged as an error.
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2001-05-25 17:11:52 +04:00
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* 2.)What happens when we latch the output in the middle of a 2-part
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2001-05-25 01:44:14 +04:00
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* unlatched read?
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2001-05-25 17:11:52 +04:00
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* 3.)I assumed that programming a counter removes a latched status.
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* 4.)I implemented the 8254 description of mode 0, not the 82C54 one.
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* 5.)clock() calls represent a rising clock edge followed by a falling
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2001-05-25 01:44:14 +04:00
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* clock edge.
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2008-01-27 01:24:03 +03:00
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* 6.)What happens when we trigger mode 1 in the middle of a 2-part
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2001-05-25 01:44:14 +04:00
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* write?
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*/
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2009-01-11 21:46:01 +03:00
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// Define BX_PLUGGABLE in files that can be compiled into plugins. For
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// platforms that require a special tag on exported symbols, BX_PLUGGABLE
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// is used to know when we are exporting symbols and when we are importing.
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#define BX_PLUGGABLE
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2004-06-19 19:20:15 +04:00
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#include "iodev.h"
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2001-06-11 07:11:40 +04:00
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#include "pit82c54.h"
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2001-05-25 02:20:41 +04:00
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#define LOG_THIS this->
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2001-09-24 06:14:05 +04:00
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2007-04-04 02:38:49 +04:00
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void pit_82C54::print_counter(counter_type &thisctr)
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{
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2001-08-18 07:28:23 +04:00
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BX_INFO(("Printing Counter"));
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2002-02-21 22:22:42 +03:00
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BX_INFO(("count: %d",thisctr.count));
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2001-08-18 07:28:23 +04:00
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BX_INFO(("count_binary: %x",thisctr.count_binary));
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2002-02-21 22:22:42 +03:00
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BX_INFO(("counter gate: %x",thisctr.GATE));
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BX_INFO(("counter OUT: %x",thisctr.OUTpin));
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BX_INFO(("next_change_time: %d",thisctr.next_change_time));
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2001-08-18 07:28:23 +04:00
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BX_INFO(("End Counter Printout"));
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}
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2007-04-04 02:38:49 +04:00
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void pit_82C54::print_cnum(Bit8u cnum)
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{
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2008-02-16 01:05:43 +03:00
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if (cnum>MAX_COUNTER) {
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2002-02-21 22:22:42 +03:00
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BX_ERROR(("Bad counter index to print_cnum"));
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} else {
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print_counter(counter[cnum]);
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}
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}
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2007-04-04 02:38:49 +04:00
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void pit_82C54::latch_counter(counter_type &thisctr)
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{
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2008-02-16 01:05:43 +03:00
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if (thisctr.count_LSB_latched || thisctr.count_MSB_latched) {
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2001-05-25 01:44:14 +04:00
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//Do nothing because previous latch has not been read.;
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} else {
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switch(thisctr.read_state) {
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case MSByte:
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2008-02-16 01:05:43 +03:00
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thisctr.outlatch=thisctr.count & 0xFFFF;
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thisctr.count_MSB_latched=1;
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break;
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2001-05-25 01:44:14 +04:00
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case LSByte:
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2008-02-16 01:05:43 +03:00
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thisctr.outlatch=thisctr.count & 0xFFFF;
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thisctr.count_LSB_latched=1;
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break;
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2001-05-25 01:44:14 +04:00
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case LSByte_multiple:
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2008-02-16 01:05:43 +03:00
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thisctr.outlatch=thisctr.count & 0xFFFF;
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thisctr.count_LSB_latched=1;
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thisctr.count_MSB_latched=1;
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break;
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2001-05-25 01:44:14 +04:00
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case MSByte_multiple:
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2008-02-16 01:05:43 +03:00
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if (!(seen_problems & UNL_2P_READ)) {
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// seen_problems|=UNL_2P_READ;
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BX_ERROR(("Unknown behavior when latching during 2-part read."));
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BX_ERROR((" This message will not be repeated."));
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}
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//I guess latching and resetting to LSB first makes sense;
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BX_DEBUG(("Setting read_state to LSB_mult"));
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thisctr.read_state=LSByte_multiple;
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thisctr.outlatch=thisctr.count & 0xFFFF;
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thisctr.count_LSB_latched=1;
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thisctr.count_MSB_latched=1;
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break;
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2001-05-25 01:44:14 +04:00
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default:
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2008-02-16 01:05:43 +03:00
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BX_ERROR(("Unknown read mode found during latch command."));
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break;
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2001-05-25 01:44:14 +04:00
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}
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}
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2007-04-04 02:38:49 +04:00
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}
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2001-05-25 01:44:14 +04:00
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2009-02-08 00:05:31 +03:00
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void pit_82C54::set_OUT(counter_type &thisctr, bx_bool data)
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2007-04-04 02:38:49 +04:00
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{
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2006-01-08 23:39:08 +03:00
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if (thisctr.OUTpin != data) {
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thisctr.OUTpin = data;
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if (thisctr.out_handler != NULL) {
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thisctr.out_handler(data);
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}
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2001-05-25 01:44:14 +04:00
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}
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2006-01-08 23:39:08 +03:00
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}
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2001-05-25 01:44:14 +04:00
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2007-04-04 02:38:49 +04:00
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void BX_CPP_AttrRegparmN(2)
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pit_82C54::set_count (counter_type &thisctr, Bit32u data)
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{
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2006-01-08 23:39:08 +03:00
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thisctr.count=data & 0xFFFF;
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set_binary_to_count(thisctr);
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}
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2001-06-13 03:55:53 +04:00
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2007-04-04 02:38:49 +04:00
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void BX_CPP_AttrRegparmN(1)
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pit_82C54::set_count_to_binary(counter_type &thisctr)
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{
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2008-02-16 01:05:43 +03:00
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if (thisctr.bcd_mode) {
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2006-01-08 23:39:08 +03:00
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thisctr.count=
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(((thisctr.count_binary/1)%10)<<0) |
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(((thisctr.count_binary/10)%10)<<4) |
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(((thisctr.count_binary/100)%10)<<8) |
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(((thisctr.count_binary/1000)%10)<<12);
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} else {
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thisctr.count=thisctr.count_binary;
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2001-06-13 03:55:53 +04:00
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}
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2006-01-08 23:39:08 +03:00
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}
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2001-06-13 03:55:53 +04:00
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2007-04-04 02:38:49 +04:00
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void BX_CPP_AttrRegparmN(1)
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pit_82C54::set_binary_to_count(counter_type &thisctr)
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{
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2008-02-16 01:05:43 +03:00
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if (thisctr.bcd_mode) {
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2006-01-08 23:39:08 +03:00
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thisctr.count_binary=
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(1*((thisctr.count>>0)&0xF)) +
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(10*((thisctr.count>>4)&0xF)) +
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(100*((thisctr.count>>8)&0xF)) +
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(1000*((thisctr.count>>12)&0xF));
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} else {
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thisctr.count_binary=thisctr.count;
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2001-06-13 03:55:53 +04:00
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}
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2006-01-08 23:39:08 +03:00
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}
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2001-06-13 03:55:53 +04:00
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2007-04-04 02:38:49 +04:00
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void BX_CPP_AttrRegparmN(1)
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pit_82C54::decrement (counter_type &thisctr)
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{
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2008-02-16 01:05:43 +03:00
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if (!thisctr.count) {
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if (thisctr.bcd_mode) {
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2006-01-08 23:39:08 +03:00
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thisctr.count=0x9999;
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thisctr.count_binary=9999;
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2001-06-13 03:55:53 +04:00
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} else {
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2006-01-08 23:39:08 +03:00
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thisctr.count=0xFFFF;
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thisctr.count_binary=0xFFFF;
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2001-05-25 01:44:14 +04:00
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}
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2006-01-08 23:39:08 +03:00
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} else {
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thisctr.count_binary--;
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set_count_to_binary(thisctr);
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2001-05-25 01:44:14 +04:00
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}
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2006-01-08 23:39:08 +03:00
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}
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2001-05-25 01:44:14 +04:00
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2007-04-04 02:38:49 +04:00
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void pit_82C54::init(void)
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{
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2006-01-08 23:39:08 +03:00
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put("PIT81");
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2001-09-05 18:41:55 +04:00
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2007-04-04 02:38:49 +04:00
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for(int i=0;i<3;i++) {
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2006-01-08 23:39:08 +03:00
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BX_DEBUG(("Setting read_state to LSB"));
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counter[i].read_state=LSByte;
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counter[i].write_state=LSByte;
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counter[i].GATE=1;
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counter[i].OUTpin=1;
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counter[i].triggerGATE=0;
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counter[i].mode=4;
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counter[i].first_pass=0;
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counter[i].bcd_mode=0;
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counter[i].count=0;
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counter[i].count_binary=0;
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counter[i].state_bit_1=0;
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counter[i].state_bit_2=0;
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counter[i].null_count=0;
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counter[i].rw_mode=1;
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counter[i].count_written=1;
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counter[i].count_LSB_latched=0;
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counter[i].count_MSB_latched=0;
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counter[i].status_latched=0;
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counter[i].next_change_time=0;
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counter[i].out_handler=NULL;
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2001-05-25 01:44:14 +04:00
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}
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2006-01-08 23:39:08 +03:00
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seen_problems=0;
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}
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2001-06-11 04:16:24 +04:00
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2006-05-27 19:54:49 +04:00
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pit_82C54::pit_82C54(void)
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{
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2006-01-08 23:39:08 +03:00
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init();
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}
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2001-05-25 01:44:14 +04:00
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2007-09-28 23:52:08 +04:00
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void pit_82C54::reset(unsigned type) {}
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2002-08-27 23:54:46 +04:00
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2006-05-27 19:54:49 +04:00
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void pit_82C54::register_state(bx_param_c *parent)
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{
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char name[4];
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2007-04-04 02:38:49 +04:00
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for (unsigned i=0; i<3; i++) {
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2006-05-27 19:54:49 +04:00
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sprintf(name, "%d", i);
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2007-04-04 02:38:49 +04:00
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bx_list_c *tim = new bx_list_c(parent, name, 22);
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2006-05-27 19:54:49 +04:00
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new bx_shadow_bool_c(tim, "GATE", &counter[i].GATE);
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new bx_shadow_bool_c(tim, "OUTpin", &counter[i].OUTpin);
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new bx_shadow_num_c(tim, "count", &counter[i].count);
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new bx_shadow_num_c(tim, "outlatch", &counter[i].outlatch);
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new bx_shadow_num_c(tim, "inlatch", &counter[i].inlatch);
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new bx_shadow_num_c(tim, "status_latch", &counter[i].status_latch);
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new bx_shadow_num_c(tim, "rw_mode", &counter[i].rw_mode);
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new bx_shadow_num_c(tim, "mode", &counter[i].mode);
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new bx_shadow_bool_c(tim, "bcd_mode", &counter[i].bcd_mode);
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new bx_shadow_bool_c(tim, "null_count", &counter[i].null_count);
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new bx_shadow_bool_c(tim, "count_LSB_latched", &counter[i].count_LSB_latched);
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new bx_shadow_bool_c(tim, "count_MSB_latched", &counter[i].count_MSB_latched);
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new bx_shadow_bool_c(tim, "status_latched", &counter[i].status_latched);
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new bx_shadow_num_c(tim, "count_binary", &counter[i].count_binary);
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new bx_shadow_bool_c(tim, "triggerGATE", &counter[i].triggerGATE);
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new bx_shadow_num_c(tim, "write_state", (Bit8u*)&counter[i].write_state);
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new bx_shadow_num_c(tim, "read_state", (Bit8u*)&counter[i].read_state);
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new bx_shadow_bool_c(tim, "count_written", &counter[i].count_written);
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new bx_shadow_bool_c(tim, "first_pass", &counter[i].first_pass);
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new bx_shadow_bool_c(tim, "state_bit_1", &counter[i].state_bit_1);
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new bx_shadow_bool_c(tim, "state_bit_2", &counter[i].state_bit_2);
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new bx_shadow_num_c(tim, "next_change_time", &counter[i].next_change_time);
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}
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}
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2003-03-03 02:59:12 +03:00
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void BX_CPP_AttrRegparmN(2)
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2007-04-04 02:38:49 +04:00
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pit_82C54::decrement_multiple(counter_type &thisctr, Bit32u cycles)
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{
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2001-06-28 02:25:24 +04:00
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while(cycles>0) {
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2008-02-16 01:05:43 +03:00
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if (cycles<=thisctr.count_binary) {
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2001-06-28 02:25:24 +04:00
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thisctr.count_binary-=cycles;
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cycles-=cycles;
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set_count_to_binary(thisctr);
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} else {
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cycles-=(thisctr.count_binary+1);
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thisctr.count_binary-=thisctr.count_binary;
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set_count_to_binary(thisctr);
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decrement(thisctr);
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}
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}
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}
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2007-04-04 02:38:49 +04:00
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void pit_82C54::clock_multiple(Bit8u cnum, Bit32u cycles)
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{
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2008-02-16 01:05:43 +03:00
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if (cnum>MAX_COUNTER) {
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2001-06-28 02:25:24 +04:00
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BX_ERROR(("Counter number too high in clock"));
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} else {
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2007-04-04 02:38:49 +04:00
|
|
|
counter_type &thisctr = counter[cnum];
|
2001-06-28 02:25:24 +04:00
|
|
|
while(cycles>0) {
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.next_change_time==0) {
|
|
|
|
if (thisctr.count_written) {
|
|
|
|
switch(thisctr.mode) {
|
|
|
|
case 0:
|
|
|
|
if (thisctr.GATE && (thisctr.write_state!=MSByte_multiple)) {
|
|
|
|
decrement_multiple(thisctr, cycles);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
decrement_multiple(thisctr, cycles);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
if (!thisctr.first_pass && thisctr.GATE) {
|
|
|
|
decrement_multiple(thisctr, cycles);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
if (!thisctr.first_pass && thisctr.GATE) {
|
|
|
|
decrement_multiple(thisctr, 2*cycles);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
if (thisctr.GATE) {
|
|
|
|
decrement_multiple(thisctr, cycles);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
decrement_multiple(thisctr, cycles);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
cycles-=cycles;
|
2001-06-28 02:25:24 +04:00
|
|
|
} else {
|
2008-02-16 01:05:43 +03:00
|
|
|
switch(thisctr.mode) {
|
|
|
|
case 0:
|
|
|
|
case 1:
|
|
|
|
case 2:
|
|
|
|
case 4:
|
|
|
|
case 5:
|
|
|
|
if (thisctr.next_change_time > cycles) {
|
|
|
|
decrement_multiple(thisctr,cycles);
|
|
|
|
thisctr.next_change_time-=cycles;
|
|
|
|
cycles-=cycles;
|
|
|
|
} else {
|
|
|
|
decrement_multiple(thisctr,(thisctr.next_change_time-1));
|
|
|
|
cycles-=thisctr.next_change_time;
|
|
|
|
clock(cnum);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
if (thisctr.next_change_time > cycles) {
|
|
|
|
decrement_multiple(thisctr,cycles*2);
|
|
|
|
thisctr.next_change_time-=cycles;
|
|
|
|
cycles-=cycles;
|
|
|
|
} else {
|
|
|
|
decrement_multiple(thisctr,(thisctr.next_change_time-1)*2);
|
|
|
|
cycles-=thisctr.next_change_time;
|
|
|
|
clock(cnum);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
cycles-=cycles;
|
|
|
|
break;
|
|
|
|
}
|
2001-06-28 02:25:24 +04:00
|
|
|
}
|
|
|
|
}
|
2002-02-21 22:22:42 +03:00
|
|
|
#if 0
|
2001-08-18 07:28:23 +04:00
|
|
|
print_counter(thisctr);
|
2002-02-21 22:22:42 +03:00
|
|
|
#endif
|
2001-06-28 02:25:24 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
void BX_CPP_AttrRegparmN(1)
|
|
|
|
pit_82C54::clock(Bit8u cnum)
|
|
|
|
{
|
2008-02-16 01:05:43 +03:00
|
|
|
if (cnum>MAX_COUNTER) {
|
2001-06-11 04:16:24 +04:00
|
|
|
BX_ERROR(("Counter number too high in clock"));
|
2001-05-25 01:44:14 +04:00
|
|
|
} else {
|
2007-04-04 02:38:49 +04:00
|
|
|
counter_type &thisctr = counter[cnum];
|
2001-05-25 01:44:14 +04:00
|
|
|
switch(thisctr.mode) {
|
|
|
|
case 0:
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.count_written) {
|
|
|
|
if (thisctr.null_count) {
|
|
|
|
set_count(thisctr, thisctr.inlatch);
|
|
|
|
if (thisctr.GATE) {
|
|
|
|
if (thisctr.count_binary==0) {
|
|
|
|
thisctr.next_change_time=1;
|
2002-02-21 23:56:18 +03:00
|
|
|
} else {
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
thisctr.null_count=0;
|
|
|
|
} else {
|
|
|
|
if (thisctr.GATE && (thisctr.write_state!=MSByte_multiple)) {
|
|
|
|
decrement(thisctr);
|
|
|
|
if (!thisctr.OUTpin) {
|
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
if (!thisctr.count) {
|
|
|
|
set_OUT(thisctr,1);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0; //if the clock isn't moving.
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0; //default to 0.
|
|
|
|
}
|
|
|
|
thisctr.triggerGATE=0;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 1:
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.count_written) {
|
|
|
|
if (thisctr.triggerGATE) {
|
|
|
|
set_count(thisctr, thisctr.inlatch);
|
|
|
|
if (thisctr.count_binary==0) {
|
2002-02-21 23:56:18 +03:00
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.null_count=0;
|
|
|
|
set_OUT(thisctr,0);
|
|
|
|
if (thisctr.write_state==MSByte_multiple) {
|
|
|
|
BX_ERROR(("Undefined behavior when loading a half loaded count."));
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
decrement(thisctr);
|
|
|
|
if (!thisctr.OUTpin) {
|
|
|
|
if (thisctr.count_binary==0) {
|
|
|
|
thisctr.next_change_time=1;
|
2002-02-21 23:56:18 +03:00
|
|
|
} else {
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
}
|
|
|
|
if (thisctr.count==0) {
|
|
|
|
set_OUT(thisctr,1);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0; //default to 0.
|
|
|
|
}
|
|
|
|
thisctr.triggerGATE=0;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 2:
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.count_written) {
|
|
|
|
if (thisctr.triggerGATE || thisctr.first_pass) {
|
|
|
|
set_count(thisctr, thisctr.inlatch);
|
|
|
|
thisctr.next_change_time=(thisctr.count_binary-1) & 0xFFFF;
|
|
|
|
thisctr.null_count=0;
|
|
|
|
if (thisctr.inlatch==1) {
|
|
|
|
BX_ERROR(("ERROR: count of 1 is invalid in pit mode 2."));
|
|
|
|
}
|
|
|
|
if (!thisctr.OUTpin) {
|
|
|
|
set_OUT(thisctr,1);
|
|
|
|
}
|
|
|
|
if (thisctr.write_state==MSByte_multiple) {
|
|
|
|
BX_ERROR(("Undefined behavior when loading a half loaded count."));
|
|
|
|
}
|
|
|
|
thisctr.first_pass=0;
|
|
|
|
} else {
|
|
|
|
if (thisctr.GATE) {
|
|
|
|
decrement(thisctr);
|
|
|
|
thisctr.next_change_time=(thisctr.count_binary-1) & 0xFFFF;
|
|
|
|
if (thisctr.count==1) {
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
set_OUT(thisctr,0);
|
|
|
|
thisctr.first_pass=1;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
thisctr.triggerGATE=0;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 3:
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.count_written) {
|
|
|
|
if ((thisctr.triggerGATE || thisctr.first_pass
|
|
|
|
|| thisctr.state_bit_2) && thisctr.GATE) {
|
|
|
|
set_count(thisctr, thisctr.inlatch & 0xFFFE);
|
|
|
|
thisctr.state_bit_1=thisctr.inlatch & 0x1;
|
|
|
|
if (!thisctr.OUTpin || !thisctr.state_bit_1) {
|
|
|
|
if (((thisctr.count_binary/2)-1)==0) {
|
2002-02-21 23:56:18 +03:00
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.next_change_time=((thisctr.count_binary/2)-1) & 0xFFFF;
|
2002-02-21 23:56:18 +03:00
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
} else {
|
|
|
|
if ((thisctr.count_binary/2)==0) {
|
2002-02-21 23:56:18 +03:00
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.next_change_time=(thisctr.count_binary/2) & 0xFFFF;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
thisctr.null_count=0;
|
|
|
|
if (thisctr.inlatch==1) {
|
|
|
|
BX_ERROR(("Count of 1 is invalid in pit mode 3."));
|
|
|
|
}
|
|
|
|
if (!thisctr.OUTpin) {
|
|
|
|
set_OUT(thisctr,1);
|
|
|
|
} else if (thisctr.OUTpin && !thisctr.first_pass) {
|
|
|
|
set_OUT(thisctr,0);
|
|
|
|
}
|
|
|
|
if (thisctr.write_state==MSByte_multiple) {
|
|
|
|
BX_ERROR(("Undefined behavior when loading a half loaded count."));
|
|
|
|
}
|
|
|
|
thisctr.state_bit_2=0;
|
|
|
|
thisctr.first_pass=0;
|
|
|
|
} else {
|
|
|
|
if (thisctr.GATE) {
|
|
|
|
decrement(thisctr);
|
|
|
|
decrement(thisctr);
|
|
|
|
if (!thisctr.OUTpin || !thisctr.state_bit_1) {
|
|
|
|
thisctr.next_change_time=((thisctr.count_binary/2)-1) & 0xFFFF;
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=(thisctr.count_binary/2) & 0xFFFF;
|
|
|
|
}
|
|
|
|
if (thisctr.count==0) {
|
|
|
|
thisctr.state_bit_2=1;
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
}
|
|
|
|
if ((thisctr.count==2) &&
|
|
|
|
(!thisctr.OUTpin || !thisctr.state_bit_1))
|
|
|
|
{
|
|
|
|
thisctr.state_bit_2=1;
|
|
|
|
thisctr.next_change_time=1;
|
2002-02-21 23:56:18 +03:00
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
thisctr.triggerGATE=0;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 4:
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.count_written) {
|
|
|
|
if (!thisctr.OUTpin) {
|
|
|
|
set_OUT(thisctr,1);
|
|
|
|
}
|
|
|
|
if (thisctr.null_count) {
|
|
|
|
set_count(thisctr, thisctr.inlatch);
|
|
|
|
if (thisctr.GATE) {
|
|
|
|
if (thisctr.count_binary==0) {
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
thisctr.null_count=0;
|
|
|
|
if (thisctr.write_state==MSByte_multiple) {
|
|
|
|
BX_ERROR(("Undefined behavior when loading a half loaded count."));
|
|
|
|
}
|
|
|
|
thisctr.first_pass=1;
|
|
|
|
} else {
|
|
|
|
if (thisctr.GATE) {
|
|
|
|
decrement(thisctr);
|
|
|
|
if (thisctr.first_pass) {
|
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
if (!thisctr.count) {
|
|
|
|
set_OUT(thisctr,0);
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
thisctr.first_pass=0;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
thisctr.triggerGATE=0;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 5:
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.count_written) {
|
|
|
|
if (!thisctr.OUTpin) {
|
|
|
|
set_OUT(thisctr,1);
|
|
|
|
}
|
|
|
|
if (thisctr.triggerGATE) {
|
|
|
|
set_count(thisctr, thisctr.inlatch);
|
|
|
|
if (thisctr.count_binary==0) {
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
2002-02-21 23:56:18 +03:00
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
}
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.null_count=0;
|
|
|
|
if (thisctr.write_state==MSByte_multiple) {
|
|
|
|
BX_ERROR(("Undefined behavior when loading a half loaded count."));
|
|
|
|
}
|
|
|
|
thisctr.first_pass=1;
|
|
|
|
} else {
|
|
|
|
decrement(thisctr);
|
|
|
|
if (thisctr.first_pass) {
|
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
if (!thisctr.count) {
|
|
|
|
set_OUT(thisctr,0);
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
thisctr.first_pass=0;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
thisctr.triggerGATE=0;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
default:
|
2008-02-16 01:05:43 +03:00
|
|
|
BX_ERROR(("Mode not implemented."));
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
thisctr.triggerGATE=0;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
}
|
|
|
|
}
|
2007-04-04 02:38:49 +04:00
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
void pit_82C54::clock_all(Bit32u cycles)
|
|
|
|
{
|
2001-09-05 18:41:55 +04:00
|
|
|
BX_DEBUG(("clock_all: cycles=%d",cycles));
|
2001-06-28 02:25:24 +04:00
|
|
|
clock_multiple(0,cycles);
|
|
|
|
clock_multiple(1,cycles);
|
|
|
|
clock_multiple(2,cycles);
|
2007-04-04 02:38:49 +04:00
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
Bit8u pit_82C54::read(Bit8u address)
|
|
|
|
{
|
2008-02-16 01:05:43 +03:00
|
|
|
if (address>MAX_ADDRESS) {
|
2001-05-25 02:20:41 +04:00
|
|
|
BX_ERROR(("Counter address incorrect in data read."));
|
2008-02-16 01:05:43 +03:00
|
|
|
} else if (address==CONTROL_ADDRESS) {
|
2001-09-05 18:41:55 +04:00
|
|
|
BX_DEBUG(("PIT Read: Control Word Register."));
|
2001-05-25 01:44:14 +04:00
|
|
|
//Read from control word register;
|
|
|
|
/* This might be okay. If so, 0 seems the most logical
|
|
|
|
* return value from looking at the docs.
|
|
|
|
*/
|
2001-05-25 02:20:41 +04:00
|
|
|
BX_ERROR(("Read from control word register not defined."));
|
2001-05-25 01:44:14 +04:00
|
|
|
return 0;
|
|
|
|
} else {
|
|
|
|
//Read from a counter;
|
2001-09-05 18:41:55 +04:00
|
|
|
BX_DEBUG(("PIT Read: Counter %d.",address));
|
2007-04-04 02:38:49 +04:00
|
|
|
counter_type &thisctr=counter[address];
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.status_latched) {
|
|
|
|
//Latched Status Read;
|
|
|
|
if (thisctr.count_MSB_latched &&
|
|
|
|
(thisctr.read_state==MSByte_multiple)) {
|
|
|
|
BX_ERROR(("Undefined output when status latched and count half read."));
|
|
|
|
} else {
|
|
|
|
thisctr.status_latched=0;
|
|
|
|
return thisctr.status_latch;
|
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
} else {
|
2008-02-16 01:05:43 +03:00
|
|
|
//Latched Count Read;
|
|
|
|
if (thisctr.count_LSB_latched) {
|
|
|
|
//Read Least Significant Byte;
|
|
|
|
if (thisctr.read_state==LSByte_multiple) {
|
|
|
|
BX_DEBUG(("Setting read_state to MSB_mult"));
|
|
|
|
thisctr.read_state=MSByte_multiple;
|
|
|
|
}
|
|
|
|
thisctr.count_LSB_latched=0;
|
|
|
|
return (thisctr.outlatch & 0xFF);
|
|
|
|
} else if (thisctr.count_MSB_latched) {
|
|
|
|
//Read Most Significant Byte;
|
|
|
|
if (thisctr.read_state==MSByte_multiple) {
|
|
|
|
BX_DEBUG(("Setting read_state to LSB_mult"));
|
|
|
|
thisctr.read_state=LSByte_multiple;
|
|
|
|
}
|
|
|
|
thisctr.count_MSB_latched=0;
|
|
|
|
return ((thisctr.outlatch>>8) & 0xFF);
|
|
|
|
} else {
|
|
|
|
//Unlatched Count Read;
|
|
|
|
if (!(thisctr.read_state & 0x1)) {
|
|
|
|
//Read Least Significant Byte;
|
|
|
|
if (thisctr.read_state==LSByte_multiple) {
|
|
|
|
thisctr.read_state=MSByte_multiple;
|
|
|
|
BX_DEBUG(("Setting read_state to MSB_mult"));
|
|
|
|
}
|
|
|
|
return (thisctr.count & 0xFF);
|
|
|
|
} else {
|
|
|
|
//Read Most Significant Byte;
|
|
|
|
if (thisctr.read_state==MSByte_multiple) {
|
|
|
|
BX_DEBUG(("Setting read_state to LSB_mult"));
|
|
|
|
thisctr.read_state=LSByte_multiple;
|
|
|
|
}
|
|
|
|
return ((thisctr.count>>8) & 0xFF);
|
|
|
|
}
|
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
}
|
|
|
|
}
|
2007-04-04 02:38:49 +04:00
|
|
|
|
2001-05-25 01:44:14 +04:00
|
|
|
//Should only get here on errors;
|
|
|
|
return 0;
|
2007-04-04 02:38:49 +04:00
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
void pit_82C54::write(Bit8u address, Bit8u data)
|
|
|
|
{
|
2008-02-16 01:05:43 +03:00
|
|
|
if (address>MAX_ADDRESS) {
|
2001-05-25 02:20:41 +04:00
|
|
|
BX_ERROR(("Counter address incorrect in data write."));
|
2008-02-16 01:05:43 +03:00
|
|
|
} else if (address==CONTROL_ADDRESS) {
|
2001-05-25 01:44:14 +04:00
|
|
|
Bit8u SC, RW, M, BCD;
|
|
|
|
controlword=data;
|
2001-09-05 18:41:55 +04:00
|
|
|
BX_DEBUG(("Control Word Write."));
|
2001-05-25 01:44:14 +04:00
|
|
|
SC = (controlword>>6) & 0x3;
|
|
|
|
RW = (controlword>>4) & 0x3;
|
|
|
|
M = (controlword>>1) & 0x7;
|
|
|
|
BCD = controlword & 0x1;
|
2008-02-16 01:05:43 +03:00
|
|
|
if (SC == 3) {
|
|
|
|
//READ_BACK command;
|
|
|
|
int i;
|
|
|
|
BX_DEBUG(("READ_BACK command."));
|
|
|
|
for(i=0;i<=MAX_COUNTER;i++) {
|
|
|
|
if ((M>>i) & 0x1) {
|
|
|
|
//If we are using this counter;
|
|
|
|
counter_type &thisctr=counter[i];
|
|
|
|
if (!((controlword>>5) & 1)) {
|
|
|
|
//Latch Count;
|
|
|
|
latch_counter(thisctr);
|
|
|
|
}
|
|
|
|
if (!((controlword>>4) & 1)) {
|
|
|
|
//Latch Status;
|
|
|
|
if (thisctr.status_latched) {
|
|
|
|
//Do nothing because latched status has not been read.;
|
|
|
|
} else {
|
|
|
|
thisctr.status_latch=
|
|
|
|
((thisctr.OUTpin & 0x1) << 7) |
|
|
|
|
((thisctr.null_count & 0x1) << 6) |
|
|
|
|
((thisctr.rw_mode & 0x3) << 4) |
|
|
|
|
((thisctr.mode & 0x7) << 1) |
|
|
|
|
(thisctr.bcd_mode&0x1);
|
|
|
|
thisctr.status_latched=1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
} else {
|
2008-02-16 01:05:43 +03:00
|
|
|
counter_type &thisctr = counter[SC];
|
|
|
|
if (!RW) {
|
|
|
|
//Counter Latch command;
|
|
|
|
BX_DEBUG(("Counter Latch command. SC=%d",SC));
|
|
|
|
latch_counter(thisctr);
|
|
|
|
} else {
|
|
|
|
//Counter Program Command;
|
|
|
|
BX_DEBUG(("Counter Program command. SC=%d, RW=%d, M=%d, BCD=%d",SC,RW,M,BCD));
|
|
|
|
thisctr.null_count=1;
|
|
|
|
thisctr.count_LSB_latched=0;
|
|
|
|
thisctr.count_MSB_latched=0;
|
|
|
|
thisctr.status_latched=0;
|
|
|
|
thisctr.inlatch=0;
|
|
|
|
thisctr.count_written=0;
|
|
|
|
thisctr.first_pass=1;
|
|
|
|
thisctr.rw_mode=RW;
|
|
|
|
thisctr.bcd_mode=(BCD > 0);
|
|
|
|
thisctr.mode=M;
|
|
|
|
switch(RW) {
|
|
|
|
case 0x1:
|
|
|
|
BX_DEBUG(("Setting read_state to LSB"));
|
|
|
|
thisctr.read_state=LSByte;
|
|
|
|
thisctr.write_state=LSByte;
|
|
|
|
break;
|
|
|
|
case 0x2:
|
|
|
|
BX_DEBUG(("Setting read_state to MSB"));
|
|
|
|
thisctr.read_state=MSByte;
|
|
|
|
thisctr.write_state=MSByte;
|
|
|
|
break;
|
|
|
|
case 0x3:
|
|
|
|
BX_DEBUG(("Setting read_state to LSB_mult"));
|
|
|
|
thisctr.read_state=LSByte_multiple;
|
|
|
|
thisctr.write_state=LSByte_multiple;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BX_ERROR(("RW field invalid in control word write."));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
//All modes except mode 0 have initial output of 1.;
|
|
|
|
if (M) {
|
|
|
|
set_OUT(thisctr, 1);
|
|
|
|
} else {
|
|
|
|
set_OUT(thisctr, 0);
|
|
|
|
}
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
//Write to counter initial value.
|
2007-04-04 02:38:49 +04:00
|
|
|
counter_type &thisctr = counter[address];
|
2001-09-05 18:41:55 +04:00
|
|
|
BX_DEBUG(("Write Initial Count: counter=%d, count=%d",address,data));
|
2001-05-25 01:44:14 +04:00
|
|
|
switch(thisctr.write_state) {
|
|
|
|
case LSByte_multiple:
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.inlatch=(thisctr.inlatch & (0xFF<<8)) | data;
|
|
|
|
thisctr.write_state=MSByte_multiple;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case LSByte:
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.inlatch=(thisctr.inlatch & (0xFF<<8)) | data;
|
|
|
|
thisctr.null_count=1;
|
|
|
|
thisctr.count_written=1;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case MSByte_multiple:
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.write_state=LSByte_multiple;
|
2001-05-25 01:44:14 +04:00
|
|
|
case MSByte: //shared between MSB_multiple and MSByte
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.inlatch=(thisctr.inlatch & 0xFF) | (data<<8);
|
|
|
|
thisctr.null_count=1;
|
|
|
|
thisctr.count_written=1;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
default:
|
2008-02-16 01:05:43 +03:00
|
|
|
BX_ERROR(("write counter in invalid write state."));
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
}
|
|
|
|
switch(thisctr.mode) {
|
|
|
|
case 0:
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.write_state==MSByte_multiple) {
|
|
|
|
set_OUT(thisctr,0);
|
|
|
|
}
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 1:
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.triggerGATE) { //for initial writes, if already saw trigger.
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} //Otherwise, no change.
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 6:
|
|
|
|
case 2:
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.next_change_time=1; //FIXME: this could be loosened.
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 7:
|
|
|
|
case 3:
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.next_change_time=1; //FIXME: this could be loosened.
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 4:
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.next_change_time=1;
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
case 5:
|
2008-02-16 01:05:43 +03:00
|
|
|
if (thisctr.triggerGATE) { //for initial writes, if already saw trigger.
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} //Otherwise, no change.
|
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
}
|
|
|
|
}
|
2007-04-04 02:38:49 +04:00
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
void pit_82C54::set_GATE(Bit8u cnum, bx_bool data)
|
|
|
|
{
|
2008-02-16 01:05:43 +03:00
|
|
|
if (cnum>MAX_COUNTER) {
|
2006-01-08 23:39:08 +03:00
|
|
|
BX_ERROR(("Counter number incorrect in 82C54 set_GATE"));
|
|
|
|
} else {
|
2007-04-04 02:38:49 +04:00
|
|
|
counter_type &thisctr = counter[cnum];
|
2006-01-08 23:39:08 +03:00
|
|
|
if (!((thisctr.GATE&&data) || (!(thisctr.GATE||data)))) {
|
|
|
|
BX_INFO(("Changing GATE %d to: %d",cnum,data));
|
|
|
|
thisctr.GATE=data;
|
|
|
|
if (thisctr.GATE) {
|
|
|
|
thisctr.triggerGATE=1;
|
|
|
|
}
|
|
|
|
switch(thisctr.mode) {
|
2008-02-16 01:05:43 +03:00
|
|
|
case 0:
|
|
|
|
if (data && thisctr.count_written) {
|
|
|
|
if (thisctr.null_count) {
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
|
|
|
if ((!thisctr.OUTpin) &&
|
|
|
|
(thisctr.write_state!=MSByte_multiple))
|
|
|
|
{
|
|
|
|
if (thisctr.count_binary==0) {
|
|
|
|
thisctr.next_change_time=1;
|
2002-02-21 23:56:18 +03:00
|
|
|
} else {
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (thisctr.null_count) {
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
if (data && thisctr.count_written) { //only triggers cause a change.
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
if (!data) {
|
|
|
|
set_OUT(thisctr,1);
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
} else {
|
|
|
|
if (thisctr.count_written) {
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
if (!data) {
|
|
|
|
set_OUT(thisctr,1);
|
|
|
|
thisctr.first_pass=1;
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
} else {
|
|
|
|
if (thisctr.count_written) {
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
if (!thisctr.OUTpin || thisctr.null_count) {
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
} else {
|
|
|
|
if (data && thisctr.count_written) {
|
|
|
|
if (thisctr.first_pass) {
|
|
|
|
if (thisctr.count_binary==0) {
|
|
|
|
thisctr.next_change_time=1;
|
2002-02-21 23:56:18 +03:00
|
|
|
} else {
|
2008-02-16 01:05:43 +03:00
|
|
|
thisctr.next_change_time=thisctr.count_binary & 0xFFFF;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
thisctr.next_change_time=0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
if (data && thisctr.count_written) { //only triggers cause a change.
|
|
|
|
thisctr.next_change_time=1;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
2006-01-08 23:39:08 +03:00
|
|
|
break;
|
2001-05-25 01:44:14 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2006-01-08 23:39:08 +03:00
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
bx_bool pit_82C54::read_OUT(Bit8u cnum)
|
|
|
|
{
|
2008-02-16 01:05:43 +03:00
|
|
|
if (cnum>MAX_COUNTER) {
|
2006-01-08 23:39:08 +03:00
|
|
|
BX_ERROR(("Counter number incorrect in 82C54 read_OUT"));
|
|
|
|
return 0;
|
2001-05-25 01:44:14 +04:00
|
|
|
}
|
2007-04-04 02:38:49 +04:00
|
|
|
|
|
|
|
return counter[cnum].OUTpin;
|
2006-01-08 23:39:08 +03:00
|
|
|
}
|
2001-06-11 04:16:24 +04:00
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
bx_bool pit_82C54::read_GATE(Bit8u cnum)
|
|
|
|
{
|
2008-02-16 01:05:43 +03:00
|
|
|
if (cnum>MAX_COUNTER) {
|
2006-01-08 23:39:08 +03:00
|
|
|
BX_ERROR(("Counter number incorrect in 82C54 read_GATE"));
|
|
|
|
return 0;
|
2001-06-11 03:53:09 +04:00
|
|
|
}
|
2007-04-04 02:38:49 +04:00
|
|
|
|
|
|
|
return counter[cnum].GATE;
|
2006-01-08 23:39:08 +03:00
|
|
|
}
|
2001-05-25 01:44:14 +04:00
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
Bit32u pit_82C54::get_clock_event_time(Bit8u cnum)
|
|
|
|
{
|
2008-02-16 01:05:43 +03:00
|
|
|
if (cnum>MAX_COUNTER) {
|
2001-06-28 02:25:24 +04:00
|
|
|
BX_ERROR(("Counter number incorrect in 82C54 read_GATE"));
|
|
|
|
return 0;
|
|
|
|
}
|
2007-04-04 02:38:49 +04:00
|
|
|
|
|
|
|
return counter[cnum].next_change_time;
|
2001-06-28 02:25:24 +04:00
|
|
|
}
|
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
Bit32u pit_82C54::get_next_event_time(void)
|
|
|
|
{
|
2001-06-28 02:25:24 +04:00
|
|
|
Bit32u time0=get_clock_event_time(0);
|
|
|
|
Bit32u time1=get_clock_event_time(1);
|
|
|
|
Bit32u time2=get_clock_event_time(2);
|
|
|
|
|
2009-02-08 00:05:31 +03:00
|
|
|
Bit32u out=time0;
|
2008-02-16 01:05:43 +03:00
|
|
|
if (time1 && (time1<out))
|
2001-06-28 02:25:24 +04:00
|
|
|
out=time1;
|
2008-02-16 01:05:43 +03:00
|
|
|
if (time2 && (time2<out))
|
2001-06-28 02:25:24 +04:00
|
|
|
out=time2;
|
2001-08-14 08:56:11 +04:00
|
|
|
return out;
|
2001-06-28 02:25:24 +04:00
|
|
|
}
|
2004-01-16 19:30:46 +03:00
|
|
|
|
2007-04-04 02:38:49 +04:00
|
|
|
Bit16u pit_82C54::get_inlatch(int counternum)
|
|
|
|
{
|
2006-01-08 23:39:08 +03:00
|
|
|
return counter[counternum].inlatch;
|
2004-01-16 19:30:46 +03:00
|
|
|
}
|
2006-01-08 23:39:08 +03:00
|
|
|
|
|
|
|
void pit_82C54::set_OUT_handler(Bit8u counternum, out_handler_t outh)
|
|
|
|
{
|
|
|
|
counter[counternum].out_handler = outh;
|
|
|
|
}
|