Bochs/bochs/disasm/dis_groups.cc

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#include <stdio.h>
#include <assert.h>
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#include "disasm.h"
#include "../bx_debug/debug.h"
//////////////////
// Intel STYLE
//////////////////
static const char *general_8bit_reg_name[8] = {
"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh"
};
const char *general_16bit_reg_name[8] = {
"ax", "cx", "dx", "bx", "sp", "bp", "si", "di"
};
const char *general_32bit_reg_name[8] = {
"eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi"
};
static const char *segment_name[8] = {
"es", "cs", "ss", "ds", "fs", "gs", "??", "??"
};
static const char *mmx_reg_name[8] = {
"mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7"
};
static const char *xmm_reg_name[8] =
{
"xmm0",
"xmm1",
"xmm2",
"xmm3",
"xmm4",
"xmm5",
"xmm6",
"xmm7"
};
void disassembler::reg32 (unsigned attr)
{
assert(attr < 8);
if (i32bit_opsize)
dis_sprintf("%s", general_32bit_reg_name[attr]);
else
dis_sprintf("%s", general_16bit_reg_name[attr]);
}
void disassembler::reg16 (unsigned attr)
{
assert(attr < 8);
dis_sprintf("%s", general_16bit_reg_name[attr]);
}
void disassembler::reg8 (unsigned attr)
{
assert(attr < 8);
dis_sprintf("%s", general_8bit_reg_name[attr]);
}
void disassembler::OP_SEG (unsigned attr)
{
assert(attr < 8);
dis_sprintf("%s", segment_name[attr]);
}
void disassembler::OP_MEM (unsigned attr)
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{
if(mod == 3)
dis_sprintf("(bad)");
else
(this->*resolve_modrm)(attr);
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}
void disassembler::OP_Q (unsigned attr)
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{
if (mod == 3)
dis_sprintf("%s", mmx_reg_name[rm]);
else
(this->*resolve_modrm)(attr);
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}
void disassembler::OP_W (unsigned attr)
{
if (mod == 3)
dis_sprintf("%s", xmm_reg_name[rm]);
else
(this->*resolve_modrm)(attr);
}
void disassembler::OP_V (unsigned attr)
{
dis_sprintf("%s", xmm_reg_name[nnn]);
}
void disassembler::OP_P (unsigned attr)
{
dis_sprintf("%s", mmx_reg_name[nnn]);
}
void disassembler::OP_X (unsigned attr)
{
char *esi;
if (i32bit_addrsize)
esi = "esi";
else
esi = "si";
if (attr & 0x80)
dis_sprintf("es:");
print_datasize(attr & 0x7F);
dis_sprintf("[%s]", esi);
}
void disassembler::OP_Y (unsigned attr)
{
char *edi;
if (i32bit_addrsize)
edi = "edi";
else
edi = "di";
if (attr & 0x80)
dis_sprintf("es:");
print_datasize(attr & 0x7F);
dis_sprintf("[%s]", edi);
}
void disassembler::Ob (unsigned attr)
{
const char *seg;
if (seg_override)
seg = seg_override;
else
seg = "ds";
if (i32bit_addrsize) {
Bit32u imm32 = fetch_dword();
dis_sprintf("byte ptr [%s:0x%x]", seg, (unsigned) imm32);
}
else {
Bit16u imm16 = fetch_word();
dis_sprintf("byte ptr [%s:0x%x]", seg, (unsigned) imm16);
}
}
void disassembler::Ov (unsigned attr)
{
const char *seg;
if (seg_override)
seg = seg_override;
else
seg = "ds";
if (i32bit_addrsize) {
Bit32u imm32 = fetch_dword();
dis_sprintf("[%s:0x%x]", seg, (unsigned) imm32);
}
else {
Bit16u imm16 = fetch_word();
dis_sprintf("[%s:0x%x]", seg, (unsigned) imm16);
}
}
void disassembler::Jb (unsigned attr)
{
Bit8s imm8; /* JMP rel8 is signed */
imm8 = (Bit8s) fetch_byte();
if (i32bit_opsize) {
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#if BX_DEBUGGER
char *Sym=bx_dbg_disasm_symbolic_address((Bit32u)(imm8+db_eip), db_base);
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if(Sym) {
dis_sprintf("%s", Sym);
}
else // Symbol not found
#endif
dis_sprintf("0x%x", (unsigned) (imm8+db_eip));
}
else
{
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#if BX_DEBUGGER
char *Sym=bx_dbg_disasm_symbolic_address((Bit32u)((imm8+db_eip) & 0xFFFF), db_base);
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if(Sym) {
dis_sprintf("%s", Sym);
}
else // Symbol not found
#endif
dis_sprintf("0x%x", (unsigned) ((imm8+db_eip) & 0xFFFF));
}
}
void disassembler::Jv (unsigned attr)
{
if (i32bit_opsize) {
Bit32s imm32; /* JMP rel32 is signed */
imm32 = (Bit32s) fetch_dword();
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#if BX_DEBUGGER
char *Sym=bx_dbg_disasm_symbolic_address((Bit32u)(imm32+db_eip), db_base);
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if(Sym) {
dis_sprintf("%s", Sym);
}
else // Symbol not found
#endif
dis_sprintf("0x%x", (unsigned) (imm32+db_eip));
}
else
{
Bit16s imm16; /* JMP rel16 is signed */
imm16 = (Bit16s) fetch_word();
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#if BX_DEBUGGER
char *Sym=bx_dbg_disasm_symbolic_address((Bit32u)((imm16+db_eip) & 0xFFFF), db_base);
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if(Sym) {
dis_sprintf("%s", Sym);
}
else // Symbol not found
#endif
dis_sprintf("0x%x", (unsigned) ((imm16+db_eip) & 0xFFFF));
}
}
void disassembler::Ap (unsigned attr)
{
if (i32bit_opsize)
{
Bit32u imm32 = fetch_dword();
Bit16u cs_selector = fetch_word();
dis_sprintf("%04x:%08x", (unsigned) cs_selector, (unsigned) imm32);
}
else
{
Bit16u imm16 = fetch_word();
Bit16u cs_selector = fetch_word();
dis_sprintf("%04x:%04x", (unsigned) cs_selector, (unsigned) imm16);
}
}
void disassembler::Eb (unsigned attr)
{
if (mod == 3)
dis_sprintf("%s", general_8bit_reg_name[rm]);
else
(this->*resolve_modrm)(B_MODE);
}
void disassembler::Ew (unsigned attr)
{
if (mod == 3)
dis_sprintf("%s", general_16bit_reg_name[rm]);
else
(this->*resolve_modrm)(W_MODE);
}
void disassembler::Ev (unsigned attr)
{
if (mod == 3)
{
if (i32bit_opsize)
dis_sprintf("%s", general_32bit_reg_name[rm]);
else
dis_sprintf("%s", general_16bit_reg_name[rm]);
}
else
(this->*resolve_modrm)(V_MODE);
}
void disassembler::Ed (unsigned attr)
{
if (mod == 3)
dis_sprintf("%s", general_32bit_reg_name[rm]);
else
(this->*resolve_modrm)(D_MODE);
}
void disassembler::Ep (unsigned attr) {dis_sprintf("*** Ep unfinished ***");}
void disassembler::Ea (unsigned attr) {dis_sprintf("*** Ea unfinished ***");}
void disassembler::Gb (unsigned attr)
{
dis_sprintf("%s", general_8bit_reg_name[nnn]);
}
void disassembler::Gv (unsigned attr)
{
if (i32bit_opsize)
dis_sprintf("%s", general_32bit_reg_name[nnn]);
else
dis_sprintf("%s", general_16bit_reg_name[nnn]);
}
void disassembler::Gd (unsigned attr)
{
dis_sprintf("%s", general_32bit_reg_name[nnn]);
}
void disassembler::Rd (unsigned attr)
{
dis_sprintf("%s", general_32bit_reg_name[rm]);
}
void disassembler::Rw (unsigned attr)
{
dis_sprintf("%s", general_16bit_reg_name[rm]);
}
void disassembler::Sw (unsigned attr)
{
dis_sprintf("%s", segment_name[nnn]);
}
void disassembler::Ib (unsigned attr)
{
dis_sprintf("0x%x", (unsigned) fetch_byte());
}
void disassembler::Iw (unsigned attr)
{
dis_sprintf("0x%x", (unsigned) fetch_word());
}
void disassembler::Id (unsigned attr)
{
dis_sprintf("0x%x", (unsigned) fetch_dword());
}
void disassembler::Iv (unsigned attr)
{
if (i32bit_opsize)
Id(attr);
else
Iw(attr);
}
void disassembler::sIb(unsigned attr)
{
if (i32bit_opsize)
{
Bit32u imm32 = (Bit8s) fetch_byte();
dis_sprintf("0x%x", imm32);
}
else
{
Bit32u imm16 = (Bit8s) fetch_byte();
dis_sprintf("0x%x", imm16);
}
}
- apply patch.ifdef-disabled-options. Comments from that patch are below: For a whole lot of configure options, I put #if...#endif around code that is specific to the option, even in files which are normally only compiled when the option is on. This allows me to create a MS Visual C++ 6.0 workspace that supports many of these options. The workspace will basically compile every file all the time, but the code for disabled options will be commented out by the #if...#endif. This may one day lead to simplification of the Makefiles and configure scripts, but for the moment I'm leaving Makefiles and configure scripts alone. Affected options: BX_SUPPORT_APIC (cpu/apic.cc) BX_SUPPORT_X86_64 (cpu/*64.cc) BX_DEBUGGER (debug/*) BX_DISASM (disasm/*) BX_WITH_nameofgui (gui/*) BX_SUPPORT_CDROM (iodev/cdrom.cc) BX_NE2K_SUPPORT (iodev/eth*.cc, iodev/ne2k.cc) BX_SUPPORT_APIC (iodev/ioapic.cc) BX_IODEBUG_SUPPORT (iodev/iodebug.cc) BX_PCI_SUPPORT (iodev/pci*.cc) BX_SUPPORT_SB16 (iodev/sb*.cc) Modified Files: cpu/apic.cc cpu/arith64.cc cpu/ctrl_xfer64.cc cpu/data_xfer64.cc cpu/fetchdecode64.cc cpu/logical64.cc cpu/mult64.cc cpu/resolve64.cc cpu/shift64.cc cpu/stack64.cc debug/Makefile.in debug/crc.cc debug/dbg_main.cc debug/lexer.l debug/linux.cc debug/parser.c debug/parser.y disasm/dis_decode.cc disasm/dis_groups.cc gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/macintosh.cc gui/rfb.cc gui/sdl.cc gui/term.cc gui/win32.cc gui/wx.cc gui/wxdialog.cc gui/wxmain.cc gui/x.cc iodev/cdrom.cc iodev/eth.cc iodev/eth_arpback.cc iodev/eth_fbsd.cc iodev/eth_linux.cc iodev/eth_null.cc iodev/eth_packetmaker.cc iodev/eth_tap.cc iodev/eth_tuntap.cc iodev/eth_win32.cc iodev/ioapic.cc iodev/iodebug.cc iodev/ne2k.cc iodev/pci.cc iodev/pci2isa.cc iodev/sb16.cc iodev/soundlnx.cc iodev/soundwin.cc
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// floating point
void disassembler::STj (unsigned attr) {dis_sprintf("st(%d)", rm);}