2018-03-06 12:18:53 +03:00
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#pragma once
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static struct ata_device ata_primary_master = {.io_base = 0x1F0, .control = 0x3F6, .slave = 0};
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static struct ata_device ata_primary_slave = {.io_base = 0x1F0, .control = 0x3F6, .slave = 1};
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static struct ata_device ata_secondary_master = {.io_base = 0x170, .control = 0x376, .slave = 0};
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static struct ata_device ata_secondary_slave = {.io_base = 0x170, .control = 0x376, .slave = 1};
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static void ata_io_wait(struct ata_device * dev) {
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inportb(dev->io_base + ATA_REG_ALTSTATUS);
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inportb(dev->io_base + ATA_REG_ALTSTATUS);
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inportb(dev->io_base + ATA_REG_ALTSTATUS);
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inportb(dev->io_base + ATA_REG_ALTSTATUS);
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}
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static int ata_status_wait(struct ata_device * dev, int timeout) {
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int status;
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if (timeout > 0) {
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int i = 0;
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while ((status = inportb(dev->io_base + ATA_REG_STATUS)) & ATA_SR_BSY && (i < timeout)) i++;
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} else {
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while ((status = inportb(dev->io_base + ATA_REG_STATUS)) & ATA_SR_BSY);
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}
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return status;
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}
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static void ata_soft_reset(struct ata_device * dev) {
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outportb(dev->control, 0x04);
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ata_io_wait(dev);
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outportb(dev->control, 0x00);
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}
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static int ata_wait(struct ata_device * dev, int advanced) {
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uint8_t status = 0;
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ata_io_wait(dev);
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status = ata_status_wait(dev, -1);
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if (advanced) {
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status = inportb(dev->io_base + ATA_REG_STATUS);
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if (status & ATA_SR_ERR) return 1;
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if (status & ATA_SR_DF) return 1;
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if (!(status & ATA_SR_DRQ)) return 1;
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}
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return 0;
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}
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static void atapi_device_init(struct ata_device * dev) {
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dev->is_atapi = 1;
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outportb(dev->io_base + 1, 1);
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outportb(dev->control, 0);
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outportb(dev->io_base + ATA_REG_HDDEVSEL, 0xA0 | dev->slave << 4);
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ata_io_wait(dev);
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outportb(dev->io_base + ATA_REG_COMMAND, ATA_CMD_IDENTIFY_PACKET);
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ata_io_wait(dev);
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ata_wait(dev, 0);
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uint16_t * buf = (uint16_t *)&dev->identity;
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for (int i = 0; i < 256; ++i) {
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buf[i] = inports(dev->io_base);
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}
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uint8_t * ptr = (uint8_t *)&dev->identity.model;
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for (int i = 0; i < 39; i+=2) {
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uint8_t tmp = ptr[i+1];
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ptr[i+1] = ptr[i];
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ptr[i] = tmp;
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}
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/* Detect medium */
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atapi_command_t command;
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memset(&command, 0, sizeof(command));
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command.command_bytes[0] = 0x25;
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uint16_t bus = dev->io_base;
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outportb(bus + ATA_REG_FEATURES, 0x00);
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outportb(bus + ATA_REG_LBA1, 0x08);
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outportb(bus + ATA_REG_LBA2, 0x08);
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outportb(bus + ATA_REG_COMMAND, ATA_CMD_PACKET);
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/* poll */
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while (1) {
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uint8_t status = inportb(dev->io_base + ATA_REG_STATUS);
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if ((status & ATA_SR_ERR)) goto atapi_error;
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if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRDY)) break;
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}
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for (int i = 0; i < 6; ++i) {
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outports(bus, command.command_words[i]);
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}
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/* poll */
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while (1) {
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uint8_t status = inportb(dev->io_base + ATA_REG_STATUS);
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if ((status & ATA_SR_ERR)) goto atapi_error_read;
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if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRDY)) break;
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if ((status & ATA_SR_DRQ)) break;
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}
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uint16_t data[4];
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for (int i = 0; i < 4; ++i) {
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data[i] = inports(bus);
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}
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#define htonl(l) ( (((l) & 0xFF) << 24) | (((l) & 0xFF00) << 8) | (((l) & 0xFF0000) >> 8) | (((l) & 0xFF000000) >> 24))
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uint32_t lba, blocks;;
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memcpy(&lba, &data[0], sizeof(uint32_t));
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lba = htonl(lba);
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memcpy(&blocks, &data[2], sizeof(uint32_t));
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blocks = htonl(blocks);
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dev->atapi_lba = lba;
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dev->atapi_sector_size = blocks;
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return;
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atapi_error_read:
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return;
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atapi_error:
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return;
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}
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static int ata_device_detect(struct ata_device * dev) {
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ata_soft_reset(dev);
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ata_io_wait(dev);
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outportb(dev->io_base + ATA_REG_HDDEVSEL, 0xA0 | dev->slave << 4);
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ata_io_wait(dev);
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ata_status_wait(dev, 10000);
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unsigned char cl = inportb(dev->io_base + ATA_REG_LBA1); /* CYL_LO */
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unsigned char ch = inportb(dev->io_base + ATA_REG_LBA2); /* CYL_HI */
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if (cl == 0xFF && ch == 0xFF) {
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/* Nothing here */
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return 0;
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}
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if ((cl == 0x00 && ch == 0x00) ||
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(cl == 0x3C && ch == 0xC3)) {
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return 1;
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} else if ((cl == 0x14 && ch == 0xEB) ||
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(cl == 0x69 && ch == 0x96)) {
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atapi_device_init(dev);
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return 2;
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}
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return 0;
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}
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2018-06-27 07:20:36 +03:00
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static void ata_device_read_sectors_atapi(struct ata_device * dev, uint32_t lba, uint8_t * buf, int sectors) {
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2018-03-06 12:18:53 +03:00
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if (!dev->is_atapi) return;
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2018-03-07 13:20:19 +03:00
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2018-03-06 12:18:53 +03:00
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uint16_t bus = dev->io_base;
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2018-03-07 13:20:19 +03:00
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_try_again:
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2018-03-06 12:18:53 +03:00
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outportb(dev->io_base + ATA_REG_HDDEVSEL, 0xA0 | dev->slave << 4);
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ata_io_wait(dev);
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outportb(bus + ATA_REG_FEATURES, 0x00);
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outportb(bus + ATA_REG_LBA1, dev->atapi_sector_size & 0xFF);
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outportb(bus + ATA_REG_LBA2, dev->atapi_sector_size >> 8);
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outportb(bus + ATA_REG_COMMAND, ATA_CMD_PACKET);
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/* poll */
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while (1) {
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uint8_t status = inportb(dev->io_base + ATA_REG_STATUS);
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if ((status & ATA_SR_ERR)) goto atapi_error_on_read_setup;
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if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRQ)) break;
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}
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atapi_command_t command;
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2018-06-27 07:20:36 +03:00
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command.command_bytes[0] = 0x28;
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2018-03-06 12:18:53 +03:00
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command.command_bytes[1] = 0;
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command.command_bytes[2] = (lba >> 0x18) & 0xFF;
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command.command_bytes[3] = (lba >> 0x10) & 0xFF;
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command.command_bytes[4] = (lba >> 0x08) & 0xFF;
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command.command_bytes[5] = (lba >> 0x00) & 0xFF;
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2018-06-27 07:20:36 +03:00
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command.command_bytes[6] = sectors >> 16;
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command.command_bytes[7] = sectors >> 8;
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command.command_bytes[8] = sectors; /* bit 0 = PMI (0, last sector) */
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command.command_bytes[9] = 0; /* control */
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2018-03-06 12:18:53 +03:00
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command.command_bytes[10] = 0;
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command.command_bytes[11] = 0;
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for (int i = 0; i < 6; ++i) {
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outports(bus, command.command_words[i]);
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}
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2018-09-12 13:39:12 +03:00
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uint16_t size_to_read = dev->atapi_sector_size;
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2018-06-27 07:20:36 +03:00
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for (int i = 0; i < sectors; ++i) {
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2018-09-12 13:39:12 +03:00
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while (1) {
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uint8_t status = inportb(dev->io_base + ATA_REG_STATUS);
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if ((status & ATA_SR_ERR)) goto atapi_error_on_read_setup_cmd;
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if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRQ)) break;
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}
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2018-03-06 12:18:53 +03:00
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2018-06-27 07:20:36 +03:00
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inportsm(bus,buf,size_to_read/2);
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2018-03-06 12:18:53 +03:00
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2018-09-12 13:39:12 +03:00
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buf += size_to_read;
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2018-03-06 12:18:53 +03:00
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2018-09-12 13:39:12 +03:00
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while (1) {
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uint8_t status = inportb(dev->io_base + ATA_REG_STATUS);
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if ((status & ATA_SR_ERR)) goto atapi_error_on_read_setup;
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if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRDY)) break;
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}
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2018-06-27 07:20:36 +03:00
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}
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2018-03-06 12:18:53 +03:00
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return;
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atapi_error_on_read_setup:
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print("error on setup\n");
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return;
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2018-03-07 13:20:19 +03:00
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atapi_error_on_read_setup_cmd:
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print("error on cmd\n");
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return;
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2018-03-06 12:18:53 +03:00
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}
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2018-06-27 07:20:36 +03:00
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#define ata_device_read_sector_atapi(a,b,c) ata_device_read_sectors_atapi(a,b,c,1)
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