ea40a61a84
aren't routed correctly over the 8259, it seems. - Removed passing the hpet_regs around, since there's a static variable. - Added lots of debug dprintfs. - Fixed setting the timer interrupt to edge - Timer is initialized once. - Use the timer 0 instead of 2. - Renamed register definitions to be more readable - Use 64 bits registers and unions where applicable. - Other things I don't remember git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33345 a95241bf-73f2-0310-859d-f6bbb57e9c96
118 lines
4.1 KiB
C
118 lines
4.1 KiB
C
/*
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* Copyright 2008, Dustin Howett, dustin.howett@gmail.com. All rights reserved.
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* Distributed under the terms of the MIT License.
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*/
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#ifndef _KERNEL_ARCH_x86_HPET_H
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#define _KERNEL_ARCH_x86_HPET_H
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#include <arch/x86/arch_acpi.h>
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/* All masks are 32 bits wide to represent relative bit locations */
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/* Doing it this way is Required since the HPET only supports 32/64-bit aligned reads. */
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/* Global Capability Register Masks */
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#define HPET_CAP_MASK_REVID 0x00000000000000FFULL
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#define HPET_CAP_MASK_NUMTIMERS 0x0000000000001F00ULL
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#define HPET_CAP_MASK_WIDTH 0x0000000000002000ULL
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#define HPET_CAP_MASK_LEGACY 0x0000000000008000ULL
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#define HPET_CAP_MASK_VENDOR_ID 0x00000000FFFF0000ULL
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#define HPET_CAP_MASK_PERIOD 0xFFFFFFFF00000000ULL
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/* Retrieve Global Capabilities */
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#define HPET_GET_REVID(regs) ((regs)->capabilities & HPET_CAP_MASK_REVID)
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#define HPET_GET_NUM_TIMERS(regs) (((regs)->capabilities & HPET_CAP_MASK_NUMTIMERS) >> 8)
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#define HPET_IS_64BIT(regs) (((regs)->capabilities & HPET_CAP_MASK_WIDTH) >> 13)
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#define HPET_IS_LEGACY_CAPABLE(regs) (((regs)->capabilities & HPET_CAP_MASK_LEGACY) >> 15)
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#define HPET_GET_VENDOR_ID(regs) (((regs)->capabilities & HPET_CAP_MASK_VENDOR_ID) >> 16)
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#define HPET_GET_PERIOD(regs) (((regs)->capabilities & HPET_CAP_MASK_PERIOD) >> 32)
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/* Global Config Register Masks */
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#define HPET_CONF_MASK_ENABLED 0x00000001
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#define HPET_CONF_MASK_LEGACY 0x00000002
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/* Retrieve Global Configuration */
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#define HPET_IS_ENABLED(regs) ((regs)->config & HPET_CONF_MASK_ENABLED)
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#define HPET_IS_LEGACY(regs) (((regs)->config & HPET_CONF_MASK_LEGACY) >> 1)
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/* Timer Configuration and Capabilities*/
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#define HPET_CAP_TIMER_MASK 0xFFFFFFFF00000000ULL
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#define HPET_CONF_TIMER_INT_ROUTE_MASK 0x3e00UL
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#define HPET_CONF_TIMER_INT_ROUTE_SHIFT 9
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#define HPET_CONF_TIMER_INT_TYPE 0x00000002UL
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#define HPET_CONF_TIMER_INT_ENABLE 0x00000004UL
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#define HPET_CONF_TIMER_TYPE 0x00000008UL
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#define HPET_CONF_TIMER_VAL_SET 0x00000040UL
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#define HPET_CONF_TIMER_32MODE 0x00000100UL
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#define HPET_CONF_TIMER_FSB_ENABLE 0x00004000UL
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#define HPET_CAP_TIMER_PER_INT 0x00000010UL
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#define HPET_CAP_TIMER_SIZE 0x00000020UL
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#define HPET_CAP_TIMER_FSB_INT_DEL 0x00008000UL
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#define HPET_GET_CAP_TIMER_ROUTE(timer) (((timer)->config & HPET_CAP_TIMER_MASK) >> 32)
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#define HPET_GET_CONF_TIMER_INT_ROUTE(timer) (((timer)->config & HPET_CONF_TIMER_INT_ROUTE_MASK) >> HPET_CONF_TIMER_INT_ROUTE_SHIFT)
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#define ACPI_HPET_SIGNATURE "HPET"
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struct hpet_timer {
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/* Timer Configuration/Capability bits, Reversed because x86 is LSB */
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volatile uint64 config;
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/* R/W: Each bit represents one allowed interrupt for this timer. */
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/* If interrupt 16 is allowed, bit 16 will be 1. */
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union {
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volatile uint64 comparator64; /* R/W: Comparator value */
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volatile uint32 comparator32;
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} u0; /* non-periodic mode: fires once when main counter = this comparator */
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/* periodic mode: fires when timer reaches this value, is increased by the original value */
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volatile uint64 fsb_route[2]; /* R/W: FSB Interrupt Route values */
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};
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struct hpet_regs {
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volatile uint64 capabilities; /* Read Only */
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volatile uint64 reserved1;
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volatile uint64 config; /* R/W: Config Bits */
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volatile uint64 reserved2;
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/* Interrupt Status bits */
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volatile uint64 interrupt_status; /* Interrupt Config bits for timers 0-31 */
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/* Level Tigger: 0 = off, 1 = set by hardware, timer is active */
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/* Edge Trigger: ignored */
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/* Writing 0 will not clear these. Must write 1 again. */
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volatile uint64 reserved3[25];
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union {
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volatile uint64 counter64; /* R/W */
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volatile uint32 counter32;
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} u0;
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volatile uint64 reserved4;
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volatile struct hpet_timer timer[1];
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};
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typedef struct acpi_hpet {
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acpi_descriptor_header header; /* "HPET" signature and acpi header */
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uint16 vendor_id;
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uint8 legacy_capable : 1;
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uint8 reserved1 : 1;
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uint8 countersize : 1;
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uint8 comparators : 5;
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uint8 hw_revision;
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struct hpet_addr {
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uint8 address_space;
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uint8 register_width;
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uint8 register_offset;
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uint8 reserved;
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uint64 address;
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} hpet_address;
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uint8 number;
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uint16 min_tick;
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} _PACKED acpi_hpet;
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#endif
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