* cache_abort_transaction() left the block dirty which was causing bug
#8123 as well.
* cache_abort_sub_transaction() did, in addition to not clearing the dirty
flag, not reset the block's transaction member either if the block was
not part of the parent transaction.
This matches layout in ACPICA and keeps a cleaner boundry between
Haiku and ACPICA code. The only haiku specific file in ACPICA is
achaiku.h and it will hopefully be included upstream soon.
Merging will be simpler as we can just replace acpica contents and
fix Jamfile and build errors in our code.
- repnz movsb turns out to not actually be a legal instruction,
resulting in various strings being copied incorrectly, leading to
random crashes in various places. Rework to use loop instead.
Thanks to Alex Smith for helping review changes and offering
improvements.
- Minor cleanups.
- Fixes#8650 properly.
- Replace arch_cpu_user_strlcpy() and arch_cpu_user_memset() with x86 assembly
versions. These correctly handle the fault handler, which had broken again
on gcc4 for the C versions, causing stack corruption in certain error cases.
The other architectures will still need to have corresponding asm variants
added in order for them to not run into the same issue though.
Characters 17, 18 and 19 (device control 1, 2 and 3) become "full block",
"upper filled block" and "lower filled block". Using back- and foreground
color inversion these could be reduced to a single "half block", but
having them available as idividual chars is more convenient.
* On ppc440, the FPU is implemented as an Auxiliary Processing Unit,
we must therefore enable sending commands to it,
in addition to setting the MSR bit.
* While the baremetal arm book I have says mrc, it breaks
verdex and doesn't work on the Pi.
* Moving the page table address to the p15 coprocessor makes
more logical sense anyway... i think mrc was a typo.
* the common part should try to use the U-Boot API when found.
* the arch part can make use of cpu features (like timer register)
* the ppc code enables the FPU in the MSR, since it's used by vsnprintf(),
which at least saves one FP register in its prologue.
* gPeripheralBase keeps track of the device
peripherals before and after mmu_init
* Add ability to disable mmu for troubleshooting
* Remove static FB_BASE, we actually don't know
where the FB is yet. (depends on firmware used)
* BCM2708 defines no longer assume 0x20 address
We will be throwing away the blob memory mapping
and using our own.
* Use existing blob mapping to turn GPIO led on pre mmu_init
* Remap MMU hardware addresses from 0x7E. We could map each device,
however the kernel will throw away the mappings again anyway. For
now we just map the whole range and use offsets.
* Serial uart no longer works, however at least
we know why now :). Serial driver now needs to
use mapped address.
* Use U-Boot mmu code as base
* This will be factored out someday into common arch mmu
code when we can read Flattened Device Trees
* Move mmu_init after serial_init.
Temporary change as we will want serial_init to use
memory mapped addresses... for debugging.
