Commit Graph

215 Commits

Author SHA1 Message Date
Jérôme Duval
46f7a54d8c MSI: Use the effective APIC id of the boot CPU for the address destination.
* This should only affect systems where the CPU ids aren't sequential (mostly
non Intel).
* Fixes #9807.
2013-07-29 17:36:03 +02:00
Pawel Dziepak
a8f8d2c057 x86_64: put user stack and team data at top of user address space 2013-04-04 20:54:56 +02:00
Pawel Dziepak
f697412ff8 vm: place commpage and team data near the top of user address space
Placing commpage and team user data somewhere at the top of the user accessible
virtual address space prevents these areas from conflicting with elf images
that require to be mapped at exact address (in most cases: runtime_loader).
2013-04-04 15:27:24 +02:00
Pawel Dziepak
966f207668 x86: enable data execution prevention
Set execute disable bit for any page that belongs to area with neither
B_EXECUTE_AREA nor B_KERNEL_EXECUTE_AREA set.

In order to take advanage of NX bit in 32 bit protected mode PAE must be
enabled. Thus, from now on it is also enabled when the CPU supports NX bit.

vm_page_fault() takes additional argument which indicates whether page fault
was caused by an illegal instruction fetch.
2013-04-04 15:22:23 +02:00
Alex Smith
5e0c3db286 Account for the physical map area in the kernel VM space. Fixes #9547.
The physical memory map area was not included in the kernel virtual
address space range (it was below KERNEL_BASE). This caused problems
if an I/O operation took place on physical memory mapped there (the
bad address error seen in #9547 was occurring in lock_memory_etc()).
Changed KERNEL_BASE and KERNEL_SIZE to cover the area and add a null
area that covers all of it. Also changed X86VMTranslationMap64Bit to
handle large pages in Query(), as the physical map area uses large
pages.
2013-03-22 18:30:01 +00:00
Alex Smith
11c9f9a1d6 Merge branch 'master' into x86_64
Conflicts:
	build/jam/FloppyBootImage
	build/jam/OptionalBuildFeatures
	build/jam/OptionalPackages
	headers/private/shared/cpu_type.h
	src/bin/ps.c
	src/bin/sysinfo.cpp
	src/kits/tracker/PoseView.cpp
	src/preferences/appearance/DecorSettingsView.cpp
	src/preferences/virtualmemory/Settings.cpp
	src/servers/input/AddOnManager.cpp
	src/servers/input/InputServer.cpp
	src/servers/input/InputServerMethod.cpp
	src/system/boot/Jamfile
	src/system/boot/platform/raspberrypi_arm/mmu.cpp
	src/system/boot/platform/u-boot/arch/arm/Jamfile
	src/system/kernel/arch/x86/arch_cpu.cpp
	src/system/kernel/arch/x86/arch_thread.cpp
	src/system/kernel/cache/block_cache.cpp
	src/system/kernel/vm/VMAnonymousCache.cpp
2012-11-18 14:02:07 +00:00
Yongcong Du
19187c464b x86: Initialize IA32_MSR_ENERGY_PERF_BIAS
The lowest 4 bits of the MSR serves as a hint to the hardware to
favor performance or energy saving. 0 means a hint preference for
highest performance while 15 corresponds to the maximum energy
savings. A value of 7 translates into a hint to balance performance
with energy savings.

The default reset value of the MSR is 0. If BIOS doesn't intialize
the MSR, the hardware will run in performance state. This patch
initialize the MSR with value of 7 for balance between performance
and energy savings

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
2012-08-29 22:11:56 +02:00
Alex Smith
d2a1be1c4e Cleaner separation of 32-/64-bit specific CPU/interrupt code.
Renamed {32,64}/int.cpp to {32,64}/descriptors.cpp, which now contain
functions for GDT and TSS setup that were previously in arch_cpu.cpp,
as well as the IDT setup code. These get called from the init functions
in arch_cpu.cpp, rather than having a bunch of ifdef'd chunks of code
for 32/64.
2012-08-18 17:43:40 +01:00
Alex Smith
9f629ef38e Rename KERNEL_LOAD_BASE_64BIT to KERNEL_LOAD_BASE_64_BIT for consistency. 2012-08-17 15:16:25 +01:00
Alex Smith
8a1903353e Implemented user debugging support for x86_64.
Reused x86 arch_user_debugger.cpp, with a few minor changes to make
the code work for both 32 and 64 bit. Something isn't quite working
right, if a breakpoint is hit the kernel will hang. Other than that
everything appears to work correctly.
2012-08-07 20:20:42 +01:00
Alex Smith
cc30eec43d System call restart support. 2012-08-05 14:20:37 +01:00
Alex Smith
74bda98cb2 Killed off vm86 code, no longer being used. 2012-08-03 16:49:15 +01:00
Alex Smith
d93ed09564 Improved safety for user memory accesses.
* Changed IS_USER_ADDRESS to check an address using USER_BASE and
  USER_SIZE, rather than just !IS_KERNEL_ADDRESS. The old check would
  allow user buffers to point into the physical memory map area.
* Added an unmapped hole at the end of the bottom half of the address
  space which catches buffers that cross into the uncanonical address
  region. This also removes the need to check for uncanonical return
  addresses in the syscall handler, it is no longer possible for the
  return address to be uncanonical under normal circumstances. All
  cases in which the return address might be changed by the kernel
  are still handled via the IRET path.
2012-08-02 09:32:33 +01:00
Alex Smith
c0d28c0199 Implemented signals for x86_64. 2012-07-30 13:52:51 +01:00
Alex Smith
370ab57d49 Initial userland support for x86_64.
Userland switch is implemented, as is basic system call support (using
SYSCALL/SYSRET). The system call handler is not yet complete: it doesn't
handle more than 6 arguments, and does not perform all the necessary kernel
entry/exit work (neither does the interrupt handler). However, this is
sufficient for runtime_loader to start and print some debug output.
2012-07-23 17:12:12 +01:00
Alex Smith
6497f6b1ec Moved the exception handling functions to arch_int.cpp, shared between x86 and x86_64. 2012-07-21 09:11:09 +01:00
Alex Smith
bcb07a319b Implemented the rest of the kernel debugger functions for x86_64.
Merged with the x86 implementations, mostly the same except for a
few differences. GDB stub is currently broken, will investigate
later.
2012-07-13 14:09:09 +01:00
Alex Smith
4ebc6dfa68 Moved some 32-bit specific stuff to the 32 subdirectory. 2012-07-12 14:23:55 +01:00
Alex Smith
d38f1301d1 Cleaned up 32-bit descriptors.h. 2012-07-12 13:55:03 +01:00
Alex Smith
76a1175dbe Support for SMP on x86_64.
No major changes to the kernel: just compiled in arch_smp.cpp and fixed the
IDT load in arch_cpu_init_percpu to use the correct limit for x86_64 (uses
sizeof(interrupt_descriptor)). In the boot loader, changed smp_boot_other_cpus
to construct a temporary GDT and get the page directory address from CR3, as
what's in kernel_args will be 64-bit stuff and will not work to switch the
CPUs into 32-bit mode in the trampoline code. Refactored 64-bit kernel entry
code to not use the stack after disabling paging, as the secondary CPUs are
given a 32-bit virtual stack address by the SMP trampoline code which will
no longer work.
2012-07-11 18:29:15 +01:00
Alex Smith
5670b0a8e4 Moved the 32-bit page fault handler to arch_int.cpp, use it for x86_64.
A proper page fault handler was required for areas that were not locked
into the kernel address space. This enables the boot process to get
up to the point of trying to find the boot volume.
2012-07-09 19:18:09 +01:00
Alex Smith
b5c9d24abc Implemented threading for x86_64.
* Thread creation and switching is working fine, however threads do not yet
  get interrupted because I've not implemented hardware interrupt handling
  yet (I'll do that next).
* I've made some changes to struct iframe: I've removed the e/r prefixes
  from the member names for both 32/64, so now they're just named ip, ax,
  bp, etc. This makes it easier to write code that works with both 32/64
  without having to deal with different iframe member names.
2012-07-09 16:43:01 +01:00
Alex Smith
5e9bb17da7 Renamed remaining i386_* functions to x86_* for consistency. 2012-07-09 12:14:18 +01:00
Alex Smith
5c7d52183c Implemented system_time() for x86_64.
* Uses 64-bit multiplication, special handling for CPUs clocked < 1 GHz
  in system_time_nsecs() not required like on x86.
* Tested against a straight conversion of the x86 version, noticably
  faster with a large number of system_time() calls.
2012-07-08 10:16:44 +01:00
Alex Smith
15feb60325 A few improvements suggested by Ingo. 2012-07-06 14:34:50 +01:00
Alex Smith
84bf29f97b Compile in arch_platform.cpp for x86_64. The apm_init call is disabled for x86_64, APM is 32-bit only. 2012-07-06 14:17:48 +01:00
Alex Smith
950b24e32d Begun work on VMTranslationMap implementation for x86_64.
* Added empty source files for all the 64-bit paging method code, and a
  stub implementation of X86PagingMethod64Bit.
* arch_vm_translation_map.cpp has been modified to use X86PagingMethod64Bit
  on x86_64.
2012-07-04 17:08:44 +01:00
Alex Smith
4304bb9894 Added arch_cpu.cpp to the x86_64 build.
* Some things are currently ifndef'd out completely for x86_64 because
  they aren't implemented, there's a few other ifdef's to handle x86_64
  differences but most of the code works unchanged.
* Renamed some i386_* functions to x86_*.
* Added a temporary method for setting the current thread on x86_64
  (a global variable, not SMP safe). This will be changed to be done
  via the GS segment but I've not implemented that yet.
2012-07-04 14:06:46 +01:00
Alex Smith
4e8fbfb2d1 x86_{read,write}_cr{0,4} can just be implemented as macros, put an x86_ prefix on the other read/write macros for consistency. 2012-07-03 20:55:36 +01:00
Alex Smith
cbfe5fcd17 Removed redundant x86 sources/headers. 2012-07-03 17:38:18 +01:00
Alex Smith
020a25ce46 Fixed x86_64 kernel compilation.
For now I've just put all the stub functions that are needed to link the
kernel into a file called stubs.cpp. I've not yet moved across the interrupt
handling code or the ELF64 relocation code to the x86 directory. Once those
have been moved I can get rid of the x86_64 headers/source directories.
2012-07-02 20:56:27 +01:00
Alex Smith
0897e314b7 Merged x86_64 headers into x86 headers.
Not many changes seeing as there's not much x86_64 stuff done yet. Small
differences are handled with ifdefs, large differences (descriptors.h,
struct iframe) have separate headers under arch/x86/32 and arch/x86/64.
2012-07-02 18:47:06 +01:00
Alex Smith
3403f23e81 Moved the common parts of arch_cpu.h between x86 and x86_64 to arch/common_x86/cpu.h. 2012-06-27 11:23:54 +01:00
Alex Smith
e5fc2bfcab Implemented long mode setup/switch code, the bootloader can now start the 64-bit kernel!
The setup procedure is fairly simple: create a 64-bit GDT and 64-bit page
tables that include all kernel mappings from the 32-bit address space, but at
the correct 64-bit address, then go through kernel_args and changes all virtual
addresses to 64-bit addresses, and finally switch to long mode and jump to the
kernel.
2012-06-26 11:08:21 +01:00
Alex Smith
f69dd487b1 Fixed x86 GCC2 build. 2012-06-25 13:28:28 +01:00
Alex Smith
6f6d78e877 Cleaned up ELF64 address handling.
* platform_allocate_elf_region() is removed, it is implemented in platform-
  independent code now (ELF*Class::AllocateRegion). For ELF64 it is now
  assumed that 64-bit addresses are mapped in the loader's 32-bit address space
  as (address - KERNEL_BASE_64BIT + KERNEL_BASE).
* mapped_delta field from preloaded_*_image removed, now handled compile-time
  using the ELF*Class::Map method.
* Also link the kernel with -z max-page-size=0x1000, removes the need for
  2MB alignment on the data segment (not going to map the kernel with large
  pages for the time being).
2012-06-25 13:00:50 +01:00
Alex Smith
d8efc6caf6 Changes to kernel_args to make it identical for x86 and x86_64.
* Added a FixedWidthPointer template class which uses 64-bit storage to hold
  a pointer. This is used in place of raw pointers in kernel_args.
* Added __attribute__((packed)) to kernel_args and all structures contained
  within it. This is necessary due to different alignment behaviour for
  32-bit and 64-bit compilation with GCC.
* With these changes, kernel_args will now come out the same size for both
  the x86_64 kernel and the loader, excluding the preloaded_image structure
  which has not yet been changed.
* Tested both an x86 GCC2 and GCC4 build, no problems caused by these changes.
2012-06-21 18:02:23 +01:00
Alex Smith
65ad1ba320 Made it possible to build the bootloader when targetting x86_64.
* x86_64 is using the existing *_ia32 boot platforms.
* Special flags are required when compiling the loader to get GCC to compile
  32-bit code. This adds a new set of rules for compiling boot code rather
  than using the kernel rules, which compile using the necessary flags.
* Some x86_64 private headers have been stubbed by #include'ing the x86
  versions. These will be replaced later.
2012-05-26 21:47:27 +01:00
Yongcong Du
45cf3294b2 x86: add cpuid feature 6 flags
Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
2012-04-22 21:03:57 +02:00
Yongcong Du
cc586f1655 x86: AMD C1E with no ARAT(Always Running APIC Timer) idle support
AMD C1E is a BIOS controlled C3 state. Certain processors families
may cut off TSC and the lapic timer when it is in a deep C state,
including C1E state, thus the cpu can't be waken up and system will hang.

This patch firstly adds the support of idle selection during boot. Then
it implements amdc1e_noarat_idle() routine which checks the MSR which
contains the C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27)  before
executing the halt instruction, then clear them once set.

However intel C1E doesn't has such problem. AMD C1E is a BIOS controlled
C3 state. The difference between C1E and C3 is that transition into C1E
is not initiated by the operating system. System will enter C1E state
automatically when both cores enters C1 state. As for intel C1E, it
means "reduce CPU voltage before entering corresponding Cx-state".

This patch may fix #8111, #3999, #7562, #7940 and #8060

Copied from the description of #3999:
>but for some reason I hit the power button instead of the reset one. And
>the boot continued!!
The reason is CPUs are waken up once power button is hit.

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
2012-04-14 18:18:29 +02:00
Alexander von Gluck IV
d387f54a23 x86: Change cpu feature flags to shifts
* No functional change
* Added missing ia64 emulation flag
* More closely matches AMD_EXT defines
* Easier to read compared to CPU documentation
2012-04-09 08:19:10 -05:00
Alexander von Gluck IV
3f1eed704a kernel: x86 SSE improvements
* Prepend x86_ to non-static x86 code
* Add x86_init_fpu function to kernel header
* Don't init fpu multiple times on smp systems
* Verified fpu is still started on smp and non-smp
* SSE code still generates general protection faults
  on smp systems though
2012-02-15 12:33:45 -06:00
Alexander von Gluck IV
8dd1e875c1 kernel: Fix FPU SSE + MMX instruction usage.
* Rename init_sse to init_fpu and handle FPU setup.
* Stop trying to set up FPU before VM init.
  We tried to set up the FPU before VM init, then
  set it up again after VM init with SSE extensions,
  this caused SSE and MMX applications to crash.
* Be more logical in FPU setup by detecting CPU flag prior
  to enabling FPU. (it's unlikely Haiku will run on
  a processor without a fpu... but lets be consistant)
* SSE2 gcc code now runs (faster even) without GPF
* tqh confirms his previously crashing mmx code now works
* The non-SSE FPU enable after VM init needs tested!
2012-01-20 15:06:01 -06:00
Michael Lotz
79f0056002 Fix virtual 8086 mode to properly account for TLS.
* The vm86 code or the code running in virtual 8086 mode may clobber the
  %fs register that we use for the CPU dependent thread local storage
  (TLS). Previously the vm86 code would simply restore %fs on exit, but
  this doesn't always work. If the thread got unscheduled while running
  in virtual 8086 mode and was then rescheduled on a different CPU, the
  vm86 exit code would restore the %fs register with the TLS value of
  the old CPU, causing anything using TLS in userland to crash later on.
  Instead we skip the %fs register restore on exit (as do the other
  interrupt return functions) and explicitly update the potentially
  clobbered %fs by calling x86_set_tls_context(). This will repopulate
  the %fs register with the TLS value for the right CPU. Fixes #8068.

* Made the static set_tls_context() into x86_set_tls_context() and made
  it available to others to faciliate the above.

* Sync the vm86 specific interrupt code with the changes from hrev23370,
  using the iframe pop macro to properly return. Previously what was
  pushed in int_bottom wasn't poped on return.

* Account for the time update macro resetting the in_kernel flag and
  reset it to 1, as we aren't actually returning to userland. This
  didn't cause any harm though as only the time tracking is using that
  flag so far.

* Some minor cleanup.
2011-11-25 16:10:19 +01:00
Jérôme Duval
11977ba83b added more cpu feature flags for x86
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42263 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-20 17:00:50 +00:00
Rene Gollent
73df2f2086 * Add validation of the RSDP checksums.
* If we detect ACPI 2.0 or higher, the spec says we should use the XSDT rather
  than the RSDT. Attempt to do so, falling back to the RSDT if the former fails
  to be mapped/validated.
* Refactored acpi_find_table into a templated version to account for the fact
  that the XSDT exports different pointer widths for its links to other tables
  than the RSDT.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42133 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-12 22:01:43 +00:00
Rene Gollent
6b0007fb77 Rename rsdt_length to xsdt_length to avoid future confusion.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42119 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-12 02:12:07 +00:00
Ingo Weinhold
24df65921b Merged signals-merge branch into trunk with the following changes:
* Reorganized the kernel locking related to threads and teams.
* We now discriminate correctly between process and thread signals. Signal
  handlers have been moved to teams. Fixes #5679.
* Implemented real-time signal support, including signal queuing, SA_SIGINFO
  support, sigqueue(), sigwaitinfo(), sigtimedwait(), waitid(), and the addition
  of the real-time signal range. Closes #1935 and #2695.
* Gave SIGBUS a separate signal number. Fixes #6704.
* Implemented <time.h> clock and timer support, and fixed/completed alarm() and
  [set]itimer(). Closes #5682.
* Implemented support for thread cancellation. Closes #5686.
* Moved send_signal() from <signal.h> to <OS.h>. Fixes #7554.
* Lots over smaller more or less related changes.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42116 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-12 00:00:23 +00:00
Michael Lotz
fb5a1727f4 * Implement interrupt source overrides. We install a relay interrupt handler
at the override entry to trigger the overriden vector so that we don't need
  to configure any additional redirections.
* Also configures the polarity and trigger modes found in the override entry.
* When disabling the legacy PIC, retrieve the enabled interrupts and re-enable
  then in the IO-APIC. This will for example make the ACPI SCI work that is
  installed prior to switching interrupt models. Through the transparent support
  for interrupt source overrides it'll also automatically relay from the old to
  the new vector.

This should make ACPI interrupts work and should support relocating the ISA PIT
from irq 0 to a different global system interrupt (usually 2) so that it can
still work when IO-APICs are in use.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41528 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-05-16 12:57:40 +00:00
Michael Lotz
8908aef9c2 * Don't map the IO-APIC within the bootloader. We don't need it to set up SMP
at all and, since there can be multiple IO-APICs, we need to do the
  enumeration again in the kernel anyway. Also only set ioapic_phys the first
  time we encounter an IO-APIC object as it looks cleaner when we arrive at the
  first IO-APIC default address.
* Therefore we don't have to worry about already mapped IO-APICs when
  enumerating them in the kernel.
* Also remove the mapping function that is now not used anymore.
* We still use the ioapic_phys field of the kernel args to determine whether
  there is an IO-APIC at all to avoid needlessly doing the enumeration again.

This fixes multi IO-APIC configurations, because before we would indeed map
the last IO-APIC listed in the MADT, but then in the kernel assumed we mapped
the first one. We'd end up with mapping the last listed IO-APIC twice and the
first IO-APIC never, always programming the last one when we actually targetted
the first one.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41476 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-05-13 16:31:31 +00:00