MSI: Use the effective APIC id of the boot CPU for the address destination.
* This should only affect systems where the CPU ids aren't sequential (mostly non Intel). * Fixes #9807.
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@ -24,7 +24,6 @@
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#define MSI_DELIVERY_MODE_EXT_INT 0x00000700
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void msi_init();
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bool msi_supported();
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status_t msi_allocate_vectors(uint8 count, uint8 *startVector,
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uint64 *address, uint16 *data);
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12
headers/private/kernel/arch/x86/msi_priv.h
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12
headers/private/kernel/arch/x86/msi_priv.h
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@ -0,0 +1,12 @@
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/*
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* Copyright 2010-2011, Michael Lotz, mmlr@mlotz.ch. All Rights Reserved.
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* Distributed under the terms of the MIT license.
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*/
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#ifndef _KERNEL_ARCH_x86_MSI_PRIV_H
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#define _KERNEL_ARCH_x86_MSI_PRIV_H
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void msi_init(kernel_args* args);
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#endif // _KERNEL_ARCH_x86_MSI_PRIV_H
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@ -24,7 +24,7 @@
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#include <arch/x86/apic.h>
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#include <arch/x86/descriptors.h>
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#include <arch/x86/msi.h>
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#include <arch/x86/msi_priv.h>
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#include <stdio.h>
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@ -411,7 +411,7 @@ arch_int_init_post_vm(kernel_args* args)
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status_t
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arch_int_init_io(kernel_args* args)
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{
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msi_init();
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msi_init(args);
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ioapic_init(args);
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return B_OK;
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}
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@ -12,10 +12,11 @@
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static bool sMSISupported = false;
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static uint32 sBootCPUAPICId = 0;
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void
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msi_init()
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msi_init(kernel_args* args)
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{
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if (!apic_available()) {
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dprintf("disabling msi due to missing apic\n");
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@ -24,6 +25,7 @@ msi_init()
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dprintf("msi support enabled\n");
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sMSISupported = true;
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sBootCPUAPICId = args->arch_args.cpu_apic_id[0];
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}
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@ -52,7 +54,7 @@ msi_allocate_vectors(uint8 count, uint8 *startVector, uint64 *address,
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}
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*startVector = (uint8)vector;
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*address = MSI_ADDRESS_BASE | (0 << MSI_DESTINATION_ID_SHIFT)
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*address = MSI_ADDRESS_BASE | (sBootCPUAPICId << MSI_DESTINATION_ID_SHIFT)
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| MSI_NO_REDIRECTION | MSI_DESTINATION_MODE_PHYSICAL;
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*data = MSI_TRIGGER_MODE_EDGE | MSI_DELIVERY_MODE_FIXED
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| ((uint16)vector + ARCH_INTERRUPT_BASE);
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