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added pre-NV10 screen location and size for completeness. NV05 (TNT2) is confirmed up and running speedy now :-)

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@11292 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen 2005-02-08 19:31:49 +00:00
parent e005dc757f
commit e7b37d0211
1 changed files with 8 additions and 1 deletions
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9
src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c
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@ -346,6 +346,7 @@ if(TNT1)
/* do a explicit engine reset */
ACCW(DEBUG0, 0x000001ff);
/* init some function blocks */
ACCW(DEBUG0, 0x1230c000);
ACCW(DEBUG1, 0x72111101);
@ -353,6 +354,7 @@ if(TNT1)
ACCW(DEBUG3, 0x0004ff31);
/* init OP methods */
ACCW(DEBUG3, 0x4004ff31);
/* disable all acceleration engine INT reguests */
ACCW(ACC_INTE, 0x00000000);
/* reset all acceration engine INT status bits */
@ -364,7 +366,12 @@ if(TNT1)
/* enable acceleration engine command FIFO */
ACCW(FIFO_EN, 0x00000001);
//fixme: offset and blimit registers are lacking!
/* setup location of active screen in framebuffer */
ACCW(OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
ACCW(OFFSET1, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
/* setup accesible card memory range */
ACCW(BLIMIT0, (si->ps.memory_size - 1));
ACCW(BLIMIT1, (si->ps.memory_size - 1));
/* pattern shape value = 8x8, 2 color */
//fixme: setting this here means that we don't need to provide the acc