From e7b37d0211aef8441e6eb87629b6122a00abdee2 Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Tue, 8 Feb 2005 19:31:49 +0000 Subject: [PATCH] added pre-NV10 screen location and size for completeness. NV05 (TNT2) is confirmed up and running speedy now :-) git-svn-id: file:///srv/svn/repos/haiku/trunk/current@11292 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c index a27c8ee595..dc7fd930a4 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c @@ -346,6 +346,7 @@ if(TNT1) /* do a explicit engine reset */ ACCW(DEBUG0, 0x000001ff); + /* init some function blocks */ ACCW(DEBUG0, 0x1230c000); ACCW(DEBUG1, 0x72111101); @@ -353,6 +354,7 @@ if(TNT1) ACCW(DEBUG3, 0x0004ff31); /* init OP methods */ ACCW(DEBUG3, 0x4004ff31); + /* disable all acceleration engine INT reguests */ ACCW(ACC_INTE, 0x00000000); /* reset all acceration engine INT status bits */ @@ -364,7 +366,12 @@ if(TNT1) /* enable acceleration engine command FIFO */ ACCW(FIFO_EN, 0x00000001); -//fixme: offset and blimit registers are lacking! + /* setup location of active screen in framebuffer */ + ACCW(OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); + ACCW(OFFSET1, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); + /* setup accesible card memory range */ + ACCW(BLIMIT0, (si->ps.memory_size - 1)); + ACCW(BLIMIT1, (si->ps.memory_size - 1)); /* pattern shape value = 8x8, 2 color */ //fixme: setting this here means that we don't need to provide the acc