added exec of another scriptcmd (indirect PLL)
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8688 a95241bf-73f2-0310-859d-f6bbb57e9c96
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12d8196092
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@ -22,6 +22,7 @@ static status_t pins2_read(uint8 *rom, uint32 offset, uint8 ram_cfg);
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static status_t pins3_6_read(uint8 *rom, uint32 offset, uint8 ram_cfg);
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static status_t coldstart_card(uint8* rom, uint16 init1, uint16 init2, uint16 init_size);
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static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size);
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static void log_pll(uint32 reg);
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/* Parse the BIOS PINS structure if there */
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status_t parse_pins ()
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@ -223,8 +224,6 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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switch (rom[adress])
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{
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case 0x59:
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LOG(8,("xxx cmd, skipping...\n"));
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*size -= 7;
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if (*size < 0)
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{
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@ -234,7 +233,30 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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break;
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}
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adress += 7;
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/* execute */
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adress += 1;
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reg = *((uint32*)(&(rom[adress])));
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adress += 4;
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data = *((uint16*)(&(rom[adress])));
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adress += 2;
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data2 = *((uint16*)(&(rom[data])));
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LOG(8,("cmd 'calculate indirect and set PLL 32bit REG $%08x for %fMHz'\n",
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reg, ((float)data2)));
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if (exec)
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{
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//fixme: setup core and RAM PLL calc routine(s), now (mis)using DAC's...
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display_mode target;
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float calced_clk;
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uint8 m, n, p;
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target.timing.pixel_clock = (data2 * 1000);
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nv_dac_pix_pll_find(target, &calced_clk, &m, &n, &p, 0);
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NV_REG32(reg) = ((p << 16) | (n << 8) | m);
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//fixme?
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/* program 2nd set N and M scalers if they exist (b31=1 enables them) */
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// if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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// DACW(PIXPLLC2, 0x80000401);
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}
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log_pll(reg);
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break;
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case 0x5a:
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LOG(8,("xxx cmd, skipping...\n"));
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@ -476,39 +498,7 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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// if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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// DACW(PIXPLLC2, 0x80000401);
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}
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if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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LOG(8,("\nINFO: ---WARNING: check/update PLL programming script code!!!"));
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switch (reg)
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{
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case NV32_MEMPLL:
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LOG(8,("\nINFO: ---Memory PLL accessed.\n\n"));
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break;
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case NV32_COREPLL:
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LOG(8,("\nINFO: ---Core PLL accessed.\n\n"));
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break;
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case NVDAC_PIXPLLC:
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LOG(8,("\nINFO: ---DAC1 PLL accessed.\n\n"));
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break;
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case NVDAC2_PIXPLLC:
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LOG(8,("\nINFO: ---DAC2 PLL accessed.\n\n"));
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break;
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/* unexpected cases, here for learning goals... */
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case NV32_MEMPLL2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to memory PLL accessed only!\n\n"));
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break;
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case NV32_COREPLL2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to core PLL accessed only!\n\n"));
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break;
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case NVDAC_PIXPLLC2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to DAC1 PLL accessed only!\n\n"));
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break;
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case NVDAC2_PIXPLLC2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to DAC2 PLL accessed only!\n\n"));
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break;
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default:
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LOG(8,("\nINFO: ---Unknown PLL accessed!\n\n"));
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break;
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}
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log_pll(reg);
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break;
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case 0x7a:
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*size -= 9;
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@ -540,6 +530,43 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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return result;
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}
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static void log_pll(uint32 reg)
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{
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if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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LOG(8,("\nINFO: ---WARNING: check/update PLL programming script code!!!"));
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switch (reg)
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{
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case NV32_MEMPLL:
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LOG(8,("\nINFO: ---Memory PLL accessed.\n\n"));
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break;
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case NV32_COREPLL:
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LOG(8,("\nINFO: ---Core PLL accessed.\n\n"));
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break;
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case NVDAC_PIXPLLC:
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LOG(8,("\nINFO: ---DAC1 PLL accessed.\n\n"));
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break;
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case NVDAC2_PIXPLLC:
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LOG(8,("\nINFO: ---DAC2 PLL accessed.\n\n"));
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break;
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/* unexpected cases, here for learning goals... */
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case NV32_MEMPLL2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to memory PLL accessed only!\n\n"));
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break;
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case NV32_COREPLL2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to core PLL accessed only!\n\n"));
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break;
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case NVDAC_PIXPLLC2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to DAC1 PLL accessed only!\n\n"));
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break;
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case NVDAC2_PIXPLLC2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to DAC2 PLL accessed only!\n\n"));
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break;
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default:
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LOG(8,("\nINFO: ---Unknown PLL accessed!\n\n"));
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break;
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}
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}
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/* fake_pins presumes the card was coldstarted by it's BIOS */
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void fake_pins(void)
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{
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