added execution of two more coldstart script commands, one doing CORE, RAM and DAC PLL programming.
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8687 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -211,7 +211,7 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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bool end = false;
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bool exec = true;
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uint8 index, byte, safe;
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uint32 reg, data, and_out, or_in;
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uint32 reg, data, data2, and_out, or_in, safe32;
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LOG(8,("\nINFO: executing type1 script at adress $%04x...\n", adress));
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@ -265,8 +265,6 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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adress += 1;
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break;
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case 0x65:
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LOG(8,("xxx cmd, skipping...\n"));
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*size -= 13;
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if (*size < 0)
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{
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@ -276,7 +274,25 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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break;
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}
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adress += 13;
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/* execute */
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adress += 1;
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reg = *((uint32*)(&(rom[adress])));
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adress += 4;
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data = *((uint32*)(&(rom[adress])));
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adress += 4;
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data2 = *((uint32*)(&(rom[adress])));
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adress += 4;
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LOG(8,("cmd 'WR 32bit REG $%08x with $%08x, then with $%08x'\n", reg, data, data2));
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if (exec)
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{
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/* alternate NV-specific access to PCI config space registers: */
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safe32 = NV_REG32(0x00001800 + NVCFG_AGPCMD);
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NV_REG32(0x00001800 + NVCFG_AGPCMD) = 0x00000000;
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NV_REG32(reg) = data;
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NV_REG32(reg) = data2;
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NV_REG32(0x00001800 + NVCFG_AGPCMD) = safe32;
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NV_REG32(0x00001800 + NVCFG_ROMSHADOW) &= 0xfffffffe;
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}
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break;
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case 0x66: /* new on NV11 */
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LOG(8,("NV11+ xxx cmd, skipping...\n"));
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@ -430,8 +446,6 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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}
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break;
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case 0x79:
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LOG(8,("xxx cmd, skipping...\n"));
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*size -= 7;
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if (*size < 0)
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{
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@ -441,7 +455,60 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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break;
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}
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adress += 7;
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/* execute */
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adress += 1;
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reg = *((uint32*)(&(rom[adress])));
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adress += 4;
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data = *((uint16*)(&(rom[adress])));
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adress += 2;
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LOG(8,("cmd 'calculate and set PLL 32bit REG $%08x for %fMHz'\n", reg, (data / 100.0)));
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if (exec)
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{
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//fixme: setup core and RAM PLL calc routine(s), now (mis)using DAC's...
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display_mode target;
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float calced_clk;
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uint8 m, n, p;
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target.timing.pixel_clock = (data * 10);
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nv_dac_pix_pll_find(target, &calced_clk, &m, &n, &p, 0);
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NV_REG32(reg) = ((p << 16) | (n << 8) | m);
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//fixme?
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/* program 2nd set N and M scalers if they exist (b31=1 enables them) */
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// if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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// DACW(PIXPLLC2, 0x80000401);
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}
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if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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LOG(8,("\nINFO: ---WARNING: check/update PLL programming script code!!!"));
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switch (reg)
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{
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case NV32_MEMPLL:
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LOG(8,("\nINFO: ---Memory PLL accessed.\n\n"));
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break;
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case NV32_COREPLL:
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LOG(8,("\nINFO: ---Core PLL accessed.\n\n"));
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break;
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case NVDAC_PIXPLLC:
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LOG(8,("\nINFO: ---DAC1 PLL accessed.\n\n"));
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break;
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case NVDAC2_PIXPLLC:
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LOG(8,("\nINFO: ---DAC2 PLL accessed.\n\n"));
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break;
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/* unexpected cases, here for learning goals... */
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case NV32_MEMPLL2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to memory PLL accessed only!\n\n"));
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break;
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case NV32_COREPLL2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to core PLL accessed only!\n\n"));
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break;
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case NVDAC_PIXPLLC2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to DAC1 PLL accessed only!\n\n"));
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break;
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case NVDAC2_PIXPLLC2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to DAC2 PLL accessed only!\n\n"));
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break;
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default:
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LOG(8,("\nINFO: ---Unknown PLL accessed!\n\n"));
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break;
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}
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break;
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case 0x7a:
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*size -= 9;
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