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start dma later, reduce timeouts

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22298 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Marcus Overhagen 2007-09-24 22:42:24 +00:00
parent 22c5a76dee
commit c32beda5c4
2 changed files with 17 additions and 6 deletions
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4
src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp
View File

@ -118,6 +118,10 @@ AHCIController::Init()
TRACE("cap: Supports External SATA: %s\n", (fRegs->cap & CAP_SXS) ? "yes" : "no");
TRACE("cap: Enclosure Management Supported: %s\n", (fRegs->cap & CAP_EMS) ? "yes" : "no");
TRACE("cap: Supports Command List Override: %s\n", (fRegs->cap & CAP_SCLO) ? "yes" : "no");
TRACE("cap: Supports Staggered Spin-up: %s\n", (fRegs->cap & CAP_SSS) ? "yes" : "no");
TRACE("cap: Supports Mechanical Presence Switch: %s\n", (fRegs->cap & CAP_SMPS) ? "yes" : "no");
TRACE("cap: Supports 64-bit Addressing: %s\n", (fRegs->cap & CAP_S64A) ? "yes" : "no");
TRACE("cap: Supports Native Command Queuing: %s\n", (fRegs->cap & CAP_SNCQ) ? "yes" : "no");
TRACE("cap: Supports SNotification Register: %s\n", (fRegs->cap & CAP_SSNTF) ? "yes" : "no");

19
src/add-ons/kernel/busses/scsi/ahci/ahci_port.cpp
View File

@ -70,6 +70,9 @@ AHCIPort::Init1()
// fRegs->serr = fRegs->serr;
fRegs->serr = 0xffffffff;
// power up device
fRegs->cmd |= PORT_CMD_POD;
// spin up device
fRegs->cmd |= PORT_CMD_SUD;
@ -172,9 +175,10 @@ AHCIPort::ResetDevice()
FlushPostedWrites();
snooze(10000);
fRegs->sctl &= ~0xf;
fRegs->serr = 0xffffffff;
FlushPostedWrites();
if (wait_until_set(&fRegs->ssts, 0x1, 6000000) < B_OK) {
if (wait_until_set(&fRegs->ssts, 0x1, 100000) < B_OK) {
TRACE("AHCIPort::ResetDevice port %d no device detected\n", fIndex);
}
@ -183,16 +187,19 @@ AHCIPort::ResetDevice()
fRegs->serr = 0xffffffff;
FlushPostedWrites();
// start DMA engine
fRegs->cmd |= PORT_CMD_ST;
FlushPostedWrites();
if (fRegs->ssts & 1) {
if (wait_until_set(&fRegs->ssts, 0x3, 1000000) < B_OK) {
if (wait_until_set(&fRegs->ssts, 0x3, 500000) < B_OK) {
TRACE("AHCIPort::ResetDevice port %d device present but no phy communication\n", fIndex);
}
}
// clear error bits
fRegs->serr = 0xffffffff;
// start DMA engine
fRegs->cmd |= PORT_CMD_ST;
FlushPostedWrites();
return B_OK;
}