From c32beda5c4072f95c506426cb2f2576225b4cecc Mon Sep 17 00:00:00 2001 From: Marcus Overhagen Date: Mon, 24 Sep 2007 22:42:24 +0000 Subject: [PATCH] start dma later, reduce timeouts git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22298 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- .../busses/scsi/ahci/ahci_controller.cpp | 4 ++++ .../kernel/busses/scsi/ahci/ahci_port.cpp | 19 +++++++++++++------ 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp b/src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp index b6de06a145..e6fb86518f 100644 --- a/src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp +++ b/src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp @@ -118,6 +118,10 @@ AHCIController::Init() TRACE("cap: Supports External SATA: %s\n", (fRegs->cap & CAP_SXS) ? "yes" : "no"); TRACE("cap: Enclosure Management Supported: %s\n", (fRegs->cap & CAP_EMS) ? "yes" : "no"); + TRACE("cap: Supports Command List Override: %s\n", (fRegs->cap & CAP_SCLO) ? "yes" : "no"); + TRACE("cap: Supports Staggered Spin-up: %s\n", (fRegs->cap & CAP_SSS) ? "yes" : "no"); + TRACE("cap: Supports Mechanical Presence Switch: %s\n", (fRegs->cap & CAP_SMPS) ? "yes" : "no"); + TRACE("cap: Supports 64-bit Addressing: %s\n", (fRegs->cap & CAP_S64A) ? "yes" : "no"); TRACE("cap: Supports Native Command Queuing: %s\n", (fRegs->cap & CAP_SNCQ) ? "yes" : "no"); TRACE("cap: Supports SNotification Register: %s\n", (fRegs->cap & CAP_SSNTF) ? "yes" : "no"); diff --git a/src/add-ons/kernel/busses/scsi/ahci/ahci_port.cpp b/src/add-ons/kernel/busses/scsi/ahci/ahci_port.cpp index 3b6bb81bbe..dd1f802460 100644 --- a/src/add-ons/kernel/busses/scsi/ahci/ahci_port.cpp +++ b/src/add-ons/kernel/busses/scsi/ahci/ahci_port.cpp @@ -70,6 +70,9 @@ AHCIPort::Init1() // fRegs->serr = fRegs->serr; fRegs->serr = 0xffffffff; + // power up device + fRegs->cmd |= PORT_CMD_POD; + // spin up device fRegs->cmd |= PORT_CMD_SUD; @@ -172,9 +175,10 @@ AHCIPort::ResetDevice() FlushPostedWrites(); snooze(10000); fRegs->sctl &= ~0xf; + fRegs->serr = 0xffffffff; FlushPostedWrites(); - if (wait_until_set(&fRegs->ssts, 0x1, 6000000) < B_OK) { + if (wait_until_set(&fRegs->ssts, 0x1, 100000) < B_OK) { TRACE("AHCIPort::ResetDevice port %d no device detected\n", fIndex); } @@ -183,16 +187,19 @@ AHCIPort::ResetDevice() fRegs->serr = 0xffffffff; FlushPostedWrites(); - // start DMA engine - fRegs->cmd |= PORT_CMD_ST; - FlushPostedWrites(); - if (fRegs->ssts & 1) { - if (wait_until_set(&fRegs->ssts, 0x3, 1000000) < B_OK) { + if (wait_until_set(&fRegs->ssts, 0x3, 500000) < B_OK) { TRACE("AHCIPort::ResetDevice port %d device present but no phy communication\n", fIndex); } } + // clear error bits + fRegs->serr = 0xffffffff; + + // start DMA engine + fRegs->cmd |= PORT_CMD_ST; + FlushPostedWrites(); + return B_OK; }