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fixed a minor error and some typos

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@1593 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Daniel Reinhold 2002-10-22 11:36:29 +00:00
parent 4fea1c8ff7
commit 87790d71e6
1 changed files with 16 additions and 16 deletions
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32
src/kernel/apps/cpuinfo/main.c
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@ -383,9 +383,9 @@ Intel_TLB_cache(cpuid_info *info)
// a particular cache type will display together. // a particular cache type will display together.
// //
// After the pass loop is finished, the slot array contains the indexes of all the // After the pass loop is finished, the slot array contains the indexes of all the
// table entries that apply to the host processor. Displaying the info merely a matter // table entries that apply to the host processor. Displaying the info is merely a matter
// of spinning thru the slot array and printing the text. The output is organized by // of spinning thru the slot array and printing the text. The output, however, is organized
// the cache types -- this technique *only* works because the TLB/Cache table has been // by the cache types -- this technique *only* works because the TLB/Cache table has been
// carefully arranged in that order. // carefully arranged in that order.
#define BIT_31_MASK (1 << 31) #define BIT_31_MASK (1 << 31)
@ -407,7 +407,7 @@ Intel_TLB_cache(cpuid_info *info)
indexOf[tab[n++].descriptor] = i++; indexOf[tab[n++].descriptor] = i++;
// pass loop: insert relevant table indexes into the slots array // pass loop: insert relevant table indexes into the slot array
i = 0; i = 0;
for (pass = 0; ; ++pass) { for (pass = 0; ; ++pass) {
get_cpuid(info, 2, 0); get_cpuid(info, 2, 0);
@ -418,27 +418,27 @@ Intel_TLB_cache(cpuid_info *info)
break; break;
reg >>= 8; // skip low byte reg >>= 8; // skip low byte
while ((db = (reg & 0xff))) for (; reg; reg >>= 8)
insert(slot, indexOf[db], i++), if ((db = (reg & 0xff)))
reg >>= 8; insert(slot, indexOf[db], i++);
reg = info->regs.ebx; // ebx reg = info->regs.ebx; // ebx
if ((reg & BIT_31_MASK) == 0) if ((reg & BIT_31_MASK) == 0)
while ((db = (reg & 0xff))) for (; reg; reg >>= 8)
insert(slot, indexOf[db], i++), if ((db = (reg & 0xff)))
reg >>= 8; insert(slot, indexOf[db], i++);
reg = info->regs.ecx; // ecx reg = info->regs.ecx; // ecx
if ((reg & BIT_31_MASK) == 0) if ((reg & BIT_31_MASK) == 0)
while ((db = (reg & 0xff))) for (; reg; reg >>= 8)
insert(slot, indexOf[db], i++), if ((db = (reg & 0xff)))
reg >>= 8; insert(slot, indexOf[db], i++);
reg = info->regs.edx; // edx reg = info->regs.edx; // edx
if ((reg & BIT_31_MASK) == 0) if ((reg & BIT_31_MASK) == 0)
while ((db = (reg & 0xff))) for (; reg; reg >>= 8)
insert(slot, indexOf[db], i++), if ((db = (reg & 0xff)))
reg >>= 8; insert(slot, indexOf[db], i++);
} }