intel_extreme: also set hw_cdclk on Broadwell
this needed for dp aux before skylake, only for DP A (eDP). should help with #17771 Change-Id: I4bdcca1fdc05294fb5b56c5c96164b6936a5881e Reviewed-on: https://review.haiku-os.org/c/haiku/+/5355 Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org> Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
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@ -923,6 +923,8 @@ struct intel_brightness_legacy {
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#define LCPLL_CTL 0x130040
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#define LCPLL_CLK_FREQ_MASK (3 << 26)
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#define LCPLL_CLK_FREQ_450 (0 << 26)
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#define LCPLL_CLK_FREQ_54O_BDW (1 << 26)
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#define LCPLL_CLK_FREQ_337_5_BDW (2 << 26)
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#define LCPLL_CD_SOURCE_FCLK (1 << 21)
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// display
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@ -879,7 +879,19 @@ intel_extreme_init(intel_info &info)
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info.shared_info->fdi_link_frequency = 0;
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}
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if (info.device_type.InGroup(INTEL_GROUP_HAS)) {
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if (info.device_type.InGroup(INTEL_GROUP_BDW)) {
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uint32 lcpll = read32(info, LCPLL_CTL);
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if ((lcpll & LCPLL_CD_SOURCE_FCLK) != 0)
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info.shared_info->hw_cdclk = 800000;
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else if ((lcpll & LCPLL_CLK_FREQ_MASK) == LCPLL_CLK_FREQ_450)
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info.shared_info->hw_cdclk = 450000;
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else if ((lcpll & LCPLL_CLK_FREQ_MASK) == LCPLL_CLK_FREQ_54O_BDW)
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info.shared_info->hw_cdclk = 540000;
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else if ((lcpll & LCPLL_CLK_FREQ_MASK) == LCPLL_CLK_FREQ_337_5_BDW)
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info.shared_info->hw_cdclk = 337500;
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else
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info.shared_info->hw_cdclk = 675000;
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} else if (info.device_type.InGroup(INTEL_GROUP_HAS)) {
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uint32 lcpll = read32(info, LCPLL_CTL);
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if ((lcpll & LCPLL_CD_SOURCE_FCLK) != 0)
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info.shared_info->hw_cdclk = 800000;
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