Enable PAE on all CPUs.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37106 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -143,9 +143,8 @@ struct X86PagingMethodPAE::ToPAESwitcher {
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TRACE("free virtual slot: %#" B_PRIxADDR ", PTE: %p\n",
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TRACE("free virtual slot: %#" B_PRIxADDR ", PTE: %p\n",
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fFreeVirtualSlot, fFreeVirtualSlotPTE);
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fFreeVirtualSlot, fFreeVirtualSlotPTE);
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// switch to PAE
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// enable PAE on all CPUs
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write_cr3((uint32)physicalPDPT);
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call_all_cpus_sync(&_EnablePAE, (void*)(addr_t)physicalPDPT);
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x86_write_cr4(x86_read_cr4() | IA32_CR4_PAE | IA32_CR4_GLOBAL_PAGES);
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// set return values
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// set return values
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_virtualPDPT = pdpt;
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_virtualPDPT = pdpt;
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@ -160,6 +159,12 @@ struct X86PagingMethodPAE::ToPAESwitcher {
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}
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}
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private:
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private:
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static void _EnablePAE(void* physicalPDPT, int cpu)
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{
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write_cr3((addr_t)physicalPDPT);
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x86_write_cr4(x86_read_cr4() | IA32_CR4_PAE | IA32_CR4_GLOBAL_PAGES);
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}
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void _TranslatePageTable(addr_t virtualBase)
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void _TranslatePageTable(addr_t virtualBase)
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{
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{
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page_table_entry* entry = &fPageHole[virtualBase / B_PAGE_SIZE];
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page_table_entry* entry = &fPageHole[virtualBase / B_PAGE_SIZE];
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