From 4d2b2dc4d2b9308d784ce2c1e90e4c0d04cd3d92 Mon Sep 17 00:00:00 2001 From: Ingo Weinhold Date: Sat, 12 Jun 2010 00:13:54 +0000 Subject: [PATCH] Enable PAE on all CPUs. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37106 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- .../kernel/arch/x86/paging/pae/X86PagingMethodPAE.cpp | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/system/kernel/arch/x86/paging/pae/X86PagingMethodPAE.cpp b/src/system/kernel/arch/x86/paging/pae/X86PagingMethodPAE.cpp index 41e637c626..6420418e46 100644 --- a/src/system/kernel/arch/x86/paging/pae/X86PagingMethodPAE.cpp +++ b/src/system/kernel/arch/x86/paging/pae/X86PagingMethodPAE.cpp @@ -143,9 +143,8 @@ struct X86PagingMethodPAE::ToPAESwitcher { TRACE("free virtual slot: %#" B_PRIxADDR ", PTE: %p\n", fFreeVirtualSlot, fFreeVirtualSlotPTE); - // switch to PAE - write_cr3((uint32)physicalPDPT); - x86_write_cr4(x86_read_cr4() | IA32_CR4_PAE | IA32_CR4_GLOBAL_PAGES); + // enable PAE on all CPUs + call_all_cpus_sync(&_EnablePAE, (void*)(addr_t)physicalPDPT); // set return values _virtualPDPT = pdpt; @@ -160,6 +159,12 @@ struct X86PagingMethodPAE::ToPAESwitcher { } private: + static void _EnablePAE(void* physicalPDPT, int cpu) + { + write_cr3((addr_t)physicalPDPT); + x86_write_cr4(x86_read_cr4() | IA32_CR4_PAE | IA32_CR4_GLOBAL_PAGES); + } + void _TranslatePageTable(addr_t virtualBase) { page_table_entry* entry = &fPageHole[virtualBase / B_PAGE_SIZE];