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No need for ppc code there. 

68030 invalidates only 1 long of a cache line each time.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22715 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
François Revol 2007-10-25 12:10:46 +00:00
parent 2e46156d87
commit 42b025bece
2 changed files with 17 additions and 4 deletions
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18
src/system/kernel/arch/m68k/arch_cpu.cpp
View File

@ -48,7 +48,7 @@ arch_cpu_init_post_modules(kernel_args *args)
return B_OK;
}
#define CACHELINE 32
#define CACHELINE 16
void
arch_cpu_sync_icache(void *address, size_t len)
@ -65,8 +65,20 @@ arch_cpu_sync_icache(void *address, size_t len)
asm volatile ("movec %%cacr,%0" : "=r"(cacr):);
cacr |= 0x00000004; /* ClearInstructionCacheEntry */
do {
asm volatile ("movec %0,%%caar" :: "r"(p));
asm volatile ("movec %0,%%cacr" :: "r"(cacr));
/* the 030 invalidates only 1 long of the cache line */
//XXX: what about 040 and 060 ?
asm volatile ("movec %0,%%caar\n" \
"movec %1,%%cacr\n" \
"addq.l #4,%0\n" \
"movec %0,%%caar\n" \
"movec %1,%%cacr\n" \
"addq.l #4,%0\n" \
"movec %0,%%caar\n" \
"movec %1,%%cacr\n" \
"addq.l #4,%0\n" \
"movec %0,%%caar\n" \
"movec %1,%%cacr\n" \
:: "r"(p), "r"(cacr));
p += CACHELINE;
} while ((l -= CACHELINE) > 0);
m68k_nop();

3
src/system/kernel/arch/m68k/arch_cpu_asm.S
View File

@ -7,6 +7,7 @@
.text
#if 0 /* PPC stuff ahead... */
/* uint32 get_sdr1(void);
*/
FUNCTION(get_sdr1):
@ -175,4 +176,4 @@ FUNCTION(reset_dbats):
FUNCTION(__eieio):
eieio
blr
#endif