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added yet another type2 coldstart scriptcmd.

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9476 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen 2004-10-24 11:27:05 +00:00
parent 40c2c00a34
commit 164cd8bcaa
1 changed files with 24 additions and 1 deletions
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25
src/add-ons/accelerants/nvidia/engine/nv_info.c
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@ -909,7 +909,7 @@ static status_t exec_type2_script(uint8* rom, uint16 adress, int16* size, PinsTa
} }
/* this routine is used for NV10 and later. It's tested on a GeForce2 MX400 (NV11), /* this routine is used for NV10 and later. It's tested on a GeForce2 MX400 (NV11),
* GeForce4 MX440 (NV18) and a GeForceFX 5200 (NV34). * GeForce4 MX440 (NV18), GeForce4 Ti4200 (NV28) and a GeForceFX 5200 (NV34).
* These cards coldstart perfectly. */ * These cards coldstart perfectly. */
static status_t exec_type2_script_mode(uint8* rom, uint16* adress, int16* size, PinsTables tabs, uint16 ram_tab, bool* exec) static status_t exec_type2_script_mode(uint8* rom, uint16* adress, int16* size, PinsTables tabs, uint16 ram_tab, bool* exec)
{ {
@ -1207,6 +1207,29 @@ static status_t exec_type2_script_mode(uint8* rom, uint16* adress, int16* size,
*adress += (size32 << 1); *adress += (size32 << 1);
} }
break; break;
case 0x61: /* new */
*size -= 4;
if (*size < 0)
{
LOG(8,("script size error, aborting!\n\n"));
end = true;
result = B_ERROR;
break;
}
/* execute */
*adress += 1;
reg = *((uint16*)(&(rom[*adress])));
*adress += 2;
byte = *((uint8*)(&(rom[*adress])));
*adress += 1;
LOG(8,("cmd 'WR ISA reg $%04x = $%02x'\n", reg, byte));
if (*exec)
{
translate_ISA_PCI(&reg);
NV_REG8(reg) = byte;
}
break;
case 0x62: /* new */ case 0x62: /* new */
*size -= 5; *size -= 5;
if (*size < 0) if (*size < 0)