53c671e26c
read and write compare register (controls cycle-driven periodic interrupt). Use cycle counter for microsecond time on mips3, but for now only on 3min motherboards (5000/150). the MAXINE baseboard microsecond counter is more stable and I don't ave no 5000/260 to test. XXX clkread() is a mess, it should be rewritten. XXX should add nanotime() to give inkernel nanosecond resolution, and then microtime() reworked to use nanotime(). |
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mips | ||
Makefile.inc |