NetBSD/sys/arch/cats
thorpej 4e990d9ccb Overhaul of the ARM cache code. This is mostly a simplification
pass.  Rather than providing a whole slew of cache operations that
aren't ever used, distill them down to some useful primitives:

	icache_sync_all         Synchronize I-cache
	icache_sync_range       Synchronize I-cache range

	dcache_wbinv_all        Write-back and Invalidate D-cache
	dcache_wbinv_range      Write-back and Invalidate D-cache range
	dcache_inv_range        Invalidate D-cache range
	dcache_wb_range         Write-back D-cache range

	idcache_wbinv_all       Write-back and Invalidate D-cache,
				Invalidate I-cache
	idcache_wbinv_range     Write-back and Invalidate D-cache,
				Invalidate I-cache range

Note: This does not yet include an overhaul of the actual asm files
that implement the primitives.  Instead, we've provided a safe default
for each CPU type, and the individual CPU types can now be optimized
one at a time.
2002-01-25 19:19:22 +00:00
..
cats Overhaul of the ARM cache code. This is mostly a simplification 2002-01-25 19:19:22 +00:00
compile
conf Update for new uhidev device attachment. 2001-12-28 17:37:01 +00:00
include Finish up the changes to get LOOSE_PROTOTYPES working for cats. 2002-01-07 22:58:07 +00:00
isa Finish up the changes to get LOOSE_PROTOTYPES working for cats. 2002-01-07 22:58:07 +00:00
Makefile