chs f73abf90fb on MP systems, if the firmware didn't configure the L2 cache
on the non-boot CPUs, copy the L2CR configuration from the boot CPU.
also, fix the code that configures the L2 cache so that it works at all.
while I'm here, use mfspr() and mtspr() instead of inline asms.
2002-08-06 06:20:08 +00:00
2002-08-03 05:53:01 +00:00
2002-08-06 03:39:44 +00:00
2002-08-05 08:05:03 +00:00
2002-08-04 21:49:23 +00:00
2002-07-09 06:36:16 +00:00
Description
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3.1 GiB
Languages
C 85.3%
Roff 7.2%
Assembly 3.1%
Shell 1.7%
Makefile 1.2%
Other 0.9%