fb846bde24
the QEC module. Adapt the QEC interrupt establish code to suit the needs of the `qe' device.
405 lines
10 KiB
C
405 lines
10 KiB
C
/* $NetBSD: qec.c,v 1.8 1999/01/17 20:47:50 pk Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <dev/sbus/sbusvar.h>
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#include <dev/sbus/qecreg.h>
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#include <dev/sbus/qecvar.h>
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static int qecprint __P((void *, const char *));
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static int qecmatch __P((struct device *, struct cfdata *, void *));
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static void qecattach __P((struct device *, struct device *, void *));
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void qec_init __P((struct qec_softc *));
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static int qec_bus_map __P((
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bus_space_tag_t,
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bus_type_t, /*slot*/
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bus_addr_t, /*offset*/
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bus_size_t, /*size*/
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int, /*flags*/
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vaddr_t, /*preferred virtual address */
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bus_space_handle_t *));
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static void *qec_intr_establish __P((
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bus_space_tag_t,
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int, /*level*/
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int, /*flags*/
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int (*) __P((void *)), /*handler*/
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void *)); /*arg*/
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struct cfattach qec_ca = {
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sizeof(struct qec_softc), qecmatch, qecattach
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};
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int
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qecprint(aux, busname)
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void *aux;
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const char *busname;
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{
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struct sbus_attach_args *sa = aux;
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bus_space_tag_t t = sa->sa_bustag;
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struct qec_softc *sc = t->cookie;
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sa->sa_bustag = sc->sc_bustag; /* XXX */
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sbus_print(aux, busname); /* XXX */
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sa->sa_bustag = t; /* XXX */
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return (UNCONF);
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}
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int
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qecmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct sbus_attach_args *sa = aux;
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return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
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}
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/*
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* Attach all the sub-devices we can find
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*/
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void
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qecattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct sbus_attach_args *sa = aux;
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struct qec_softc *sc = (void *)self;
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int node;
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int sbusburst;
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bus_space_tag_t sbt;
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bus_space_handle_t bh;
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struct bootpath *bp;
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int error;
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sc->sc_bustag = sa->sa_bustag;
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sc->sc_dmatag = sa->sa_dmatag;
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node = sa->sa_node;
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if (sa->sa_nreg < 2) {
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printf("%s: only %d register sets\n",
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self->dv_xname, sa->sa_nreg);
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return;
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}
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if (sbus_bus_map(sa->sa_bustag,
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sa->sa_reg[0].sbr_slot,
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sa->sa_reg[0].sbr_offset,
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sa->sa_reg[0].sbr_size,
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BUS_SPACE_MAP_LINEAR, 0, &sc->sc_regs) != 0) {
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printf("%s: attach: cannot map registers\n", self->dv_xname);
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return;
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}
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/*
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* This device's "register space 1" is just a buffer where the
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* Lance ring-buffers can be stored. Note the buffer's location
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* and size, so the child driver can pick them up.
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*/
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if (sbus_bus_map(sa->sa_bustag,
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sa->sa_reg[1].sbr_slot,
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sa->sa_reg[1].sbr_offset,
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sa->sa_reg[1].sbr_size,
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BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
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printf("%s: attach: cannot map registers\n", self->dv_xname);
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return;
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}
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sc->sc_buffer = (caddr_t)bh;
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sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].sbr_size;
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/* Get number of on-board channels */
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sc->sc_nchannels = getpropint(node, "#channels", -1);
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if (sc->sc_nchannels == -1) {
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printf(": no channels\n");
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return;
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}
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/*
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* Get transfer burst size from PROM
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*/
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sbusburst = ((struct sbus_softc *)parent)->sc_burst;
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if (sbusburst == 0)
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sbusburst = SBUS_BURST_32 - 1; /* 1->16 */
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sc->sc_burst = getpropint(node, "burst-sizes", -1);
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if (sc->sc_burst == -1)
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/* take SBus burst sizes */
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sc->sc_burst = sbusburst;
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/* Clamp at parent's burst sizes */
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sc->sc_burst &= sbusburst;
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sbus_establish(&sc->sc_sd, &sc->sc_dev);
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/*
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* Collect address translations from the OBP.
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*/
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error = getprop(node, "ranges", sizeof(struct sbus_range),
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&sc->sc_nrange, (void **)&sc->sc_range);
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switch (error) {
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case 0:
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break;
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case ENOENT:
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default:
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panic("%s: error getting ranges property", self->dv_xname);
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}
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/* Propagate bootpath */
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if (sa->sa_bp != NULL)
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bp = sa->sa_bp + 1;
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else
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bp = NULL;
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/* Allocate a bus tag */
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sbt = (bus_space_tag_t)
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malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
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if (sbt == NULL) {
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printf("%s: attach: out of memory\n", self->dv_xname);
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return;
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}
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bzero(sbt, sizeof *sbt);
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sbt->cookie = sc;
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sbt->parent = sc->sc_bustag;
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sbt->sparc_bus_map = qec_bus_map;
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sbt->sparc_intr_establish = qec_intr_establish;
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/*
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* Save interrupt information for use in our qec_intr_establish()
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* function below. Apparently, the intr level for the quad
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* ethernet board (qe) is stored in the QEC node rather then
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* separately in each of the QE nodes.
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*
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* XXX - qe.c should call bus_intr_establish() with `level = 0'..
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* XXX - maybe we should have our own attach args for all that.
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*/
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sc->sc_intr = sa->sa_intr;
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printf(": %dK memory\n", sc->sc_bufsiz / 1024);
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qec_init(sc);
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/* search through children */
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for (node = firstchild(node); node; node = nextsibling(node)) {
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struct sbus_attach_args sa;
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sbus_setup_attach_args((struct sbus_softc *)parent,
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sbt, sc->sc_dmatag, node, bp, &sa);
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(void)config_found(&sc->sc_dev, (void *)&sa, qecprint);
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sbus_destroy_attach_args(&sa);
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}
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}
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int
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qec_bus_map(t, btype, offset, size, flags, vaddr, hp)
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bus_space_tag_t t;
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bus_type_t btype;
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bus_addr_t offset;
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bus_size_t size;
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int flags;
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vaddr_t vaddr;
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bus_space_handle_t *hp;
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{
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struct qec_softc *sc = t->cookie;
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int slot = btype;
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int i;
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for (i = 0; i < sc->sc_nrange; i++) {
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bus_addr_t paddr;
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bus_type_t iospace;
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if (sc->sc_range[i].cspace != slot)
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continue;
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/* We've found the connection to the parent bus */
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paddr = sc->sc_range[i].poffset + offset;
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iospace = sc->sc_range[i].pspace;
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return (bus_space_map2(sc->sc_bustag, iospace, paddr,
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size, flags, vaddr, hp));
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}
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return (EINVAL);
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}
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void *
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qec_intr_establish(t, level, flags, handler, arg)
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bus_space_tag_t t;
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int level;
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int flags;
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int (*handler) __P((void *));
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void *arg;
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{
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struct qec_softc *sc = t->cookie;
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if (level == 0) {
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/*
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* qe.c calls bus_intr_establish() with `level = 0'
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* XXX - see also comment in qec_attach().
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*/
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if (sc->sc_intr == NULL) {
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printf("%s: warning: no interrupts\n",
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sc->sc_dev.dv_xname);
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return (NULL);
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}
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level = sc->sc_intr->sbi_pri;
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}
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return (bus_intr_establish(t->parent, level, flags, handler, arg));
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}
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void
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qec_init(sc)
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struct qec_softc *sc;
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{
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bus_space_tag_t t = sc->sc_bustag;
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bus_space_handle_t qr = sc->sc_regs;
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u_int32_t v, burst = 0;
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/*
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* Cut available buffer size into receive and transmit buffers.
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* XXX - should probably be done in be & qe driver...
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*/
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v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels;
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bus_space_write_4(t, qr, QEC_QRI_MSIZE, v);
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v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
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bus_space_write_4(t, qr, QEC_QRI_RSIZE, v);
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bus_space_write_4(t, qr, QEC_QRI_TSIZE, v);
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bus_space_write_4(t, qr, QEC_QRI_PSIZE, QEC_PSIZE_2048);
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if (sc->sc_burst & SBUS_BURST_64)
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burst = QEC_CTRL_B64;
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else if (sc->sc_burst & SBUS_BURST_32)
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burst = QEC_CTRL_B32;
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else
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burst = QEC_CTRL_B16;
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v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
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v = (v & QEC_CTRL_MODEMASK) | burst;
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bus_space_write_4(t, qr, QEC_QRI_CTRL, v);
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}
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/*
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* Common routine to initialize the QEC packet ring buffer.
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* Called from be & qe drivers.
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*/
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void
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qec_meminit(qr, pktbufsz)
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struct qec_ring *qr;
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unsigned int pktbufsz;
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{
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bus_addr_t txbufdma, rxbufdma;
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bus_addr_t dma;
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caddr_t p;
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unsigned int ntbuf, nrbuf, i;
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p = qr->rb_membase;
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dma = qr->rb_dmabase;
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ntbuf = qr->rb_ntbuf;
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nrbuf = qr->rb_nrbuf;
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/*
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* Allocate transmit descriptors
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*/
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qr->rb_txd = (struct qec_xd *)p;
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qr->rb_txddma = dma;
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p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
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dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
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/*
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* Allocate receive descriptors
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*/
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qr->rb_rxd = (struct qec_xd *)p;
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qr->rb_rxddma = dma;
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p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
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dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
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/*
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* Allocate transmit buffers
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*/
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qr->rb_txbuf = p;
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txbufdma = dma;
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p += ntbuf * pktbufsz;
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dma += ntbuf * pktbufsz;
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/*
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* Allocate receive buffers
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*/
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qr->rb_rxbuf = p;
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rxbufdma = dma;
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p += nrbuf * pktbufsz;
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dma += nrbuf * pktbufsz;
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/*
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* Initialize transmit buffer descriptors
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*/
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for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
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qr->rb_txd[i].xd_addr = (u_int32_t)
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(txbufdma + (i % ntbuf) * pktbufsz);
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qr->rb_txd[i].xd_flags = 0;
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}
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/*
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* Initialize receive buffer descriptors
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*/
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for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
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qr->rb_rxd[i].xd_addr = (u_int32_t)
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(rxbufdma + (i % nrbuf) * pktbufsz);
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qr->rb_rxd[i].xd_flags = (i < nrbuf)
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? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH)
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: 0;
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}
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qr->rb_tdhead = qr->rb_tdtail = 0;
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qr->rb_td_nbusy = 0;
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qr->rb_rdtail = 0;
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}
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