NetBSD/sys/arch/acorn32/podulebus
thorpej 4e990d9ccb Overhaul of the ARM cache code. This is mostly a simplification
pass.  Rather than providing a whole slew of cache operations that
aren't ever used, distill them down to some useful primitives:

	icache_sync_all         Synchronize I-cache
	icache_sync_range       Synchronize I-cache range

	dcache_wbinv_all        Write-back and Invalidate D-cache
	dcache_wbinv_range      Write-back and Invalidate D-cache range
	dcache_inv_range        Invalidate D-cache range
	dcache_wb_range         Write-back D-cache range

	idcache_wbinv_all       Write-back and Invalidate D-cache,
				Invalidate I-cache
	idcache_wbinv_range     Write-back and Invalidate D-cache,
				Invalidate I-cache range

Note: This does not yet include an overhaul of the actual asm files
that implement the primitives.  Instead, we've provided a safe default
for each CPU type, and the individual CPU types can now be optimized
one at a time.
2002-01-25 19:19:22 +00:00
..
amps.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
ampsreg.h
asc.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
ascreg.h
ascvar.h
cosc.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
coscreg.h
coscvar.h
csa.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
csc.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
cscreg.h
cscvar.h
esc.c Overhaul of the ARM cache code. This is mostly a simplification 2002-01-25 19:19:22 +00:00
escreg.h
escvar.h
icside.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
icside_io_asm.S
icsidereg.h
if_ie.c Use bpf_mtap(). 2002-01-16 05:56:54 +00:00
if_iereg.h
if_ne_pbus.c Use the MI DP83905 support for media selection on those cards that use it. 2001-12-16 00:23:59 +00:00
if_ne_pbusreg.h Use the MI DP83905 support for media selection on those cards that use it. 2001-12-16 00:23:59 +00:00
netslot.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
podulebus.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
podulebus.h
podulebus_io.c
podulebus_io_asm.S
ptsc.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
ptscreg.h
ptscvar.h
rapide.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
rapide_io_asm.S
rapidereg.h
sbic.c
sbicreg.h
sbicvar.h
sfas.c Overhaul of the ARM cache code. This is mostly a simplification 2002-01-25 19:19:22 +00:00
sfasreg.h
sfasvar.h
simide.c Use <machine/intr.h>, not <machine/irqhandler.h> 2001-11-27 00:53:11 +00:00
simide_io_asm.S
simidereg.h