732 lines
21 KiB
C
732 lines
21 KiB
C
/* $NetBSD: t_sh7706lan_space.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: t_sh7706lan_space.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/bus.h>
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#include <sys/intr.h>
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#include <uvm/uvm_extern.h>
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#include <sh3/bscreg.h>
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#include <sh3/devreg.h>
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#include <sh3/mmu.h>
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#include <sh3/pmap.h>
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#include <sh3/pte.h>
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#include <machine/cpu.h>
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/*
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* I/O bus space
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*/
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#define T_SH7706LAN_IOMEM_IO 0 /* space is i/o space */
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#define T_SH7706LAN_IOMEM_MEM 1 /* space is mem space */
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#define T_SH7706LAN_IOMEM_PCMCIA_IO 2 /* PCMCIA IO space */
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#define T_SH7706LAN_IOMEM_PCMCIA_MEM 3 /* PCMCIA Mem space */
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#define T_SH7706LAN_IOMEM_PCMCIA_ATT 4 /* PCMCIA Attr space */
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#define T_SH7706LAN_IOMEM_PCMCIA_8BIT 0x8000 /* PCMCIA BUS 8 BIT WIDTH */
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#define T_SH7706LAN_IOMEM_PCMCIA_IO8 \
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(T_SH7706LAN_IOMEM_PCMCIA_IO|T_SH7706LAN_IOMEM_PCMCIA_8BIT)
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#define T_SH7706LAN_IOMEM_PCMCIA_MEM8 \
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(T_SH7706LAN_IOMEM_PCMCIA_MEM|T_SH7706LAN_IOMEM_PCMCIA_8BIT)
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#define T_SH7706LAN_IOMEM_PCMCIA_ATT8 \
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(T_SH7706LAN_IOMEM_PCMCIA_ATT|T_SH7706LAN_IOMEM_PCMCIA_8BIT)
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int t_sh7706lan_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
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bus_space_handle_t *bshp);
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void t_sh7706lan_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
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int t_sh7706lan_iomem_subregion(void *v, bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
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int t_sh7706lan_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
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bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
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bus_addr_t *bpap, bus_space_handle_t *bshp);
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void t_sh7706lan_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
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static int t_sh7706lan_iomem_add_mapping(bus_addr_t, bus_size_t, int,
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bus_space_handle_t *);
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static int
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t_sh7706lan_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type,
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bus_space_handle_t *bshp)
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{
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u_long pa, endpa;
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vaddr_t va;
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pt_entry_t *pte;
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unsigned int m = 0;
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int io_type = type & ~T_SH7706LAN_IOMEM_PCMCIA_8BIT;
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pa = sh3_trunc_page(bpa);
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endpa = sh3_round_page(bpa + size);
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#ifdef DIAGNOSTIC
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if (endpa <= pa)
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panic("t_sh7706lan_iomem_add_mapping: overflow");
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#endif
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va = uvm_km_alloc(kernel_map, endpa - pa, 0, UVM_KMF_VAONLY);
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if (va == 0){
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printf("t_sh7706lan_iomem_add_mapping: nomem\n");
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return (ENOMEM);
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}
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*bshp = (bus_space_handle_t)(va + (bpa & PGOFSET));
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#define MODE(t, s) \
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((t) & T_SH7706LAN_IOMEM_PCMCIA_8BIT) ? \
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_PG_PCMCIA_ ## s ## 8 : \
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_PG_PCMCIA_ ## s ## 16
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switch (io_type) {
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default:
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panic("unknown pcmcia space.");
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/* NOTREACHED */
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case T_SH7706LAN_IOMEM_PCMCIA_IO:
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m = MODE(type, IO);
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break;
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case T_SH7706LAN_IOMEM_PCMCIA_MEM:
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m = MODE(type, MEM);
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break;
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case T_SH7706LAN_IOMEM_PCMCIA_ATT:
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m = MODE(type, ATTR);
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break;
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}
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#undef MODE
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for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
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pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, 0);
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pte = __pmap_kpte_lookup(va);
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KDASSERT(pte);
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*pte |= m; /* PTEA PCMCIA assistant bit */
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sh_tlb_update(0, va, *pte);
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}
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return (0);
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}
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int
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t_sh7706lan_iomem_map(void *v, bus_addr_t bpa, bus_size_t size,
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int flags, bus_space_handle_t *bshp)
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{
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bus_addr_t addr = SH3_PHYS_TO_P2SEG(bpa);
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int error;
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KASSERT((bpa & SH3_PHYS_MASK) == bpa);
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if (bpa < 0x14000000 || bpa >= 0x1c000000) {
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/* CS0,1,2,3,4,7 */
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*bshp = (bus_space_handle_t)addr;
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return (0);
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}
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/* CS5,6 */
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error = t_sh7706lan_iomem_add_mapping(addr, size, (int)(u_long)v, bshp);
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return (error);
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}
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void
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t_sh7706lan_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size)
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{
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u_long va, endva;
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bus_addr_t bpa;
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if (bsh >= SH3_P2SEG_BASE && bsh <= SH3_P2SEG_END) {
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/* maybe CS0,1,2,3,4,7 */
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return;
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}
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/* CS5,6 */
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va = sh3_trunc_page(bsh);
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endva = sh3_round_page(bsh + size);
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#ifdef DIAGNOSTIC
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if (endva <= va)
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panic("t_sh7706lan_io_unmap: overflow");
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#endif
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pmap_extract(pmap_kernel(), va, &bpa);
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bpa += bsh & PGOFSET;
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pmap_kremove(va, endva - va);
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/*
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* Free the kernel virtual mapping.
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*/
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uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
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}
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int
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t_sh7706lan_iomem_subregion(void *v, bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
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{
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*nbshp = bsh + offset;
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return (0);
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}
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int
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t_sh7706lan_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
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bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
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bus_addr_t *bpap, bus_space_handle_t *bshp)
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{
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*bshp = *bpap = rstart;
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return (0);
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}
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void
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t_sh7706lan_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
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{
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t_sh7706lan_iomem_unmap(v, bsh, size);
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}
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/*
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* on-board I/O bus space read/write
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*/
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uint8_t t_sh7706lan_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
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uint16_t t_sh7706lan_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
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uint32_t t_sh7706lan_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
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void t_sh7706lan_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_read_region_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_read_region_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_read_region_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
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uint8_t value);
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void t_sh7706lan_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
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uint16_t value);
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void t_sh7706lan_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
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uint32_t value);
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void t_sh7706lan_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint8_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint16_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint32_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_write_region_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint8_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_write_region_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint16_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_write_region_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint32_t *addr, bus_size_t count);
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void t_sh7706lan_iomem_set_multi_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
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uint8_t val, bus_size_t count);
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void t_sh7706lan_iomem_set_multi_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
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uint16_t val, bus_size_t count);
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void t_sh7706lan_iomem_set_multi_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
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uint32_t val, bus_size_t count);
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void t_sh7706lan_iomem_set_region_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t val, bus_size_t count);
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void t_sh7706lan_iomem_set_region_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t val, bus_size_t count);
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void t_sh7706lan_iomem_set_region_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t val, bus_size_t count);
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void t_sh7706lan_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
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bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
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void t_sh7706lan_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
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bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
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void t_sh7706lan_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
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bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
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struct _bus_space t_sh7706lan_bus_io =
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{
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.bs_cookie = (void *)T_SH7706LAN_IOMEM_PCMCIA_IO,
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.bs_map = t_sh7706lan_iomem_map,
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.bs_unmap = t_sh7706lan_iomem_unmap,
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.bs_subregion = t_sh7706lan_iomem_subregion,
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.bs_alloc = t_sh7706lan_iomem_alloc,
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.bs_free = t_sh7706lan_iomem_free,
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.bs_r_1 = t_sh7706lan_iomem_read_1,
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.bs_r_2 = t_sh7706lan_iomem_read_2,
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.bs_r_4 = t_sh7706lan_iomem_read_4,
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.bs_rm_1 = t_sh7706lan_iomem_read_multi_1,
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.bs_rm_2 = t_sh7706lan_iomem_read_multi_2,
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.bs_rm_4 = t_sh7706lan_iomem_read_multi_4,
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.bs_rr_1 = t_sh7706lan_iomem_read_region_1,
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.bs_rr_2 = t_sh7706lan_iomem_read_region_2,
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.bs_rr_4 = t_sh7706lan_iomem_read_region_4,
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.bs_rs_1 = t_sh7706lan_iomem_read_1,
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.bs_rs_2 = t_sh7706lan_iomem_read_2,
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.bs_rs_4 = t_sh7706lan_iomem_read_4,
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.bs_rms_1 = t_sh7706lan_iomem_read_multi_1,
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.bs_rms_2 = t_sh7706lan_iomem_read_multi_2,
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.bs_rms_4 = t_sh7706lan_iomem_read_multi_4,
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.bs_rrs_1 = t_sh7706lan_iomem_read_region_1,
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.bs_rrs_2 = t_sh7706lan_iomem_read_region_2,
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.bs_rrs_4 = t_sh7706lan_iomem_read_region_4,
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.bs_w_1 = t_sh7706lan_iomem_write_1,
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.bs_w_2 = t_sh7706lan_iomem_write_2,
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.bs_w_4 = t_sh7706lan_iomem_write_4,
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.bs_wm_1 = t_sh7706lan_iomem_write_multi_1,
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.bs_wm_2 = t_sh7706lan_iomem_write_multi_2,
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.bs_wm_4 = t_sh7706lan_iomem_write_multi_4,
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.bs_wr_1 = t_sh7706lan_iomem_write_region_1,
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.bs_wr_2 = t_sh7706lan_iomem_write_region_2,
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.bs_wr_4 = t_sh7706lan_iomem_write_region_4,
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.bs_ws_1 = t_sh7706lan_iomem_write_1,
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.bs_ws_2 = t_sh7706lan_iomem_write_2,
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.bs_ws_4 = t_sh7706lan_iomem_write_4,
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.bs_wms_1 = t_sh7706lan_iomem_write_multi_1,
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.bs_wms_2 = t_sh7706lan_iomem_write_multi_2,
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.bs_wms_4 = t_sh7706lan_iomem_write_multi_4,
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.bs_wrs_1 = t_sh7706lan_iomem_write_region_1,
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.bs_wrs_2 = t_sh7706lan_iomem_write_region_2,
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.bs_wrs_4 = t_sh7706lan_iomem_write_region_4,
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.bs_sm_1 = t_sh7706lan_iomem_set_multi_1,
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.bs_sm_2 = t_sh7706lan_iomem_set_multi_2,
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.bs_sm_4 = t_sh7706lan_iomem_set_multi_4,
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.bs_sr_1 = t_sh7706lan_iomem_set_region_1,
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.bs_sr_2 = t_sh7706lan_iomem_set_region_2,
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.bs_sr_4 = t_sh7706lan_iomem_set_region_4,
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.bs_c_1 = t_sh7706lan_iomem_copy_region_1,
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.bs_c_2 = t_sh7706lan_iomem_copy_region_2,
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.bs_c_4 = t_sh7706lan_iomem_copy_region_4,
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};
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struct _bus_space t_sh7706lan_bus_mem =
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{
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.bs_cookie = (void *)T_SH7706LAN_IOMEM_PCMCIA_MEM,
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.bs_map = t_sh7706lan_iomem_map,
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.bs_unmap = t_sh7706lan_iomem_unmap,
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.bs_subregion = t_sh7706lan_iomem_subregion,
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.bs_alloc = t_sh7706lan_iomem_alloc,
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.bs_free = t_sh7706lan_iomem_free,
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.bs_r_1 = t_sh7706lan_iomem_read_1,
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.bs_r_2 = t_sh7706lan_iomem_read_2,
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.bs_r_4 = t_sh7706lan_iomem_read_4,
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.bs_rm_1 = t_sh7706lan_iomem_read_multi_1,
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.bs_rm_2 = t_sh7706lan_iomem_read_multi_2,
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.bs_rm_4 = t_sh7706lan_iomem_read_multi_4,
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.bs_rr_1 = t_sh7706lan_iomem_read_region_1,
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.bs_rr_2 = t_sh7706lan_iomem_read_region_2,
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.bs_rr_4 = t_sh7706lan_iomem_read_region_4,
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.bs_rs_1 = t_sh7706lan_iomem_read_1,
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.bs_rs_2 = t_sh7706lan_iomem_read_2,
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.bs_rs_4 = t_sh7706lan_iomem_read_4,
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.bs_rms_1 = t_sh7706lan_iomem_read_multi_1,
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.bs_rms_2 = t_sh7706lan_iomem_read_multi_2,
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.bs_rms_4 = t_sh7706lan_iomem_read_multi_4,
|
|
|
|
.bs_rrs_1 = t_sh7706lan_iomem_read_region_1,
|
|
.bs_rrs_2 = t_sh7706lan_iomem_read_region_2,
|
|
.bs_rrs_4 = t_sh7706lan_iomem_read_region_4,
|
|
|
|
.bs_w_1 = t_sh7706lan_iomem_write_1,
|
|
.bs_w_2 = t_sh7706lan_iomem_write_2,
|
|
.bs_w_4 = t_sh7706lan_iomem_write_4,
|
|
|
|
.bs_wm_1 = t_sh7706lan_iomem_write_multi_1,
|
|
.bs_wm_2 = t_sh7706lan_iomem_write_multi_2,
|
|
.bs_wm_4 = t_sh7706lan_iomem_write_multi_4,
|
|
|
|
.bs_wr_1 = t_sh7706lan_iomem_write_region_1,
|
|
.bs_wr_2 = t_sh7706lan_iomem_write_region_2,
|
|
.bs_wr_4 = t_sh7706lan_iomem_write_region_4,
|
|
|
|
.bs_ws_1 = t_sh7706lan_iomem_write_1,
|
|
.bs_ws_2 = t_sh7706lan_iomem_write_2,
|
|
.bs_ws_4 = t_sh7706lan_iomem_write_4,
|
|
|
|
.bs_wms_1 = t_sh7706lan_iomem_write_multi_1,
|
|
.bs_wms_2 = t_sh7706lan_iomem_write_multi_2,
|
|
.bs_wms_4 = t_sh7706lan_iomem_write_multi_4,
|
|
|
|
.bs_wrs_1 = t_sh7706lan_iomem_write_region_1,
|
|
.bs_wrs_2 = t_sh7706lan_iomem_write_region_2,
|
|
.bs_wrs_4 = t_sh7706lan_iomem_write_region_4,
|
|
|
|
.bs_sm_1 = t_sh7706lan_iomem_set_multi_1,
|
|
.bs_sm_2 = t_sh7706lan_iomem_set_multi_2,
|
|
.bs_sm_4 = t_sh7706lan_iomem_set_multi_4,
|
|
|
|
.bs_sr_1 = t_sh7706lan_iomem_set_region_1,
|
|
.bs_sr_2 = t_sh7706lan_iomem_set_region_2,
|
|
.bs_sr_4 = t_sh7706lan_iomem_set_region_4,
|
|
|
|
.bs_c_1 = t_sh7706lan_iomem_copy_region_1,
|
|
.bs_c_2 = t_sh7706lan_iomem_copy_region_2,
|
|
.bs_c_4 = t_sh7706lan_iomem_copy_region_4,
|
|
};
|
|
|
|
/* read */
|
|
uint8_t
|
|
t_sh7706lan_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
|
|
{
|
|
|
|
return *(volatile uint8_t *)(bsh + offset);
|
|
}
|
|
|
|
uint16_t
|
|
t_sh7706lan_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
|
|
{
|
|
|
|
return (*(volatile uint8_t *)(bsh + offset)) |
|
|
(((uint16_t)*(volatile uint8_t *)(bsh + offset + 1)) << 8);
|
|
}
|
|
|
|
uint32_t
|
|
t_sh7706lan_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
|
|
{
|
|
|
|
return (*(volatile uint8_t *)(bsh + offset)) |
|
|
(((uint32_t)*(volatile uint8_t *)(bsh + offset + 1)) << 8) |
|
|
(((uint32_t)*(volatile uint8_t *)(bsh + offset + 2)) << 16) |
|
|
(((uint32_t)*(volatile uint8_t *)(bsh + offset + 3)) << 24);
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint8_t *addr, bus_size_t count)
|
|
{
|
|
volatile uint8_t *p = (void *)(bsh + offset);
|
|
|
|
while (count--) {
|
|
*addr++ = *p;
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint16_t *addr, bus_size_t count)
|
|
{
|
|
volatile uint8_t *src = (void *)(bsh + offset);
|
|
volatile uint8_t *dest = (void *)addr;
|
|
|
|
while (count--) {
|
|
*dest++ = src[0];
|
|
*dest++ = src[1];
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint32_t *addr, bus_size_t count)
|
|
{
|
|
volatile uint8_t *src = (void *)(bsh + offset);
|
|
volatile uint8_t *dest = (void *)addr;
|
|
|
|
while (count--) {
|
|
*dest++ = src[0];
|
|
*dest++ = src[1];
|
|
*dest++ = src[2];
|
|
*dest++ = src[3];
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_read_region_1(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint8_t *addr, bus_size_t count)
|
|
{
|
|
volatile uint8_t *p = (void *)(bsh + offset);
|
|
|
|
while (count--) {
|
|
*addr++ = *p++;
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_read_region_2(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint16_t *addr, bus_size_t count)
|
|
{
|
|
|
|
t_sh7706lan_iomem_read_region_1(v, bsh, offset, (void *)addr, count * 2);
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_read_region_4(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint32_t *addr, bus_size_t count)
|
|
{
|
|
|
|
t_sh7706lan_iomem_read_region_1(v, bsh, offset, (void *)addr, count * 4);
|
|
}
|
|
|
|
/* write */
|
|
void
|
|
t_sh7706lan_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
|
|
uint8_t value)
|
|
{
|
|
|
|
*(volatile uint8_t *)(bsh + offset) = value;
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
|
|
uint16_t value)
|
|
{
|
|
|
|
*(volatile uint8_t *)(bsh + offset) = value & 0xff;
|
|
*(volatile uint8_t *)(bsh + offset + 1) = (value >> 8) & 0xff;
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
|
|
uint32_t value)
|
|
{
|
|
|
|
*(volatile uint8_t *)(bsh + offset) = value & 0xff;
|
|
*(volatile uint8_t *)(bsh + offset + 1) = (value >> 8) & 0xff;
|
|
*(volatile uint8_t *)(bsh + offset + 2) = (value >> 16) & 0xff;
|
|
*(volatile uint8_t *)(bsh + offset + 3) = (value >> 24) & 0xff;
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, const uint8_t *addr, bus_size_t count)
|
|
{
|
|
volatile uint8_t *p = (void *)(bsh + offset);
|
|
|
|
while (count--) {
|
|
*p = *addr++;
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, const uint16_t *addr, bus_size_t count)
|
|
{
|
|
volatile uint8_t *dest = (void *)(bsh + offset);
|
|
volatile const uint8_t *src = (const void *)addr;
|
|
|
|
while (count--) {
|
|
dest[0] = *src++;
|
|
dest[1] = *src++;
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, const uint32_t *addr, bus_size_t count)
|
|
{
|
|
volatile uint8_t *dest = (void *)(bsh + offset);
|
|
volatile const uint8_t *src = (const void *)addr;
|
|
|
|
while (count--) {
|
|
dest[0] = *src++;
|
|
dest[1] = *src++;
|
|
dest[2] = *src++;
|
|
dest[3] = *src++;
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_write_region_1(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, const uint8_t *addr, bus_size_t count)
|
|
{
|
|
volatile uint8_t *p = (void *)(bsh + offset);
|
|
|
|
while (count--) {
|
|
*p++ = *addr++;
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_write_region_2(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, const uint16_t *addr, bus_size_t count)
|
|
{
|
|
|
|
t_sh7706lan_iomem_write_region_1(v, bsh, offset, (const void*)addr, count * 2);
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_write_region_4(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, const uint32_t *addr, bus_size_t count)
|
|
{
|
|
|
|
t_sh7706lan_iomem_write_region_1(v, bsh, offset, (const void*)addr, count * 4);
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_set_multi_1(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint8_t val, bus_size_t count)
|
|
{
|
|
volatile uint8_t *p = (void *)(bsh + offset);
|
|
|
|
while (count--) {
|
|
*p = val;
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_set_multi_2(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint16_t val, bus_size_t count)
|
|
{
|
|
volatile uint8_t *dest = (void *)(bsh + offset);
|
|
uint8_t src[2];
|
|
|
|
src[0] = val & 0xff;
|
|
src[1] = (val >> 8) & 0xff;
|
|
|
|
while (count--) {
|
|
dest[0] = src[0];
|
|
dest[1] = src[1];
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_set_multi_4(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint32_t val, bus_size_t count)
|
|
{
|
|
volatile uint8_t *dest = (void *)(bsh + offset);
|
|
uint8_t src[4];
|
|
|
|
src[0] = val & 0xff;
|
|
src[1] = (val >> 8) & 0xff;
|
|
src[2] = (val >> 16) & 0xff;
|
|
src[3] = (val >> 24) & 0xff;
|
|
|
|
while (count--) {
|
|
dest[0] = src[0];
|
|
dest[1] = src[1];
|
|
dest[2] = src[2];
|
|
dest[3] = src[3];
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_set_region_1(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint8_t val, bus_size_t count)
|
|
{
|
|
volatile uint8_t *addr = (void *)(bsh + offset);
|
|
|
|
while (count--) {
|
|
*addr++ = val;
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_set_region_2(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint16_t val, bus_size_t count)
|
|
{
|
|
volatile uint8_t *dest = (void *)(bsh + offset);
|
|
uint8_t src[2];
|
|
|
|
src[0] = val & 0xff;
|
|
src[1] = (val >> 8) & 0xff;
|
|
|
|
while (count--) {
|
|
*dest++ = src[0];
|
|
*dest++ = src[1];
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_set_region_4(void *v, bus_space_handle_t bsh,
|
|
bus_size_t offset, uint32_t val, bus_size_t count)
|
|
{
|
|
volatile uint8_t *dest = (void *)(bsh + offset);
|
|
uint8_t src[4];
|
|
|
|
src[0] = val & 0xff;
|
|
src[1] = (val >> 8) & 0xff;
|
|
src[2] = (val >> 16) & 0xff;
|
|
src[3] = (val >> 24) & 0xff;
|
|
|
|
while (count--) {
|
|
*dest++ = src[0];
|
|
*dest++ = src[1];
|
|
*dest++ = src[2];
|
|
*dest++ = src[3];
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
|
|
bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
|
|
{
|
|
volatile uint8_t *addr1 = (void *)(h1 + o1);
|
|
volatile uint8_t *addr2 = (void *)(h2 + o2);
|
|
|
|
if (addr1 >= addr2) { /* src after dest: copy forward */
|
|
while (count--) {
|
|
*addr2++ = *addr1++;
|
|
}
|
|
} else { /* dest after src: copy backwards */
|
|
addr1 += count - 1;
|
|
addr2 += count - 1;
|
|
while (count--) {
|
|
*addr2-- = *addr1--;
|
|
}
|
|
}
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
|
|
bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
|
|
{
|
|
|
|
t_sh7706lan_iomem_copy_region_1(v, h1, o1, h2, o2, count * 2);
|
|
}
|
|
|
|
void
|
|
t_sh7706lan_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
|
|
bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
|
|
{
|
|
|
|
t_sh7706lan_iomem_copy_region_1(v, h1, o1, h2, o2, count * 4);
|
|
}
|