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- AlphaNet MS104-SH4
- TAC T-SH7706LAN Ver.3
- TAC T-SH7706LSR Ver.1
This commit is contained in:
nonaka 2010-04-06 15:54:29 +00:00
parent 1d5998f903
commit 238763f6ce
88 changed files with 8850 additions and 258 deletions
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11
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# $NetBSD: Makefile,v 1.1 2010/04/06 15:54:31 nonaka Exp $
.include <bsd.own.mk>
.include "${NETBSDSRCDIR}/distrib/common/Makefile.distrib"
.if ${MACHINE_ARCH} == "sh3el"
SUBDIR= instkernel
.endif
TARGETS+= release
.include <bsd.subdir.mk>

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# $NetBSD: Makefile,v 1.1 2010/04/06 15:54:31 nonaka Exp $
SUBDIR= ramdisk .WAIT instkernel
TARGETS+= release
.include <bsd.subdir.mk>

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# $NetBSD: Makefile,v 1.1 2010/04/06 15:54:31 nonaka Exp $
.include <bsd.own.mk>
.include "${NETBSDSRCDIR}/distrib/common/Makefile.distrib"
RAMDISKDIR!= cd ${.CURDIR}/../ramdisk && ${PRINTOBJDIR}
RAMDISK= ${RAMDISKDIR}/ramdisk.fs
.if ${MACHINE_ARCH} == "sh3eb"
# Big endian platforms.
MDSETTARGETS=
.endif
.if ${MACHINE_ARCH} == "sh3el"
# Little endian platforms.
MDSETTARGETS= AP_MS104_SH4_INSTALL ${RAMDISK} - \
T_SH7706LAN_INSTALL ${RAMDISK} - \
T_SH7706LSR_INSTALL ${RAMDISK} -
.endif
MDSET_RELEASEDIR= installation/instkernel
MDSET_SUFFIXES.-= bin create-bin
create-bin= ${OBJCOPY} -O binary ${.TARGET:R} ${.TARGET}
.include "${DISTRIBDIR}/common/Makefile.mdset"
.include <bsd.prog.mk>

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# $NetBSD: Makefile,v 1.1 2010/04/06 15:54:31 nonaka Exp $
.include <bsd.own.mk>
.include "${NETBSDSRCDIR}/distrib/common/Makefile.distrib"
IMAGE= ramdisk.fs
IMAGESIZE= 2048k
MAKEFS_FLAGS= -f 15
WARNS= 1
DBG= -Os
CRUNCHBIN= ramdiskbin
LISTS= ${.CURDIR}/list ${DISTRIBDIR}/common/list.sysinst
MTREECONF= ${DISTRIBDIR}/common/mtree.common
IMAGEENDIAN= le
MAKEDEVTARGETS= ramdisk
IMAGEDEPENDS= ${CRUNCHBIN} \
disktab.preinstall dot.hdprofile dot.profile \
${NETBSDSRCDIR}/etc/group ${NETBSDSRCDIR}/etc/master.passwd \
${NETBSDSRCDIR}/etc/netconfig ${DISTRIBDIR}/common/protocols \
${DISTRIBDIR}/common/services
# Use stubs to eliminate some large stuff from libc
HACKSRC= ${DISTRIBDIR}/utils/libhack
.include "${HACKSRC}/Makefile.inc"
${CRUNCHBIN}: libhack.o
.include "${DISTRIBDIR}/common/Makefile.crunch"
.include "${DISTRIBDIR}/common/Makefile.dhcpcd"
.include "${DISTRIBDIR}/common/Makefile.makedev"
.include "${DISTRIBDIR}/common/Makefile.image"
release:
.include <bsd.prog.mk>

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distrib/evbsh3/instkernel/ramdisk/disktab.preinstall Normal file
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# $NetBSD: disktab.preinstall,v 1.1 2010/04/06 15:54:31 nonaka Exp $
#
# Disk geometry and partition layout tables.
# Key:
# dt controller type
# ty type of disk (fixed, removable, simulated)
# d[0-4] drive-type-dependent parameters
# ns #sectors/track
# nt #tracks/cylinder
# nc #cylinders/disk
# sc #sectors/cylinder, nc*nt default
# su #sectors/unit, sc*nc default
# se sector size, DEV_BSIZE default
# rm rpm, 3600 default
# sf supports bad144-style bad sector forwarding
# sk sector skew per track, default 0
# cs sector skew per cylinder, default 0
# hs headswitch time, default 0
# ts one-cylinder seek time, default 0
# il sector interleave (n:1), 1 default
# bs boot block size, default BBSIZE
# sb superblock size, default SBSIZE
# o[a-h] partition offsets in sectors
# p[a-h] partition sizes in sectors
# b[a-h] partition block sizes in bytes
# f[a-h] partition fragment sizes in bytes
# t[a-h] partition types (filesystem, swap, etc)
#
# All partition sizes reserve space for bad sector tables.
# (5 cylinders needed for maintenance + replacement sectors)
#

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# $NetBSD: dot.profile,v 1.1 2010/04/06 15:54:31 nonaka Exp $
#
# Copyright (c) 1997 Perry E. Metzger
# Copyright (c) 1994 Christopher G. Demetriou
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. All advertising materials mentioning features or use of this software
# must display the following acknowledgement:
# This product includes software developed for the
# NetBSD Project. See http://www.NetBSD.org/ for
# information about NetBSD.
# 4. The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# <<Id: LICENSE,v 1.2 2000/06/14 15:57:33 cgd Exp>>
PATH=/sbin:/bin:/usr/bin:/usr/sbin:/
export PATH
TERM=vt100
export TERM
HOME=/
export HOME
umask 022
ROOTDEV=/dev/md0a
if [ "X${DONEPROFILE}" = "X" ]; then
DONEPROFILE=YES
export DONEPROFILE
# set up some sane defaults
echo 'erase ^?, werase ^W, kill ^U, intr ^C'
stty newcrt werase ^W intr ^C kill ^U erase ^?
echo ''
# mount the ramdisk read write
mount -u $ROOTDEV /
# mount the kern_fs so that we can examine the dmesg state
mount -t kernfs /kern /kern
# run the installation or upgrade script.
sysinst
fi

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# $NetBSD: list,v 1.1 2010/04/06 15:54:31 nonaka Exp $
SRCDIRS bin sbin usr.bin/less usr.bin usr.sbin gnu/usr.bin
PROG bin/cat
PROG bin/chmod
PROG bin/cp
PROG bin/dd
PROG bin/df
PROG bin/ed
PROG bin/hostname
PROG bin/ln
PROG bin/ls
PROG bin/mkdir
PROG bin/mv
PROG bin/pax usr/bin/tar
PROG bin/pwd
PROG bin/rm
PROG bin/rmdir
PROG bin/sh
PROG bin/stty
PROG bin/sync
PROG sbin/dmesg
PROG sbin/disklabel
PROG sbin/fdisk
PROG sbin/fsck
PROG sbin/fsck_ffs
PROG sbin/ifconfig
PROG sbin/init
PROG sbin/mknod
PROG sbin/mount
PROG sbin/mount_ffs
PROG sbin/mount_kernfs
PROG sbin/mount_msdos
PROG sbin/mount_nfs
PROG sbin/newfs sbin/mount_mfs
PROG sbin/ping
PROG sbin/reboot sbin/halt
PROG sbin/restore sbin/rrestore
PROG sbin/route
PROG sbin/shutdown
PROG sbin/slattach
PROG sbin/swapctl
PROG sbin/umount
PROG usr/bin/ftp
PROG usr/bin/tip usr/bin/cu
PROG usr/bin/gzip usr/bin/gunzip usr/bin/gzcat
PROG usr/bin/less usr/bin/more
PROG usr/bin/sed
PROG usr/bin/tset
PROG usr/sbin/chown usr/bin/chgrp
PROG usr/sbin/chroot
SPECIAL ed srcdir distrib/utils/x_ed
SPECIAL ping srcdir distrib/utils/x_ping
SPECIAL ifconfig srcdir distrib/utils/x_ifconfig
SPECIAL route srcdir distrib/utils/x_route
SPECIAL umount srcdir distrib/utils/x_umount
LIBS libhack.o -lbz2 -ledit -lutil -lcurses -lterminfo -lrmt -lcrypt -ll -lm -lz -lprop
# init invokes the shell as -sh
ARGVLN sh -sh
# various files that we need in /etc for the install
COPY ${NETBSDSRCDIR}/etc/group etc/group
COPY ${NETBSDSRCDIR}/etc/master.passwd etc/master.passwd
COPY ${NETBSDSRCDIR}/etc/netconfig etc/netconfig
COPY ${NETBSDSRCDIR}/distrib/common/protocols etc/protocols
COPY ${NETBSDSRCDIR}/distrib/common/services etc/services
# the disktab explanation file
COPY ${CURDIR}/disktab.preinstall etc/disktab.preinstall
# and the installation tools
COPY ${CURDIR}/dot.profile .profile

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# $NetBSD: Makefile,v 1.1 2010/04/06 15:54:31 nonaka Exp $
#
# Makefile for evbsh3
#
.include "../../Makefile.inc"

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/* $NetBSD: md.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*
* Copyright 1997 Piermont Information Systems Inc.
* All rights reserved.
*
* Based on code written by Philip A. Nelson for Piermont Information
* Systems Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Piermont Information Systems Inc.
* 4. The name of Piermont Information Systems Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY PIERMONT INFORMATION SYSTEMS INC. ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL PIERMONT INFORMATION SYSTEMS INC. BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <sys/types.h>
#include <sys/disklabel.h>
#include <sys/ioctl.h>
#include <sys/param.h>
#include <stdio.h>
#include <curses.h>
#include <unistd.h>
#include <fcntl.h>
#include <util.h>
#include "defs.h"
#include "md.h"
#include "msg_defs.h"
#include "menu_defs.h"
int
md_get_info(void)
{
struct disklabel disklabel;
int fd;
char dev_name[100];
snprintf(dev_name, 100, "/dev/r%s%c", diskdev, 'a' + getrawpartition());
fd = open(dev_name, O_RDONLY, 0);
if (fd < 0) {
endwin();
fprintf (stderr, "Can't open %s\n", dev_name);
exit(1);
}
if (ioctl(fd, DIOCGDINFO, &disklabel) == -1) {
endwin();
fprintf (stderr, "Can't read disklabel on %s.\n", dev_name);
close(fd);
exit(1);
}
close(fd);
dlcyl = disklabel.d_ncylinders;
dlhead = disklabel.d_ntracks;
dlsec = disklabel.d_nsectors;
sectorsize = disklabel.d_secsize;
dlcylsize = disklabel.d_secpercyl;
/*
* Compute whole disk size. Take max of (dlcyl*dlhead*dlsec)
* and secperunit, just in case the disk is already labelled.
* (If our new label's RAW_PART size ends up smaller than the
* in-core RAW_PART size value, updating the label will fail.)
*/
dlsize = dlcyl * dlhead * dlsec;
if (disklabel.d_secperunit > dlsize)
dlsize = disklabel.d_secperunit;
return 1;
}
/*
* hook called before writing new disklabel.
*/
int
md_pre_disklabel(void)
{
return 0;
}
/*
* hook called after writing disklabel to new target disk.
*/
int
md_post_disklabel(void)
{
return 0;
}
/*
* MD hook called after upgrade() or install() has finished setting
* up the target disk but immediately before the user is given the
* ``disks are now set up'' message, so that if power fails, they can
* continue installation by booting the target disk and doing an
* `upgrade'.
*/
int
md_post_newfs(void)
{
return 0;
}
int
md_make_bsd_partitions(void)
{
return make_bsd_partitions();
}
/*
* any additional partition validataion
*/
int
md_check_partitions(void)
{
return 1;
}
/* Upgrade support */
int
md_update(void)
{
endwin();
md_post_newfs();
wrefresh(curscr);
wmove(stdscr, 0, 0);
wclear(stdscr);
wrefresh(stdscr);
return 1;
}
void
md_cleanup_install(void)
{
enable_rc_conf();
}
int
md_pre_update(void)
{
return 1;
}
void
md_init(void)
{
}
void
md_init_set_status(int minimal)
{
(void)minimal;
}
int
md_post_extract(void)
{
return 0;
}

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/* $NetBSD: md.h,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*
* Copyright 1997 Piermont Information Systems Inc.
* All rights reserved.
*
* Based on code written by Philip A. Nelson for Piermont Information
* Systems Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Piermont Information Systems Inc.
* 4. The name of Piermont Information Systems Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY PIERMONT INFORMATION SYSTEMS INC. ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL PIERMONT INFORMATION SYSTEMS INC. BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* Symbolic names for disk partitions
*/
#include <machine/disklabel.h>
#define PART_ROOT PART_A
#define PART_SWAP PART_B
#define PART_RAW RAW_PART
#define PART_USR PART_D
#define PART_FIRST_FREE PART_D
#define DEFROOTSIZE 200 /* Default root size */
#define XNEEDMB 100 /* Extra megs for full X installation */
#define SET_KERNEL_1_NAME "kern-T_SH7706LAN"
/*
* Machine-specific command to write a new label to a disk.
* If not defined, we assume the port does not support disklabels and
* the hand-edited disklabel will NOT be written by MI code.
* ews4800mips stores disklabel and EWS-UX compatible PDINFO+VTOC.
* Don't use -r option.
*/
#define DISKLABEL_CMD "disklabel -w -r"

1
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/* $NetBSD: menus.md.en,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */

1
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/* $NetBSD: menus.md.fr,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */

1
distrib/utils/sysinst/arch/evbsh3/menus.md.pl Normal file
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/* $NetBSD: menus.md.pl,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */

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/* $NetBSD: msg.md.de,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*
* Copyright 1997 Piermont Information Systems Inc.
* All rights reserved.
*
* Based on code written by Philip A. Nelson for Piermont Information
* Systems Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Piermont Information Systems Inc.
* 4. The name of Piermont Information Systems Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY PIERMONT INFORMATION SYSTEMS INC. ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL PIERMONT INFORMATION SYSTEMS INC. BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* evbsh3 machine dependent messages, German */
message md_hello
{
}
message set_kernel_1
{Kernel (T-SH7706LAN)}

48
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/* $NetBSD: msg.md.en,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*
* Copyright 1997 Piermont Information Systems Inc.
* All rights reserved.
*
* Based on code written by Philip A. Nelson for Piermont Information
* Systems Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Piermont Information Systems Inc.
* 4. The name of Piermont Information Systems Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY PIERMONT INFORMATION SYSTEMS INC. ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL PIERMONT INFORMATION SYSTEMS INC. BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* evbsh3 machine dependent massages, English */
message md_hello
{
}
message set_kernel_1
{Kernel (T-SH7706LAN)}

48
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/* $NetBSD: msg.md.es,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*
* Copyright 1997 Piermont Information Systems Inc.
* All rights reserved.
*
* Based on code written by Philip A. Nelson for Piermont Information
* Systems Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Piermont Information Systems Inc.
* 4. The name of Piermont Information Systems Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY PIERMONT INFORMATION SYSTEMS INC. ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL PIERMONT INFORMATION SYSTEMS INC. BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* evbsh3 machine dependent messages, Spanish */
message md_hello
{
}
message set_kernel_1
{N?cleo (T-SH7706LAN)}

48
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/* $NetBSD: msg.md.fr,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*
* Copyright 1997 Piermont Information Systems Inc.
* All rights reserved.
*
* Based on code written by Philip A. Nelson for Piermont Information
* Systems Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Piermont Information Systems Inc.
* 4. The name of Piermont Information Systems Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY PIERMONT INFORMATION SYSTEMS INC. ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL PIERMONT INFORMATION SYSTEMS INC. BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* evbsh3 machine dependent messages, French */
message md_hello
{
}
message set_kernel_1
{Kernel (T-SH7706LAN)}

48
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/* $NetBSD: msg.md.pl,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*
* Copyright 1997 Piermont Information Systems Inc.
* All rights reserved.
*
* Based on code written by Philip A. Nelson for Piermont Information
* Systems Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Piermont Information Systems Inc.
* 4. The name of Piermont Information Systems Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY PIERMONT INFORMATION SYSTEMS INC. ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL PIERMONT INFORMATION SYSTEMS INC. BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* evbsh3 machine dependent messages, Polish */
message md_hello
{
}
message set_kernel_1
{Kernel (T-SH7706LAN)}

5
etc/etc.evbsh3/MAKEDEV.conf
View File

@ -1,13 +1,14 @@
# $NetBSD: MAKEDEV.conf,v 1.5 2008/09/13 11:46:18 tsutsui Exp $
# $NetBSD: MAKEDEV.conf,v 1.6 2010/04/06 15:54:31 nonaka Exp $
all_md)
makedev tty0 tty1
makedev audio
makedev cfs
makedev ld0 wd0
;;
ramdisk)
makedev std md0
makedev std md0 ld0 wd0
makedev tty0 tty1 opty
makedev bpf tun0 tun1 ipl
;;

17
etc/etc.evbsh3/Makefile.inc Normal file
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@ -0,0 +1,17 @@
# $NetBSD: Makefile.inc,v 1.1 2010/04/06 15:54:31 nonaka Exp $
.if ${MACHINE_ARCH} == "sh3eb"
KERNEL_SETS+= COMPUTEX7750 COMPUTEXEVB CQREEKSH3 KZSH401
BUILD_KERNELS+=
.endif
.if ${MACHINE_ARCH} == "sh3el"
KERNEL_SETS+= AP_MS104_SH4 T_SH7706LAN T_SH7706LSR
KERNEL_SUFFIXES=bin
BUILD_KERNELS+= AP_MS104_SH4_INSTALL T_SH7706LAN_INSTALL T_SH7706LSR_INSTALL
.endif
INSTALLATION_DIRS+= installation/instkernel
# evbsh3 specific distrib stuff
snap_md_post:
${MAKESUMS} -t ${RELEASEDIR}/${RELEASEMACHINEDIR}/installation/instkernel '*.*'

164
sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4.c Normal file
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/* $NetBSD: ap_ms104_sh4.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2009 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ap_ms104_sh4.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/intr.h>
#include <sh3/devreg.h>
#include <sh3/pfcreg.h>
#include <sh3/exception.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4reg.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4var.h>
static int gpio_intr(void *arg);
struct gpio_intrhand {
int ih_irq;
int (*ih_func)(void *);
void *ih_arg;
} gpio_intr_func_table[16];
void
machine_init(void)
{
extintr_init();
gpio_intr_init();
}
void
gpio_intr_init(void)
{
uint32_t reg;
_reg_write_2(SH4_GPIOIC, 0);
_reg_write_2(SH4_PDTRA, 0);
_reg_write_4(SH4_PCTRA, 0);
_reg_write_2(SH4_PDTRB, 0);
_reg_write_4(SH4_PCTRB, 0);
(void) intc_intr_establish(SH4_INTEVT_GPIO, IST_LEVEL, IPL_TTY,
gpio_intr, NULL);
/* setup for pc-card */
_reg_write_2(SH4_PDTRA, (1 << GPIO_PIN_CARD_PON)
| (1 << GPIO_PIN_CARD_RESET)
| (1 << GPIO_PIN_CARD_ENABLE)); /* disable */
reg = _reg_read_4(SH4_PCTRA);
reg &= ~(3 << (GPIO_PIN_CARD_CD * 2)); /* input */
reg &= ~(3 << (GPIO_PIN_CARD_PON * 2));
reg |= (1 << (GPIO_PIN_CARD_PON * 2)); /* output */
reg &= ~(3 << (GPIO_PIN_CARD_RESET * 2));
reg |= (1 << (GPIO_PIN_CARD_RESET * 2)); /* output */
reg &= ~(3 << (GPIO_PIN_CARD_ENABLE * 2));
reg |= (1 << (GPIO_PIN_CARD_ENABLE * 2)); /* output */
_reg_write_4(SH4_PCTRA, reg);
}
void *
gpio_intr_establish(int pin, int (*ih_func)(void *), void *ih_arg)
{
uint32_t reg;
int s;
KASSERT(pin >= 0 && pin <= 15);
KASSERT(gpio_intr_func_table[pin].ih_func == NULL);
KASSERT((_reg_read_4(SH4_PCTRA) & (1 << (pin * 2))) == 0); /*input*/
s = splhigh();
/* install interrupt handler */
gpio_intr_func_table[pin].ih_irq = pin;
gpio_intr_func_table[pin].ih_func = ih_func;
gpio_intr_func_table[pin].ih_arg = ih_arg;
/* enable gpio interrupt */
reg = _reg_read_2(SH4_GPIOIC);
reg |= 1 << pin;
_reg_write_2(SH4_GPIOIC, reg);
splx(s);
return &gpio_intr_func_table[pin];
}
void
gpior_intr_disestablish(void *cookie)
{
struct gpio_intrhand *ih = cookie;
int pin = ih->ih_irq;
uint16_t reg;
int s;
KASSERT(pin >= 0 && pin <= 15);
s = splhigh();
/* disable gpio interrupt */
reg = _reg_read_2(SH4_GPIOIC);
reg &= ~(1 << pin);
_reg_write_2(SH4_GPIOIC, reg);
/* deinstall interrupt handler */
gpio_intr_func_table[pin].ih_irq = 0;
gpio_intr_func_table[pin].ih_func = NULL;
gpio_intr_func_table[pin].ih_arg = NULL;
splx(s);
}
/*ARGSUSED*/
static int
gpio_intr(void *arg)
{
struct gpio_intrhand *ih;
uint32_t reg;
int retval = 0;
int pin;
reg = _reg_read_4(SH4_PCTRA);
for (pin = 0; pin < 16; pin++) {
if (reg & (1 << pin)) {
ih = &gpio_intr_func_table[pin];
if (ih->ih_func != NULL) {
retval |= (*ih->ih_func)(ih->ih_arg);
} else {
uint16_t r;
r = _reg_read_2(SH4_GPIOIC);
r &= ~(1 << pin);
_reg_write_2(SH4_GPIOIC, r);
}
}
}
return retval;
}

292
sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_intr.c Normal file
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/* $NetBSD: ap_ms104_sh4_intr.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2009 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ap_ms104_sh4_intr.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/device.h>
#include <sh3/devreg.h>
#include <sh3/exception.h>
#include <machine/intr.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4reg.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4var.h>
#define _N_EXTINTR 16
struct intrhand {
int (*ih_fun)(void *);
void *ih_arg;
struct intrhand *ih_next;
int ih_enable;
int ih_level;
int ih_irq;
struct evcnt ih_evcnt;
};
struct extintr_handler {
void *eih_func;
struct intrhand *eih_ih;
int eih_nih;
};
static struct extintr_handler extintr_handler[_N_EXTINTR];
static const char *extintr_names[_N_EXTINTR] = {
"irq0", "irq1", "irq2", "irq3",
"irq4", "irq5", "irq6", "irq7",
"irq8", "irq9", "irq10", "irq11",
"irq12", "irq13", "irq14", "irq15"
};
static int fakeintr(void *arg);
static int extintr_intr_handler(void *arg);
void
extintr_init(void)
{
_reg_write_1(EXTINTR_MASK1, 0);
_reg_write_1(EXTINTR_MASK2, 0);
_reg_write_1(EXTINTR_MASK3, 0);
_reg_write_1(EXTINTR_MASK4, 0);
}
/*ARGSUSED*/
static int
fakeintr(void *arg)
{
return 0;
}
void *
extintr_establish(int irq, int trigger, int level,
int (*ih_fun)(void *), void *ih_arg)
{
static struct intrhand fakehand = {fakeintr};
struct extintr_handler *eih;
struct intrhand **p, *q, *ih;
const char *name;
int evtcode;
int s;
KDASSERT(irq >= 1 && irq <= 14);
ih = malloc(sizeof(*ih), M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
if (ih == NULL)
panic("intr_establish: can't malloc handler info");
s = _cpu_intr_suspend();
switch (level) {
default:
#if defined(DEBUG)
panic("extintr_establish: unknown level %d", level);
/*NOTREACHED*/
#endif
case IPL_VM:
break;
}
eih = &extintr_handler[irq];
if (eih->eih_func == NULL) {
evtcode = 0x200 + (irq << 5);
eih->eih_func = intc_intr_establish(evtcode, trigger, level,
extintr_intr_handler, eih);
}
/*
* Figure out where to put the handler.
* This is O(N^2), but we want to preserve the order, and N is
* generally small.
*/
for (p = &eih->eih_ih; (q = *p) != NULL; p = &q->ih_next)
continue;
/*
* Actually install a fake handler momentarily, since we might be doing
* this with interrupts enabled and don't want the real routine called
* until masking is set up.
*/
fakehand.ih_level = level;
*p = &fakehand;
/*
* Poke the real handler in now.
*/
memset(ih, 0, sizeof(*ih));
ih->ih_fun = ih_fun;
ih->ih_arg = ih_arg;
ih->ih_next = NULL;
ih->ih_enable = 1;
ih->ih_level = level;
ih->ih_irq = irq;
name = extintr_names[irq];
evcnt_attach_dynamic(&ih->ih_evcnt, EVCNT_TYPE_INTR, NULL, "ext", name);
*p = ih;
if (++eih->eih_nih == 1) {
uint8_t reg;
/* Unmask interrupt */
switch (irq) {
case 1: case 2:
reg = _reg_read_1(EXTINTR_MASK4);
reg |= 1 << (2 - irq);
_reg_write_1(EXTINTR_MASK4, reg);
break;
case 3: case 4: case 5: case 6:
reg = _reg_read_1(EXTINTR_MASK3);
reg |= 1 << (6 - irq);
_reg_write_1(EXTINTR_MASK3, reg);
break;
case 7: case 8: case 9: case 10:
reg = _reg_read_1(EXTINTR_MASK2);
reg |= 1 << (10 - irq);
_reg_write_1(EXTINTR_MASK2, reg);
break;
case 11: case 12: case 13: case 14:
reg = _reg_read_1(EXTINTR_MASK1);
reg |= 1 << (14 - irq);
_reg_write_1(EXTINTR_MASK1, reg);
break;
default:
panic("unknown irq%d\n", irq);
/*NOTREACHED*/
break;
}
}
splx(s);
return (ih);
}
void
extintr_disestablish(void *cookie)
{
struct intrhand *ih = (struct intrhand *)cookie;
struct intrhand **p, *q;
struct extintr_handler *eih;
int irq;
int s;
KDASSERT(ih != NULL);
s = _cpu_intr_suspend();
irq = ih->ih_irq;
eih = &extintr_handler[irq];
/*
* Remove the handler from the chain.
* This is O(n^2), too.
*/
for (p = &eih->eih_ih; (q = *p) != NULL && q != ih; p = &q->ih_next)
continue;
if (q == NULL)
panic("extintr_disestablish: handler not registered");
*p = q->ih_next;
evcnt_detach(&ih->ih_evcnt);
free((void *)ih, M_DEVBUF);
if (--eih->eih_nih == 0) {
uint8_t reg;
intc_intr_disestablish(eih->eih_func);
eih->eih_func = NULL;
/* Mask interrupt */
switch (irq) {
case 1: case 2:
reg = _reg_read_1(EXTINTR_MASK4);
reg &= ~(1 << (2 - irq));
_reg_write_1(EXTINTR_MASK4, reg);
break;
case 3: case 4: case 5: case 6:
reg = _reg_read_1(EXTINTR_MASK3);
reg &= ~(1 << (6 - irq));
_reg_write_1(EXTINTR_MASK3, reg);
break;
case 7: case 8: case 9: case 10:
reg = _reg_read_1(EXTINTR_MASK2);
reg &= ~(1 << (10 - irq));
_reg_write_1(EXTINTR_MASK2, reg);
break;
case 11: case 12: case 13: case 14:
reg = _reg_read_1(EXTINTR_MASK1);
reg &= ~(1 << (14 - irq));
_reg_write_1(EXTINTR_MASK1, reg);
break;
default:
panic("unknown irq%d\n", irq);
/*NOTREACHED*/
break;
}
}
splx(s);
}
static int
extintr_intr_handler(void *arg)
{
struct extintr_handler *eih = arg;
struct intrhand *ih;
int r;
if (__predict_true(eih != NULL)) {
for (ih = eih->eih_ih; ih != NULL; ih = ih->ih_next) {
if (__predict_true(ih->ih_enable)) {
r = (*ih->ih_fun)(ih->ih_arg);
if (__predict_true(r != 0)) {
ih->ih_evcnt.ev_count++;
}
}
}
return 1;
}
return 0;
}

795
sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c Normal file
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/* $NetBSD: ap_ms104_sh4_space.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Charles M. Hannum.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ap_ms104_sh4_space.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/bus.h>
#include <sys/intr.h>
#include <uvm/uvm_extern.h>
#include <sh3/bscreg.h>
#include <sh3/devreg.h>
#include <sh3/mmu.h>
#include <sh3/pmap.h>
#include <sh3/pte.h>
#include <machine/cpu.h>
/*
* I/O bus space
*/
#define AP_MS104_SH4_IOMEM_IO 0 /* space is i/o space */
#define AP_MS104_SH4_IOMEM_MEM 1 /* space is mem space */
#define AP_MS104_SH4_IOMEM_PCMCIA_IO 2 /* PCMCIA IO space */
#define AP_MS104_SH4_IOMEM_PCMCIA_MEM 3 /* PCMCIA Mem space */
#define AP_MS104_SH4_IOMEM_PCMCIA_ATT 4 /* PCMCIA Attr space */
#define AP_MS104_SH4_IOMEM_PCMCIA_8BIT 0x8000 /* PCMCIA BUS 8 BIT WIDTH */
#define AP_MS104_SH4_IOMEM_PCMCIA_IO8 \
(AP_MS104_SH4_IOMEM_PCMCIA_IO|AP_MS104_SH4_IOMEM_PCMCIA_8BIT)
#define AP_MS104_SH4_IOMEM_PCMCIA_MEM8 \
(AP_MS104_SH4_IOMEM_PCMCIA_MEM|AP_MS104_SH4_IOMEM_PCMCIA_8BIT)
#define AP_MS104_SH4_IOMEM_PCMCIA_ATT8 \
(AP_MS104_SH4_IOMEM_PCMCIA_ATT|AP_MS104_SH4_IOMEM_PCMCIA_8BIT)
int ap_ms104_sh4_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
bus_space_handle_t *bshp);
void ap_ms104_sh4_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
int ap_ms104_sh4_iomem_subregion(void *v, bus_space_handle_t bsh,
bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
int ap_ms104_sh4_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
bus_addr_t *bpap, bus_space_handle_t *bshp);
void ap_ms104_sh4_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
static int ap_ms104_sh4_iomem_add_mapping(bus_addr_t, bus_size_t, int,
bus_space_handle_t *);
static int
ap_ms104_sh4_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type,
bus_space_handle_t *bshp)
{
u_long pa, endpa;
vaddr_t va;
pt_entry_t *pte;
unsigned int m = 0;
int io_type = type & ~AP_MS104_SH4_IOMEM_PCMCIA_8BIT;
pa = sh3_trunc_page(bpa);
endpa = sh3_round_page(bpa + size);
#ifdef DIAGNOSTIC
if (endpa <= pa)
panic("ap_ms104_sh4_iomem_add_mapping: overflow");
#endif
va = uvm_km_alloc(kernel_map, endpa - pa, 0, UVM_KMF_VAONLY);
if (va == 0){
printf("ap_ms104_sh4_iomem_add_mapping: nomem\n");
return (ENOMEM);
}
*bshp = (bus_space_handle_t)(va + (bpa & PGOFSET));
#define MODE(t, s) \
((t) & AP_MS104_SH4_IOMEM_PCMCIA_8BIT) ? \
_PG_PCMCIA_ ## s ## 8 : \
_PG_PCMCIA_ ## s ## 16
switch (io_type) {
default:
panic("unknown pcmcia space.");
/* NOTREACHED */
case AP_MS104_SH4_IOMEM_PCMCIA_IO:
m = MODE(type, IO);
break;
case AP_MS104_SH4_IOMEM_PCMCIA_MEM:
m = MODE(type, MEM);
break;
case AP_MS104_SH4_IOMEM_PCMCIA_ATT:
m = MODE(type, ATTR);
break;
}
#undef MODE
for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, 0);
pte = __pmap_kpte_lookup(va);
KDASSERT(pte);
*pte |= m; /* PTEA PCMCIA assistant bit */
sh_tlb_update(0, va, *pte);
}
return (0);
}
int
ap_ms104_sh4_iomem_map(void *v, bus_addr_t bpa, bus_size_t size,
int flags, bus_space_handle_t *bshp)
{
bus_addr_t addr = SH3_PHYS_TO_P2SEG(bpa);
int error;
KASSERT((bpa & SH3_PHYS_MASK) == bpa);
if (bpa < 0x14000000 || bpa >= 0x1c000000) {
/* CS0,1,2,3,4,7 */
*bshp = (bus_space_handle_t)addr;
return (0);
}
/* CS5,6 */
error = ap_ms104_sh4_iomem_add_mapping(addr, size, (int)(u_long)v, bshp);
return (error);
}
void
ap_ms104_sh4_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size)
{
u_long va, endva;
bus_addr_t bpa;
if (bsh >= SH3_P2SEG_BASE && bsh <= SH3_P2SEG_END) {
/* maybe CS0,1,2,3,4,7 */
return;
}
/* CS5,6 */
va = sh3_trunc_page(bsh);
endva = sh3_round_page(bsh + size);
#ifdef DIAGNOSTIC
if (endva <= va)
panic("ap_ms104_sh4_io_unmap: overflow");
#endif
pmap_extract(pmap_kernel(), va, &bpa);
bpa += bsh & PGOFSET;
pmap_kremove(va, endva - va);
/*
* Free the kernel virtual mapping.
*/
uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
}
int
ap_ms104_sh4_iomem_subregion(void *v, bus_space_handle_t bsh,
bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
{
*nbshp = bsh + offset;
return (0);
}
int
ap_ms104_sh4_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
bus_addr_t *bpap, bus_space_handle_t *bshp)
{
*bshp = *bpap = rstart;
return (0);
}
void
ap_ms104_sh4_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
{
ap_ms104_sh4_iomem_unmap(v, bsh, size);
}
/*
* on-board I/O bus space read/write
*/
uint8_t ap_ms104_sh4_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
uint16_t ap_ms104_sh4_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
uint32_t ap_ms104_sh4_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
void ap_ms104_sh4_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_read_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_read_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_read_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint8_t value);
void ap_ms104_sh4_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint16_t value);
void ap_ms104_sh4_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint32_t value);
void ap_ms104_sh4_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint8_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint16_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_write_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint8_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_write_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint16_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_write_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count);
void ap_ms104_sh4_iomem_set_multi_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint8_t val, bus_size_t count);
void ap_ms104_sh4_iomem_set_multi_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint16_t val, bus_size_t count);
void ap_ms104_sh4_iomem_set_multi_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint32_t val, bus_size_t count);
void ap_ms104_sh4_iomem_set_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t val, bus_size_t count);
void ap_ms104_sh4_iomem_set_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t val, bus_size_t count);
void ap_ms104_sh4_iomem_set_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t val, bus_size_t count);
void ap_ms104_sh4_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
void ap_ms104_sh4_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
void ap_ms104_sh4_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
struct _bus_space ap_ms104_sh4_bus_io =
{
.bs_cookie = (void *)AP_MS104_SH4_IOMEM_PCMCIA_IO,
.bs_map = ap_ms104_sh4_iomem_map,
.bs_unmap = ap_ms104_sh4_iomem_unmap,
.bs_subregion = ap_ms104_sh4_iomem_subregion,
.bs_alloc = ap_ms104_sh4_iomem_alloc,
.bs_free = ap_ms104_sh4_iomem_free,
.bs_r_1 = ap_ms104_sh4_iomem_read_1,
.bs_r_2 = ap_ms104_sh4_iomem_read_2,
.bs_r_4 = ap_ms104_sh4_iomem_read_4,
.bs_rm_1 = ap_ms104_sh4_iomem_read_multi_1,
.bs_rm_2 = ap_ms104_sh4_iomem_read_multi_2,
.bs_rm_4 = ap_ms104_sh4_iomem_read_multi_4,
.bs_rr_1 = ap_ms104_sh4_iomem_read_region_1,
.bs_rr_2 = ap_ms104_sh4_iomem_read_region_2,
.bs_rr_4 = ap_ms104_sh4_iomem_read_region_4,
.bs_rs_1 = ap_ms104_sh4_iomem_read_1,
.bs_rs_2 = ap_ms104_sh4_iomem_read_2,
.bs_rs_4 = ap_ms104_sh4_iomem_read_4,
.bs_rms_1 = ap_ms104_sh4_iomem_read_multi_1,
.bs_rms_2 = ap_ms104_sh4_iomem_read_multi_2,
.bs_rms_4 = ap_ms104_sh4_iomem_read_multi_4,
.bs_rrs_1 = ap_ms104_sh4_iomem_read_region_1,
.bs_rrs_2 = ap_ms104_sh4_iomem_read_region_2,
.bs_rrs_4 = ap_ms104_sh4_iomem_read_region_4,
.bs_w_1 = ap_ms104_sh4_iomem_write_1,
.bs_w_2 = ap_ms104_sh4_iomem_write_2,
.bs_w_4 = ap_ms104_sh4_iomem_write_4,
.bs_wm_1 = ap_ms104_sh4_iomem_write_multi_1,
.bs_wm_2 = ap_ms104_sh4_iomem_write_multi_2,
.bs_wm_4 = ap_ms104_sh4_iomem_write_multi_4,
.bs_wr_1 = ap_ms104_sh4_iomem_write_region_1,
.bs_wr_2 = ap_ms104_sh4_iomem_write_region_2,
.bs_wr_4 = ap_ms104_sh4_iomem_write_region_4,
.bs_ws_1 = ap_ms104_sh4_iomem_write_1,
.bs_ws_2 = ap_ms104_sh4_iomem_write_2,
.bs_ws_4 = ap_ms104_sh4_iomem_write_4,
.bs_wms_1 = ap_ms104_sh4_iomem_write_multi_1,
.bs_wms_2 = ap_ms104_sh4_iomem_write_multi_2,
.bs_wms_4 = ap_ms104_sh4_iomem_write_multi_4,
.bs_wrs_1 = ap_ms104_sh4_iomem_write_region_1,
.bs_wrs_2 = ap_ms104_sh4_iomem_write_region_2,
.bs_wrs_4 = ap_ms104_sh4_iomem_write_region_4,
.bs_sm_1 = ap_ms104_sh4_iomem_set_multi_1,
.bs_sm_2 = ap_ms104_sh4_iomem_set_multi_2,
.bs_sm_4 = ap_ms104_sh4_iomem_set_multi_4,
.bs_sr_1 = ap_ms104_sh4_iomem_set_region_1,
.bs_sr_2 = ap_ms104_sh4_iomem_set_region_2,
.bs_sr_4 = ap_ms104_sh4_iomem_set_region_4,
.bs_c_1 = ap_ms104_sh4_iomem_copy_region_1,
.bs_c_2 = ap_ms104_sh4_iomem_copy_region_2,
.bs_c_4 = ap_ms104_sh4_iomem_copy_region_4,
};
struct _bus_space ap_ms104_sh4_bus_mem =
{
.bs_cookie = (void *)AP_MS104_SH4_IOMEM_PCMCIA_MEM,
.bs_map = ap_ms104_sh4_iomem_map,
.bs_unmap = ap_ms104_sh4_iomem_unmap,
.bs_subregion = ap_ms104_sh4_iomem_subregion,
.bs_alloc = ap_ms104_sh4_iomem_alloc,
.bs_free = ap_ms104_sh4_iomem_free,
.bs_r_1 = ap_ms104_sh4_iomem_read_1,
.bs_r_2 = ap_ms104_sh4_iomem_read_2,
.bs_r_4 = ap_ms104_sh4_iomem_read_4,
.bs_rm_1 = ap_ms104_sh4_iomem_read_multi_1,
.bs_rm_2 = ap_ms104_sh4_iomem_read_multi_2,
.bs_rm_4 = ap_ms104_sh4_iomem_read_multi_4,
.bs_rr_1 = ap_ms104_sh4_iomem_read_region_1,
.bs_rr_2 = ap_ms104_sh4_iomem_read_region_2,
.bs_rr_4 = ap_ms104_sh4_iomem_read_region_4,
.bs_rs_1 = ap_ms104_sh4_iomem_read_1,
.bs_rs_2 = ap_ms104_sh4_iomem_read_2,
.bs_rs_4 = ap_ms104_sh4_iomem_read_4,
.bs_rms_1 = ap_ms104_sh4_iomem_read_multi_1,
.bs_rms_2 = ap_ms104_sh4_iomem_read_multi_2,
.bs_rms_4 = ap_ms104_sh4_iomem_read_multi_4,
.bs_rrs_1 = ap_ms104_sh4_iomem_read_region_1,
.bs_rrs_2 = ap_ms104_sh4_iomem_read_region_2,
.bs_rrs_4 = ap_ms104_sh4_iomem_read_region_4,
.bs_w_1 = ap_ms104_sh4_iomem_write_1,
.bs_w_2 = ap_ms104_sh4_iomem_write_2,
.bs_w_4 = ap_ms104_sh4_iomem_write_4,
.bs_wm_1 = ap_ms104_sh4_iomem_write_multi_1,
.bs_wm_2 = ap_ms104_sh4_iomem_write_multi_2,
.bs_wm_4 = ap_ms104_sh4_iomem_write_multi_4,
.bs_wr_1 = ap_ms104_sh4_iomem_write_region_1,
.bs_wr_2 = ap_ms104_sh4_iomem_write_region_2,
.bs_wr_4 = ap_ms104_sh4_iomem_write_region_4,
.bs_ws_1 = ap_ms104_sh4_iomem_write_1,
.bs_ws_2 = ap_ms104_sh4_iomem_write_2,
.bs_ws_4 = ap_ms104_sh4_iomem_write_4,
.bs_wms_1 = ap_ms104_sh4_iomem_write_multi_1,
.bs_wms_2 = ap_ms104_sh4_iomem_write_multi_2,
.bs_wms_4 = ap_ms104_sh4_iomem_write_multi_4,
.bs_wrs_1 = ap_ms104_sh4_iomem_write_region_1,
.bs_wrs_2 = ap_ms104_sh4_iomem_write_region_2,
.bs_wrs_4 = ap_ms104_sh4_iomem_write_region_4,
.bs_sm_1 = ap_ms104_sh4_iomem_set_multi_1,
.bs_sm_2 = ap_ms104_sh4_iomem_set_multi_2,
.bs_sm_4 = ap_ms104_sh4_iomem_set_multi_4,
.bs_sr_1 = ap_ms104_sh4_iomem_set_region_1,
.bs_sr_2 = ap_ms104_sh4_iomem_set_region_2,
.bs_sr_4 = ap_ms104_sh4_iomem_set_region_4,
.bs_c_1 = ap_ms104_sh4_iomem_copy_region_1,
.bs_c_2 = ap_ms104_sh4_iomem_copy_region_2,
.bs_c_4 = ap_ms104_sh4_iomem_copy_region_4,
};
struct _bus_space ap_ms104_sh4_bus_att =
{
.bs_cookie = (void *)AP_MS104_SH4_IOMEM_PCMCIA_ATT,
.bs_map = ap_ms104_sh4_iomem_map,
.bs_unmap = ap_ms104_sh4_iomem_unmap,
.bs_subregion = ap_ms104_sh4_iomem_subregion,
.bs_alloc = ap_ms104_sh4_iomem_alloc,
.bs_free = ap_ms104_sh4_iomem_free,
.bs_r_1 = ap_ms104_sh4_iomem_read_1,
.bs_r_2 = ap_ms104_sh4_iomem_read_2,
.bs_r_4 = ap_ms104_sh4_iomem_read_4,
.bs_rm_1 = ap_ms104_sh4_iomem_read_multi_1,
.bs_rm_2 = ap_ms104_sh4_iomem_read_multi_2,
.bs_rm_4 = ap_ms104_sh4_iomem_read_multi_4,
.bs_rr_1 = ap_ms104_sh4_iomem_read_region_1,
.bs_rr_2 = ap_ms104_sh4_iomem_read_region_2,
.bs_rr_4 = ap_ms104_sh4_iomem_read_region_4,
.bs_rs_1 = ap_ms104_sh4_iomem_read_1,
.bs_rs_2 = ap_ms104_sh4_iomem_read_2,
.bs_rs_4 = ap_ms104_sh4_iomem_read_4,
.bs_rms_1 = ap_ms104_sh4_iomem_read_multi_1,
.bs_rms_2 = ap_ms104_sh4_iomem_read_multi_2,
.bs_rms_4 = ap_ms104_sh4_iomem_read_multi_4,
.bs_rrs_1 = ap_ms104_sh4_iomem_read_region_1,
.bs_rrs_2 = ap_ms104_sh4_iomem_read_region_2,
.bs_rrs_4 = ap_ms104_sh4_iomem_read_region_4,
.bs_w_1 = ap_ms104_sh4_iomem_write_1,
.bs_w_2 = ap_ms104_sh4_iomem_write_2,
.bs_w_4 = ap_ms104_sh4_iomem_write_4,
.bs_wm_1 = ap_ms104_sh4_iomem_write_multi_1,
.bs_wm_2 = ap_ms104_sh4_iomem_write_multi_2,
.bs_wm_4 = ap_ms104_sh4_iomem_write_multi_4,
.bs_wr_1 = ap_ms104_sh4_iomem_write_region_1,
.bs_wr_2 = ap_ms104_sh4_iomem_write_region_2,
.bs_wr_4 = ap_ms104_sh4_iomem_write_region_4,
.bs_ws_1 = ap_ms104_sh4_iomem_write_1,
.bs_ws_2 = ap_ms104_sh4_iomem_write_2,
.bs_ws_4 = ap_ms104_sh4_iomem_write_4,
.bs_wms_1 = ap_ms104_sh4_iomem_write_multi_1,
.bs_wms_2 = ap_ms104_sh4_iomem_write_multi_2,
.bs_wms_4 = ap_ms104_sh4_iomem_write_multi_4,
.bs_wrs_1 = ap_ms104_sh4_iomem_write_region_1,
.bs_wrs_2 = ap_ms104_sh4_iomem_write_region_2,
.bs_wrs_4 = ap_ms104_sh4_iomem_write_region_4,
.bs_sm_1 = ap_ms104_sh4_iomem_set_multi_1,
.bs_sm_2 = ap_ms104_sh4_iomem_set_multi_2,
.bs_sm_4 = ap_ms104_sh4_iomem_set_multi_4,
.bs_sr_1 = ap_ms104_sh4_iomem_set_region_1,
.bs_sr_2 = ap_ms104_sh4_iomem_set_region_2,
.bs_sr_4 = ap_ms104_sh4_iomem_set_region_4,
.bs_c_1 = ap_ms104_sh4_iomem_copy_region_1,
.bs_c_2 = ap_ms104_sh4_iomem_copy_region_2,
.bs_c_4 = ap_ms104_sh4_iomem_copy_region_4,
};
/* read */
uint8_t
ap_ms104_sh4_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
{
return *(volatile uint8_t *)(bsh + offset);
}
uint16_t
ap_ms104_sh4_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
{
return (*(volatile uint16_t *)(bsh + offset));
}
uint32_t
ap_ms104_sh4_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
{
return (*(volatile uint32_t *)(bsh + offset));
}
void
ap_ms104_sh4_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t *addr, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*addr++ = *p;
}
}
void
ap_ms104_sh4_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t *addr, bus_size_t count)
{
volatile uint16_t *src = (void *)(bsh + offset);
volatile uint16_t *dest = (void *)addr;
while (count--) {
*dest++ = *src;
}
}
void
ap_ms104_sh4_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count)
{
volatile uint32_t *src = (void *)(bsh + offset);
volatile uint32_t *dest = (void *)addr;
while (count--) {
*dest++ = *src;
}
}
void
ap_ms104_sh4_iomem_read_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t *addr, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*addr++ = *p++;
}
}
void
ap_ms104_sh4_iomem_read_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t *addr, bus_size_t count)
{
volatile uint16_t *p = (void *)(bsh + offset);
while (count--) {
*addr++ = *p++;
}
}
void
ap_ms104_sh4_iomem_read_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count)
{
volatile uint32_t *p = (void *)(bsh + offset);
while (count--) {
*addr++ = *p++;
}
}
/* write */
void
ap_ms104_sh4_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint8_t value)
{
*(volatile uint8_t *)(bsh + offset) = value;
}
void
ap_ms104_sh4_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint16_t value)
{
*(volatile uint16_t *)(bsh + offset) = value;
}
void
ap_ms104_sh4_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint32_t value)
{
*(volatile uint32_t *)(bsh + offset) = value;
}
void
ap_ms104_sh4_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*p = *addr++;
}
}
void
ap_ms104_sh4_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint16_t *addr, bus_size_t count)
{
volatile uint16_t *dest = (void *)(bsh + offset);
volatile const uint16_t *src = (const void *)addr;
while (count--) {
*dest = *src++;
}
}
void
ap_ms104_sh4_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count)
{
volatile uint32_t *dest = (void *)(bsh + offset);
volatile const uint32_t *src = (const void *)addr;
while (count--) {
*dest = *src++;
}
}
void
ap_ms104_sh4_iomem_write_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*p++ = *addr++;
}
}
void
ap_ms104_sh4_iomem_write_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint16_t *addr, bus_size_t count)
{
volatile uint16_t *p = (void *)(bsh + offset);
while (count--) {
*p++ = *addr++;
}
}
void
ap_ms104_sh4_iomem_write_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count)
{
volatile uint32_t *p = (void *)(bsh + offset);
while (count--) {
*p++ = *addr++;
}
}
void
ap_ms104_sh4_iomem_set_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t val, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*p = val;
}
}
void
ap_ms104_sh4_iomem_set_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t val, bus_size_t count)
{
volatile uint16_t *dest = (void *)(bsh + offset);
while (count--) {
*dest = val;
}
}
void
ap_ms104_sh4_iomem_set_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t val, bus_size_t count)
{
volatile uint32_t *dest = (void *)(bsh + offset);
while (count--) {
*dest = val;
}
}
void
ap_ms104_sh4_iomem_set_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t val, bus_size_t count)
{
volatile uint8_t *addr = (void *)(bsh + offset);
while (count--) {
*addr++ = val;
}
}
void
ap_ms104_sh4_iomem_set_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t val, bus_size_t count)
{
volatile uint16_t *dest = (void *)(bsh + offset);
while (count--) {
*dest++ = val;
}
}
void
ap_ms104_sh4_iomem_set_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t val, bus_size_t count)
{
volatile uint32_t *dest = (void *)(bsh + offset);
while (count--) {
*dest++ = val;
}
}
void
ap_ms104_sh4_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
{
volatile uint8_t *addr1 = (void *)(h1 + o1);
volatile uint8_t *addr2 = (void *)(h2 + o2);
if (addr1 >= addr2) { /* src after dest: copy forward */
while (count--) {
*addr2++ = *addr1++;
}
} else { /* dest after src: copy backwards */
addr1 += count - 1;
addr2 += count - 1;
while (count--) {
*addr2-- = *addr1--;
}
}
}
void
ap_ms104_sh4_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
{
volatile uint16_t *addr1 = (void *)(h1 + o1);
volatile uint16_t *addr2 = (void *)(h2 + o2);
if (addr1 >= addr2) { /* src after dest: copy forward */
while (count--) {
*addr2++ = *addr1++;
}
} else { /* dest after src: copy backwards */
addr1 += count - 1;
addr2 += count - 1;
while (count--) {
*addr2-- = *addr1--;
}
}
}
void
ap_ms104_sh4_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
{
volatile uint32_t *addr1 = (void *)(h1 + o1);
volatile uint32_t *addr2 = (void *)(h2 + o2);
if (addr1 >= addr2) { /* src after dest: copy forward */
while (count--) {
*addr2++ = *addr1++;
}
} else { /* dest after src: copy backwards */
addr1 += count - 1;
addr2 += count - 1;
while (count--) {
*addr2-- = *addr1--;
}
}
}

104
sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4reg.h Normal file
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/* $NetBSD: ap_ms104_sh4reg.h,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2009 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef AP_MS104_SH4REG_H_
#define AP_MS104_SH4REG_H_
#define EXTINTR_MASK1 0xa4000000 /* R/W: 8bit */
#define EXTINTR_MASK2 0xa4100000 /* R/W: 8bit */
#define EXTINTR_MASK3 0xa4200000 /* R/W: 8bit */
#define EXTINTR_MASK4 0xa4300000 /* R/W: 8bit */
#define EXTINTR_STAT1 0xa4400000 /* R: 8bit */
#define EXTINTR_STAT2 0xa4500000 /* R: 8bit */
#define EXTINTR_STAT3 0xa4600000 /* R: 8bit */
#define EXTINTR_STAT4 0xa4700000 /* R: 8bit */
#define CFBUS_CTRL 0xa4800000 /* W: 8bit */
/* EXTINTR_MASK1 */
#define MASK1_INT14 (1U << 0)
#define MASK1_INT13 (1U << 1)
#define MASK1_INT12 (1U << 2)
#define MASK1_INT11 (1U << 3)
/* EXTINTR_MASK2 */
#define MASK2_INT10 (1U << 0)
#define MASK2_INT9 (1U << 1)
#define MASK2_INT8 (1U << 2)
#define MASK2_INT7 (1U << 3)
/* EXTINTR_MASK3 */
#define MASK3_INT6 (1U << 0)
#define MASK3_INT5 (1U << 1)
#define MASK3_INT4 (1U << 2)
#define MASK3_INT3 (1U << 3)
/* EXTINTR_MASK4 */
#define MASK4_INT2 (1U << 0)
#define MASK4_INT1 (1U << 1)
/* EXTINTR_STAT1 */
#define STAT1_INT14 (1U << 0)
#define STAT1_INT13 (1U << 1)
#define STAT1_INT12 (1U << 2)
#define STAT1_INT11 (1U << 3)
/* EXTINTR_STAT2 */
#define STAT2_INT10 (1U << 0)
#define STAT2_INT9 (1U << 1)
#define STAT2_INT8 (1U << 2)
#define STAT2_INT7 (1U << 3)
/* EXTINTR_STAT3 */
#define STAT3_INT6 (1U << 0)
#define STAT3_INT5 (1U << 1)
#define STAT3_INT4 (1U << 2)
#define STAT3_INT3 (1U << 3)
/* EXTINTR_STAT4 */
#define STAT4_INT2 (1U << 0)
#define STAT4_INT1 (1U << 1)
/* CFBUS_CTRL */
#define CFBUS_CTRL_WAIT (1U << 0)
#define CFBUS_CTRL_IOIS16 (1U << 1)
/* external intr# */
#define EXTINTR_INTR_SMC91C111 8
#define EXTINTR_INTR_CFIREQ 12
#define EXTINTR_INTR_RTC 14
/* GPIO pin# */
#define GPIO_PIN_CARD_CD 8 /* In */
#define GPIO_PIN_CARD_PON 9 /* Out */
#define GPIO_PIN_CARD_RESET 10 /* Out */
#define GPIO_PIN_CARD_ENABLE 11 /* Out */
#define GPIO_PIN_RTC_SIO 13 /* In/Out */
#define GPIO_PIN_RTC_SCLK 14 /* Out */
#define GPIO_PIN_RTC_CE 15 /* Out */
#endif /* AP_MS104_SH4REG_H_ */

46
sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4var.h Normal file
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/* $NetBSD: ap_ms104_sh4var.h,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2009 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef AP_MS104_SH4VAR_H_
#define AP_MS104_SH4VAR_H_
#include <sys/bus.h>
extern struct _bus_space ap_ms104_sh4_bus_io;
extern struct _bus_space ap_ms104_sh4_bus_mem;
extern struct _bus_space ap_ms104_sh4_bus_att;
void machine_init(void);
void extintr_init(void);
void *extintr_establish(int, int, int, int (*)(void *), void *);
void extintr_disestablish(void *);
void gpio_intr_init(void);
void *gpio_intr_establish(int, int (*)(void *), void *);
void gpior_intr_disestablish(void *);
#endif /* AP_MS104_SH4VAR_H_ */

42
sys/arch/evbsh3/ap_ms104_sh4/clock_machdep.c Normal file
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/* $NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sh3/clock.h>
void
machine_clock_init(void)
{
sh_clock_init(SH_CLOCK_NORTC);
}

107
sys/arch/evbsh3/ap_ms104_sh4/if_sm_mainbus.c Normal file
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/* $NetBSD: if_sm_mainbus.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2009 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_sm_mainbus.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <net/if.h>
#include <net/if_ether.h>
#include <net/if_media.h>
#include <machine/autoconf.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <dev/mii/mii.h>
#include <dev/mii/miivar.h>
#include <dev/ic/smc91cxxreg.h>
#include <dev/ic/smc91cxxvar.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4reg.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4var.h>
static int sm_mainbus_match(device_t, cfdata_t, void *);
static void sm_mainbus_attach(device_t, device_t, void *);
struct sm_mainbus_softc {
struct smc91cxx_softc sc_sm;
void *sc_ih;
};
CFATTACH_DECL(sm_mainbus, sizeof(struct sm_mainbus_softc),
sm_mainbus_match, sm_mainbus_attach, NULL, NULL);
static int
sm_mainbus_match(device_t parent, cfdata_t cf, void *aux)
{
struct mainbus_attach_args *maa = (struct mainbus_attach_args *)aux;
if (strcmp(maa->ma_name, "sm") != 0)
return 0;
return 1;
}
static void
sm_mainbus_attach(device_t parent, device_t self, void *aux)
{
struct sm_mainbus_softc *smsc = device_private(self);
struct smc91cxx_softc *sc = &smsc->sc_sm;
bus_space_tag_t bst = &ap_ms104_sh4_bus_io;
bus_space_handle_t bsh;
aprint_naive("\n");
aprint_normal("\n");
/* map i/o space */
if (bus_space_map(bst, 0x08000000, SMC_IOSIZE, 0, &bsh) != 0) {
aprint_error_dev(self, "can't map i/o space");
return;
}
/* register the interrupt handler */
smsc->sc_ih = extintr_establish(EXTINTR_INTR_SMC91C111, IST_LEVEL,
IPL_NET, smc91cxx_intr, sc);
if (smsc->sc_ih == NULL) {
aprint_error_dev(self, "couldn't establish interrupt\n");
bus_space_unmap(bst, bsh, SMC_IOSIZE);
return;
}
/* fill in master sc */
sc->sc_bst = bst;
sc->sc_bsh = bsh;
sc->sc_flags = SMC_FLAGS_ENABLED;
smc91cxx_attach(sc, NULL);
}

190
sys/arch/evbsh3/ap_ms104_sh4/rs5c316_mainbus.c Normal file
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/* $NetBSD: rs5c316_mainbus.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2009 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: rs5c316_mainbus.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <dev/clock_subr.h>
#include <dev/ic/rs5c313var.h>
#include <machine/autoconf.h>
#include <sh3/devreg.h>
#include <sh3/pfcreg.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4reg.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4var.h>
/* chip access methods */
static void rtc_begin(struct rs5c313_softc *);
static void rtc_ce(struct rs5c313_softc *, int);
static void rtc_dir(struct rs5c313_softc *, int);
static void rtc_clk(struct rs5c313_softc *, int);
static int rtc_read(struct rs5c313_softc *);
static void rtc_write(struct rs5c313_softc *, int);
static struct rs5c313_ops rs5c316_mainbus_ops = {
.rs5c313_op_begin = rtc_begin,
.rs5c313_op_ce = rtc_ce,
.rs5c313_op_clk = rtc_clk,
.rs5c313_op_dir = rtc_dir,
.rs5c313_op_read = rtc_read,
.rs5c313_op_write = rtc_write,
};
/* autoconf glue */
static int rs5c316_mainbus_match(device_t, cfdata_t, void *);
static void rs5c316_mainbus_attach(device_t, device_t, void *);
CFATTACH_DECL_NEW(rs5c313_mainbus, sizeof(struct rs5c313_softc),
rs5c316_mainbus_match, rs5c316_mainbus_attach, NULL, NULL);
#define ndelay(x) delay(((x) + 999) / 1000)
static int
rs5c316_mainbus_match(device_t parent, cfdata_t cf, void *aux)
{
struct mainbus_attach_args *maa = (struct mainbus_attach_args *)aux;
if (strcmp(maa->ma_name, "rs5c313rtc") != 0)
return 0;
return 1;
}
static void
rs5c316_mainbus_attach(device_t parent, device_t self, void *aux)
{
struct rs5c313_softc *sc = device_private(self);
uint32_t reg;
sc->sc_dev = self;
sc->sc_model = MODEL_5C316;
sc->sc_ops = &rs5c316_mainbus_ops;
/* setup gpio pin */
reg = _reg_read_4(SH4_PCTRA);
reg &= ~(3 << (GPIO_PIN_RTC_CE * 2));
reg |= (1 << (GPIO_PIN_RTC_CE * 2)); /* output */
reg &= ~(3 << (GPIO_PIN_RTC_SCLK * 2));
reg |= (1 << (GPIO_PIN_RTC_SCLK * 2)); /* output */
reg &= ~(3 << (GPIO_PIN_RTC_SIO * 2));
reg |= (1 << (GPIO_PIN_RTC_SIO * 2)); /* output */
_reg_write_4(SH4_PCTRA, reg);
rs5c313_attach(sc);
}
static void
rtc_begin(struct rs5c313_softc *sc)
{
/* nothing to do */
}
static void
rtc_ce(struct rs5c313_softc *sc, int onoff)
{
uint16_t
reg = _reg_read_2(SH4_PDTRA);
if (onoff) {
reg |= (1 << GPIO_PIN_RTC_CE);
} else {
reg &= ~(1 << GPIO_PIN_RTC_CE);
}
_reg_write_2(SH4_PDTRA, reg);
ndelay(600);
}
static void
rtc_clk(struct rs5c313_softc *sc, int onoff)
{
uint16_t reg;
reg = _reg_read_2(SH4_PDTRA);
if (onoff) {
reg |= (1 << GPIO_PIN_RTC_SCLK);
} else {
reg &= ~(1 << GPIO_PIN_RTC_SCLK);
}
_reg_write_2(SH4_PDTRA, reg);
}
static void
rtc_dir(struct rs5c313_softc *sc, int output)
{
uint32_t reg;
reg = _reg_read_4(SH4_PCTRA);
reg &= ~(3 << (GPIO_PIN_RTC_SIO * 2)); /* input */
if (output) {
reg |= (1 << (GPIO_PIN_RTC_SIO * 2)); /* output */
}
_reg_write_4(SH4_PCTRA, reg);
}
static int
rtc_read(struct rs5c313_softc *sc)
{
int bit;
ndelay(300);
bit = (_reg_read_2(SH4_PDTRA) & (1 << GPIO_PIN_RTC_SIO)) ? 1 : 0;
rtc_clk(sc, 0);
ndelay(300);
rtc_clk(sc, 1);
return bit;
}
static void
rtc_write(struct rs5c313_softc *sc, int bit)
{
uint16_t reg;
reg = _reg_read_2(SH4_PDTRA);
if (bit)
reg |= (1 << GPIO_PIN_RTC_SIO);
else
reg &= ~(1 << GPIO_PIN_RTC_SIO);
_reg_write_2(SH4_PDTRA, reg);
ndelay(300);
rtc_clk(sc, 0);
ndelay(300);
rtc_clk(sc, 1);
}

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sys/arch/evbsh3/ap_ms104_sh4/shpcmcia.c Normal file
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/* $NetBSD: shpcmcia.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2009 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: shpcmcia.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <sys/kthread.h>
#include <sys/kernel.h>
#include <sys/callout.h>
#include <sys/bus.h>
#include <sys/intr.h>
#include <dev/pcmcia/pcmciachip.h>
#include <dev/pcmcia/pcmciavar.h>
#include <machine/autoconf.h>
#include <sh3/devreg.h>
#include <sh3/bscreg.h>
#include <sh3/pfcreg.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4reg.h>
#include <evbsh3/ap_ms104_sh4/ap_ms104_sh4var.h>
#ifdef SHPCMCIA_DEBUG
#define DPRINTF(s) printf s
#else
#define DPRINTF(s)
#endif
static int shpcmcia_chip_mem_alloc(pcmcia_chipset_handle_t,
bus_size_t, struct pcmcia_mem_handle *);
static void shpcmcia_chip_mem_free(pcmcia_chipset_handle_t,
struct pcmcia_mem_handle *);
static int shpcmcia_chip_mem_map(pcmcia_chipset_handle_t, int,
bus_addr_t, bus_size_t, struct pcmcia_mem_handle *,
bus_size_t *, int *);
static void shpcmcia_chip_mem_unmap(pcmcia_chipset_handle_t, int);
static int shpcmcia_chip_io_alloc(pcmcia_chipset_handle_t,
bus_addr_t, bus_size_t, bus_size_t,
struct pcmcia_io_handle *);
static void shpcmcia_chip_io_free(pcmcia_chipset_handle_t,
struct pcmcia_io_handle *);
static int shpcmcia_chip_io_map(pcmcia_chipset_handle_t, int,
bus_addr_t, bus_size_t, struct pcmcia_io_handle *, int *);
static void shpcmcia_chip_io_unmap(pcmcia_chipset_handle_t, int);
static void *shpcmcia_chip_intr_establish(pcmcia_chipset_handle_t,
struct pcmcia_function *, int, int (*)(void *), void *);
static void shpcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t,
void *);
static void shpcmcia_chip_socket_enable(pcmcia_chipset_handle_t);
static void shpcmcia_chip_socket_disable(pcmcia_chipset_handle_t);
static void shpcmcia_chip_socket_settype(pcmcia_chipset_handle_t,
int);
static struct pcmcia_chip_functions shpcmcia_chip_functions = {
/* memory space allocation */
.mem_alloc = shpcmcia_chip_mem_alloc,
.mem_free = shpcmcia_chip_mem_free,
/* memory space window mapping */
.mem_map = shpcmcia_chip_mem_map,
.mem_unmap = shpcmcia_chip_mem_unmap,
/* I/O space allocation */
.io_alloc = shpcmcia_chip_io_alloc,
.io_free = shpcmcia_chip_io_free,
/* I/O space window mapping */
.io_map = shpcmcia_chip_io_map,
.io_unmap = shpcmcia_chip_io_unmap,
/* interrupt glue */
.intr_establish = shpcmcia_chip_intr_establish,
.intr_disestablish = shpcmcia_chip_intr_disestablish,
/* card enable/disable */
.socket_enable = shpcmcia_chip_socket_enable,
.socket_disable = shpcmcia_chip_socket_disable,
.socket_settype = shpcmcia_chip_socket_settype,
/* card detection */
.card_detect = NULL,
};
/*
* event thread
*/
struct shpcmcia_event {
SIMPLEQ_ENTRY(shpcmcia_event) pe_q;
int pe_type;
};
/* pe_type */
#define SHPCMCIA_EVENT_INSERT 0
#define SHPCMCIA_EVENT_REMOVE 1
struct shpcmcia_softc;
struct shpcmcia_handle {
struct shpcmcia_softc *sc;
int flags;
#define SHPCMCIA_FLAG_SOCKETP 0x0001
#define SHPCMCIA_FLAG_CARDP 0x0002
int laststate;
#define SHPCMCIA_LASTSTATE_EMPTY 0x0000
#define SHPCMCIA_LASTSTATE_PRESENT 0x0002
int memalloc;
struct {
bus_addr_t addr;
bus_size_t size;
long offset;
int kind;
#define SHPCMCIA_MEM_WINS 5
} mem[SHPCMCIA_MEM_WINS];
int ioalloc;
struct {
bus_addr_t addr;
bus_size_t size;
int width;
#define SHPCMCIA_IO_WINS 2
} io[SHPCMCIA_IO_WINS];
struct device *pcmcia;
int shutdown;
lwp_t *event_thread;
SIMPLEQ_HEAD(, shpcmcia_event) events;
};
struct shpcmcia_softc {
device_t sc_dev;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
bus_space_tag_t sc_memt;
bus_space_handle_t sc_memh;
bus_space_tag_t sc_attt;
bus_space_handle_t sc_atth;
pcmcia_chipset_tag_t sc_pct;
void *sc_ih;
#if 0
void *sc_detect_ih;
#else
callout_t sc_detect_ch;
#endif
bus_addr_t sc_membase;
#define SHPCMCIA_MAX_MEM_PAGES (8 * sizeof(int))
bus_addr_t sc_iobase;
bus_size_t sc_iosize;
#define SHPCMCIA_NSLOTS 1
struct shpcmcia_handle sc_handle[SHPCMCIA_NSLOTS];
};
static int shpcmcia_probe(device_t, cfdata_t, void *);
static void shpcmcia_attach(device_t, device_t, void *);
static int shpcmcia_print(void *, const char *);
CFATTACH_DECL_NEW(shpcmcia, sizeof(struct shpcmcia_softc),
shpcmcia_probe, shpcmcia_attach, NULL, NULL);
#if 0
static int shpcmcia_card_detect_intr(void *arg);
#else
static void shpcmcia_card_detect_poll(void *arg);
#endif
static void shpcmcia_init_socket(struct shpcmcia_handle *);
static void shpcmcia_attach_socket(struct shpcmcia_handle *);
static void shpcmcia_attach_sockets(struct shpcmcia_softc *);
static void shpcmcia_event_thread(void *);
static void shpcmcia_queue_event(struct shpcmcia_handle *, int);
static void shpcmcia_attach_card(struct shpcmcia_handle *);
static void shpcmcia_detach_card(struct shpcmcia_handle *, int );
static void shpcmcia_deactivate_card(struct shpcmcia_handle *);
static int
shpcmcia_probe(device_t parent, cfdata_t cfp, void *aux)
{
struct mainbus_attach_args *maa = aux;
if (strcmp(maa->ma_name, "shpcmcia") != 0)
return 0;
return 1;
}
static void
shpcmcia_attach(device_t parent, device_t self, void *aux)
{
struct shpcmcia_softc *sc = device_private(self);
#if 0
uint32_t reg;
#endif
sc->sc_dev = self;
aprint_naive("\n");
aprint_normal("\n");
#if 0
/* setup bus controller */
/* max wait */
reg = _reg_read_4(SH4_WCR1);
reg |= 0x00700000;
_reg_write_4(SH4_WCR1, reg);
reg = _reg_read_4(SH4_WCR2);
reg |= 0xfff00000;
_reg_write_4(SH4_WCR2, reg);
reg = _reg_read_4(SH4_WCR3);
reg |= 0x07700000;
_reg_write_4(SH4_WCR3, reg);
reg = _reg_read_4(SH4_PCR);
reg |= 0xffffffff;
_reg_write_4(SH4_PCR, reg);
#endif
sc->sc_pct = (pcmcia_chipset_tag_t)&shpcmcia_chip_functions;
sc->sc_iot = &ap_ms104_sh4_bus_io;
sc->sc_memt = &ap_ms104_sh4_bus_mem;
sc->sc_attt = &ap_ms104_sh4_bus_att;
if (bus_space_map(sc->sc_attt, 0x14000000, 4 * 1024, 0, &sc->sc_atth))
panic("%s: couldn't map attribute\n", device_xname(sc->sc_dev));
if (bus_space_map(sc->sc_iot, 0x15000000, 64 * 1024, 0,
&sc->sc_ioh))
panic("%s: couldn't map io memory\n", device_xname(sc->sc_dev));
if (bus_space_map(sc->sc_memt, 0x16000000, 32 * 1024 * 1024, 0,
&sc->sc_memh))
panic("%s: couldn't map memory\n", device_xname(sc->sc_dev));
sc->sc_iobase = sc->sc_ioh;
sc->sc_iosize = 64 * 1024;
sc->sc_membase = sc->sc_memh;
sc->sc_handle[0].sc = sc;
sc->sc_handle[0].flags = SHPCMCIA_FLAG_SOCKETP;
sc->sc_handle[0].laststate = SHPCMCIA_LASTSTATE_EMPTY;
SIMPLEQ_INIT(&sc->sc_handle[0].events);
#if 0
sc->sc_detect_ih = gpio_intr_establish(GPIO_PIN_CARD_CD,
shpcmcia_card_detect_intr, sc);
if (sc->sc_detect_ih == NULL) {
aprint_error_dev(self, "couldn't establish detect interrupt\n");
}
#else
callout_init(&sc->sc_detect_ch, 0);
callout_reset(&sc->sc_detect_ch, hz, shpcmcia_card_detect_poll, sc);
#endif
shpcmcia_attach_sockets(sc);
}
static void
shpcmcia_attach_sockets(struct shpcmcia_softc *sc)
{
shpcmcia_attach_socket(&sc->sc_handle[0]);
}
static void
shpcmcia_attach_socket(struct shpcmcia_handle *h)
{
struct pcmciabus_attach_args paa;
/* initialize the rest of the handle */
h->shutdown = 0;
h->memalloc = 0;
h->ioalloc = 0;
/* now, config one pcmcia device per socket */
paa.paa_busname = "pcmcia";
paa.pct = (pcmcia_chipset_tag_t)h->sc->sc_pct;
paa.pch = (pcmcia_chipset_handle_t)h;
paa.iobase = h->sc->sc_iobase;
paa.iosize = h->sc->sc_iosize;
h->pcmcia = config_found_ia(h->sc->sc_dev, "pcmciabus", &paa,
shpcmcia_print);
/* if there's actually a pcmcia device attached, initialize the slot */
if (h->pcmcia)
shpcmcia_init_socket(h);
}
/*ARGSUSED*/
static int
shpcmcia_print(void *arg, const char *pnp)
{
if (pnp)
aprint_normal("pcmcia at %s", pnp);
return UNCONF;
}
static void
shpcmcia_init_socket(struct shpcmcia_handle *h)
{
uint16_t reg;
/*
* queue creation of a kernel thread to handle insert/removal events.
*/
#ifdef DIAGNOSTIC
if (h->event_thread != NULL)
panic("shpcmcia_attach_socket: event thread");
#endif
/* if there's a card there, then attach it. */
reg = _reg_read_2(SH4_PDTRA);
if (!(reg & (1 << GPIO_PIN_CARD_CD))) {
shpcmcia_attach_card(h);
h->laststate = SHPCMCIA_LASTSTATE_PRESENT;
} else {
h->laststate = SHPCMCIA_LASTSTATE_EMPTY;
}
if (kthread_create(PRI_NONE, 0, NULL, shpcmcia_event_thread, h,
&h->event_thread, "%s", device_xname(h->sc->sc_dev))) {
aprint_error_dev(h->sc->sc_dev,
"unable to create event thread\n");
panic("shpcmcia_create_event_thread");
}
}
/*
* event thread
*/
static void
shpcmcia_event_thread(void *arg)
{
struct shpcmcia_handle *h = (struct shpcmcia_handle *)arg;
struct shpcmcia_event *pe;
int s;
while (h->shutdown == 0) {
s = splhigh();
if ((pe = SIMPLEQ_FIRST(&h->events)) == NULL) {
splx(s);
(void) tsleep(&h->events, PWAIT, "waitev", 0);
continue;
} else {
splx(s);
/* sleep .25s to be enqueued chatterling interrupts */
(void) tsleep((void *)shpcmcia_event_thread,
PWAIT, "waitss", hz / 4);
}
s = splhigh();
SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
splx(s);
switch (pe->pe_type) {
case SHPCMCIA_EVENT_INSERT:
s = splhigh();
for (;;) {
struct shpcmcia_event *pe1, *pe2;
if ((pe1 = SIMPLEQ_FIRST(&h->events)) == NULL)
break;
if (pe1->pe_type != SHPCMCIA_EVENT_REMOVE)
break;
if ((pe2 = SIMPLEQ_NEXT(pe1, pe_q)) == NULL)
break;
if (pe2->pe_type == SHPCMCIA_EVENT_INSERT) {
SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
free(pe1, M_TEMP);
SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
free(pe2, M_TEMP);
}
}
splx(s);
DPRINTF(("%s: insertion event\n",
device_xname(h->sc->sc_dev)));
shpcmcia_attach_card(h);
break;
case SHPCMCIA_EVENT_REMOVE:
s = splhigh();
for (;;) {
struct shpcmcia_event *pe1, *pe2;
if ((pe1 = SIMPLEQ_FIRST(&h->events)) == NULL)
break;
if (pe1->pe_type != SHPCMCIA_EVENT_INSERT)
break;
if ((pe2 = SIMPLEQ_NEXT(pe1, pe_q)) == NULL)
break;
if (pe2->pe_type == SHPCMCIA_EVENT_REMOVE) {
SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
free(pe1, M_TEMP);
SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
free(pe2, M_TEMP);
}
}
splx(s);
DPRINTF(("%s: removal event\n",
device_xname(h->sc->sc_dev)));
shpcmcia_detach_card(h, DETACH_FORCE);
break;
default:
panic("shpcmcia_event_thread: unknown event %d",
pe->pe_type);
}
free(pe, M_TEMP);
}
h->event_thread = NULL;
/* In case parent is waiting for us to exit. */
wakeup(h->sc);
kthread_exit(0);
}
static void
shpcmcia_queue_event(struct shpcmcia_handle *h, int event)
{
struct shpcmcia_event *pe;
int s;
pe = malloc(sizeof(*pe), M_TEMP, M_NOWAIT);
if (pe == NULL)
panic("shpcmcia_queue_event: can't allocate event");
pe->pe_type = event;
s = splhigh();
SIMPLEQ_INSERT_TAIL(&h->events, pe, pe_q);
splx(s);
wakeup(&h->events);
}
static void
shpcmcia_attach_card(struct shpcmcia_handle *h)
{
DPRINTF(("%s\n", __func__));
if (!(h->flags & SHPCMCIA_FLAG_CARDP)) {
/* call the MI attach function */
pcmcia_card_attach(h->pcmcia);
h->flags |= SHPCMCIA_FLAG_CARDP;
} else {
DPRINTF(("shpcmcia_attach_card: already attached"));
}
}
static void
shpcmcia_detach_card(struct shpcmcia_handle *h, int flags)
{
DPRINTF(("%s\n", __func__));
if (h->flags & SHPCMCIA_FLAG_CARDP) {
h->flags &= ~SHPCMCIA_FLAG_CARDP;
/* call the MI detach function */
pcmcia_card_detach(h->pcmcia, flags);
} else {
DPRINTF(("shpcmcia_detach_card: already detached"));
}
}
static void
shpcmcia_deactivate_card(struct shpcmcia_handle *h)
{
DPRINTF(("%s\n", __func__));
/* call the MI deactivate function */
pcmcia_card_deactivate(h->pcmcia);
shpcmcia_chip_socket_disable(h);
}
#if 0
/*
* interrupt
*/
static int
shpcmcia_card_detect_intr(void *arg)
{
struct shpcmcia_softc *sc = (struct shpcmcia_softc *)arg;
struct shpcmcia_handle *h = &sc->sc_handle[0];
uint16_t reg;
DPRINTF(("%s\n", __func__));
reg = _reg_read_2(SH4_PDTRA);
if (reg & (1 << GPIO_PIN_CARD_CD)) {
/* remove */
if (h->laststate == SHPCMCIA_LASTSTATE_PRESENT) {
/* Deactivate the card now. */
shpcmcia_deactivate_card(h);
shpcmcia_queue_event(h, SHPCMCIA_EVENT_REMOVE);
}
h->laststate = SHPCMCIA_LASTSTATE_EMPTY;
} else {
/* insert */
if (h->laststate != SHPCMCIA_LASTSTATE_PRESENT) {
shpcmcia_queue_event(h, SHPCMCIA_EVENT_INSERT);
}
h->laststate = SHPCMCIA_LASTSTATE_PRESENT;
}
return 1;
}
#else
/*
* card polling
*/
static void
shpcmcia_card_detect_poll(void *arg)
{
struct shpcmcia_softc *sc = (struct shpcmcia_softc *)arg;
struct shpcmcia_handle *h = &sc->sc_handle[0];
uint16_t reg;
DPRINTF(("%s\n", __func__));
reg = _reg_read_2(SH4_PDTRA);
if (reg & (1 << GPIO_PIN_CARD_CD)) {
/* remove */
if (h->laststate == SHPCMCIA_LASTSTATE_PRESENT) {
/* Deactivate the card now. */
shpcmcia_deactivate_card(h);
shpcmcia_queue_event(h, SHPCMCIA_EVENT_REMOVE);
}
h->laststate = SHPCMCIA_LASTSTATE_EMPTY;
} else {
/* insert */
if (h->laststate != SHPCMCIA_LASTSTATE_PRESENT) {
shpcmcia_queue_event(h, SHPCMCIA_EVENT_INSERT);
}
h->laststate = SHPCMCIA_LASTSTATE_PRESENT;
}
callout_schedule(&sc->sc_detect_ch, hz);
}
#endif
/*
* pcmcia chip functions
*/
/* Memory space functions. */
static int
shpcmcia_chip_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size,
struct pcmcia_mem_handle *pmhp)
{
struct shpcmcia_handle *h = (struct shpcmcia_handle *)pch;
struct shpcmcia_softc *sc = h->sc;
DPRINTF(("%s: size=%d\n", __func__, (unsigned)size));
memset(pmhp, 0, sizeof(*pmhp));
pmhp->memt = sc->sc_memt;
pmhp->memh = sc->sc_memh;
pmhp->addr = 0;
pmhp->size = size;
pmhp->realsize = size;
return 0;
}
/*ARGSUSED*/
static void
shpcmcia_chip_mem_free(pcmcia_chipset_handle_t pch,
struct pcmcia_mem_handle *pmhp)
{
DPRINTF(("%s\n", __func__));
}
static int
shpcmcia_chip_mem_map(pcmcia_chipset_handle_t pch, int kind,
bus_addr_t card_addr, bus_size_t size, struct pcmcia_mem_handle *pmhp,
bus_size_t *offsetp, int *windowp)
{
struct shpcmcia_handle *h = (struct shpcmcia_handle *)pch;
struct shpcmcia_softc *sc = h->sc;
int win;
int i;
int s;
DPRINTF(("%s: kind=%#x, card_addr=%#x, size=%d\n",
__func__, kind, (unsigned)card_addr, (unsigned)size));
s = splbio();
win = -1;
for (i = 0; i < SHPCMCIA_MEM_WINS; i++) {
if ((h->memalloc & (1 << i)) == 0) {
win = i;
h->memalloc |= (1 << i);
break;
}
}
splx(s);
if (win == -1)
return 1;
*windowp = win;
*offsetp = 0;
h->mem[win].addr = pmhp->addr;
h->mem[win].size = size;
h->mem[win].offset = (((long)card_addr) - ((long)pmhp->addr));
h->mem[win].kind = kind;
switch (kind) {
case PCMCIA_MEM_ATTR:
DPRINTF(("%s:PCMCIA_MEM_ATTR\n",device_xname(sc->sc_dev)));
pmhp->memh = sc->sc_atth + card_addr;
break;
default:
pmhp->memh = sc->sc_memh + card_addr;
break;
}
return 0;
}
/*ARGSUSED*/
static void
shpcmcia_chip_mem_unmap(pcmcia_chipset_handle_t pch, int window)
{
struct shpcmcia_handle *h = (struct shpcmcia_handle *)pch;
int s;
DPRINTF(("%s\n", __func__));
s = splbio();
h->memalloc &= ~(1 << window);
splx(s);
}
/* I/O space functions. */
static int
shpcmcia_chip_io_alloc(pcmcia_chipset_handle_t pch,
bus_addr_t start, bus_size_t size, bus_size_t align,
struct pcmcia_io_handle *pihp)
{
struct shpcmcia_handle *h = (struct shpcmcia_handle *)pch;
struct shpcmcia_softc *sc = h->sc;
DPRINTF(("%s\n", __func__));
memset(pihp, 0, sizeof(*pihp));
pihp->iot = sc->sc_iot;
pihp->ioh = sc->sc_ioh;
pihp->addr = start;
pihp->size = size;
pihp->flags |= PCMCIA_IO_ALLOCATED;
return 0;
}
/*ARGSUSED*/
static void
shpcmcia_chip_io_free(pcmcia_chipset_handle_t pch,
struct pcmcia_io_handle *pih)
{
DPRINTF(("%s\n", __func__));
}
/*ARGSUSED*/
static int
shpcmcia_chip_io_map(pcmcia_chipset_handle_t pch, int width,
bus_addr_t card_addr, bus_size_t size, struct pcmcia_io_handle *pihp,
int *windowp)
{
struct shpcmcia_handle *h = (struct shpcmcia_handle *)pch;
struct shpcmcia_softc *sc = h->sc;
bus_addr_t ioaddr = pihp->addr + card_addr;
int win;
int i;
int s;
DPRINTF(("%s\n", __func__));
s = splbio();
win = -1;
for (i = 0; i < SHPCMCIA_IO_WINS; i++) {
if ((h->ioalloc & (1 << i)) == 0) {
win = i;
h->ioalloc |= (1 << i);
break;
}
}
splx(s);
if (win == -1)
return 1;
*windowp = win;
/* XXX: IOS16 */
aprint_normal_dev(sc->sc_dev, "port 0x%0lx", (u_long)ioaddr);
if (size > 1)
aprint_normal("-0x%lx", (u_long) ioaddr + (u_long) size - 1);
aprint_normal("\n");
h->io[win].addr = ioaddr;
h->io[win].size = size;
h->io[win].width = width;
return 0;
}
/*ARGSUSED*/
static void
shpcmcia_chip_io_unmap(pcmcia_chipset_handle_t pch, int window)
{
struct shpcmcia_handle *h = (struct shpcmcia_handle *)pch;
int s;
DPRINTF(("%s\n", __func__));
s = splbio();
h->ioalloc &= ~(1 << window);
splx(s);
}
/* Interrupt functions. */
static void *
shpcmcia_chip_intr_establish(pcmcia_chipset_handle_t pch,
struct pcmcia_function *pf, int ipl, int (*ih_func)(void *), void *ih_arg)
{
struct shpcmcia_handle *h = (struct shpcmcia_handle *)pch;
struct shpcmcia_softc *sc = h->sc;
int s;
KASSERT(sc->sc_ih == NULL);
DPRINTF(("%s\n", __func__));
s = splhigh();
sc->sc_ih = extintr_establish(EXTINTR_INTR_CFIREQ, IST_LEVEL, ipl,
ih_func, ih_arg);
if (sc->sc_ih == NULL) {
aprint_error_dev(sc->sc_dev,
"couldn't establish card interrupt\n");
}
splx(s);
return sc->sc_ih;
}
static void
shpcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *cookie)
{
struct shpcmcia_handle *h = (struct shpcmcia_handle *)pch;
struct shpcmcia_softc *sc = h->sc;
int s;
KASSERT(sc->sc_ih != NULL);
DPRINTF(("%s\n", __func__));
s = splhigh();
extintr_disestablish(sc->sc_ih);
sc->sc_ih = NULL;
splx(s);
}
/* Socket functions. */
static void
shpcmcia_chip_socket_enable(pcmcia_chipset_handle_t pch)
{
uint16_t reg;
DPRINTF(("%s\n", __func__));
/* power on the card */
reg = _reg_read_2(SH4_PDTRA);
reg &= ~(1 << GPIO_PIN_CARD_PON);
_reg_write_2(SH4_PDTRA, reg);
/* wait for card ready */
while (_reg_read_1(EXTINTR_STAT1) & MASK1_INT12)
continue;
/* enable bus buffer */
reg = _reg_read_2(SH4_PDTRA);
reg &= ~(1 << GPIO_PIN_CARD_ENABLE);
_reg_write_2(SH4_PDTRA, reg);
/* reset the card */
reg = _reg_read_2(SH4_PDTRA);
reg &= ~(1 << GPIO_PIN_CARD_RESET);
_reg_write_2(SH4_PDTRA, reg);
delay(100 * 1000);
}
/*ARGSUSED*/
static void
shpcmcia_chip_socket_disable(pcmcia_chipset_handle_t pch)
{
uint16_t reg;
DPRINTF(("%s\n", __func__));
/* reset the card */
reg = _reg_read_2(SH4_PDTRA);
reg |= (1 << GPIO_PIN_CARD_RESET);
_reg_write_2(SH4_PDTRA, reg);
/* power off the card */
reg = _reg_read_2(SH4_PDTRA);
reg |= (1 << GPIO_PIN_CARD_PON);
_reg_write_2(SH4_PDTRA, reg);
/* disable bus buffer */
reg = _reg_read_2(SH4_PDTRA);
reg |= (1 << GPIO_PIN_CARD_ENABLE);
_reg_write_2(SH4_PDTRA, reg);
}
/*ARGSUSED*/
static void
shpcmcia_chip_socket_settype(pcmcia_chipset_handle_t pch, int type)
{
DPRINTF(("%s\n", __func__));
}

47
sys/arch/evbsh3/computex7750/clock_machdep.c Normal file
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@ -0,0 +1,47 @@
/* $NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sh3/clock.h>
void
machine_clock_init(void)
{
#if defined(INITTODR_ALWAYS_USE_RTC)
sh_clock_init(SH_CLOCK_NOINITTODR);
#else
sh_clock_init(0);
#endif
}

39
sys/arch/evbsh3/computex7750/computex7750.c Normal file
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@ -0,0 +1,39 @@
/* $NetBSD: computex7750.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: computex7750.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
void machine_init(void);
void
machine_init(void)
{
/* nothing to do */
}

47
sys/arch/evbsh3/computexevb/clock_machdep.c Normal file
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@ -0,0 +1,47 @@
/* $NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sh3/clock.h>
void
machine_clock_init(void)
{
#if defined(INITTODR_ALWAYS_USE_RTC)
sh_clock_init(SH_CLOCK_NOINITTODR);
#else
sh_clock_init(0);
#endif
}

39
sys/arch/evbsh3/computexevb/computexevb.c Normal file
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@ -0,0 +1,39 @@
/* $NetBSD: computexevb.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: computexevb.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $");
void machine_init(void);
void
machine_init(void)
{
/* nothing to do */
}

130
sys/arch/evbsh3/conf/AP_MS104_SH4 Normal file
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@ -0,0 +1,130 @@
# $NetBSD: AP_MS104_SH4,v 1.1 2010/04/06 15:54:29 nonaka Exp $
#
# Alpha project AP-MS104-SH4 config file
#
# for big endian
#include "arch/evbsh3/conf/std.evbsh3.eb"
# for little endian
include "arch/evbsh3/conf/std.evbsh3.el"
include "arch/evbsh3/conf/std.ap_ms104_sh4"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
maxusers 32
# CPU releated options
options SH4_CACHE_DISABLE_EMODE
# kloader-related
options KLOADER
options KLOADER_KERNEL_PATH="\"/netbsd\""
#options KLOADER_DEBUG
# Standard system options
options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
options NTP # NTP phase/frequency locked loop
options KTRACE # system call tracing via ktrace(1)
options SYSVMSG # System V-like message queues
options SYSVSEM # System V-like semaphores
options SYSVSHM # System V-like memory sharing
options USERCONF # userconf(4) support
#options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
# Development and Debugging options
options DIAGNOSTIC # expensive kernel consistency checks
#options DEBUG # expensive debugging checks/support
#options LOCKDEBUG # expensive locking checks/support
#options KMEMSTATS # kernel memory statistics (vmstat -m)
options DDB # in-kernel debugger
#options DDB_ONPANIC=1 # see also sysctl(8): `ddb.onpanic'
options DDB_HISTORY_SIZE=512 # enable history editing in DDB
#options DDB_VERBOSE_HELP
#makeoptions DEBUG="-g" # compile full symbol table
options SYMTAB_SPACE=320000
# Compatibility options
options COMPAT_14 # NetBSD 1.4
options COMPAT_15 # NetBSD 1.5
options COMPAT_16 # NetBSD 1.6
options COMPAT_20 # NetBSD 2.0
options COMPAT_30 # NetBSD 3.0
options COMPAT_40 # NetBSD 4.0
options COMPAT_50 # NetBSD 5.0
options COMPAT_43 # and 4.3BSD
options COMPAT_BSDPTY # /dev/[pt]ty?? ptys.
# File systems
file-system FFS # UFS
file-system KERNFS # /kern
file-system MSDOSFS # MS-DOS file system
file-system NFS # Network File System client
file-system PTYFS # /dev/ptm support
file-system PROCFS # /proc
file-system TMPFS # Efficient memory file-system
# File system options
options FFS_NO_SNAPSHOT # No FFS snapshot support
options WAPBL # File system journaling support - Experimental
# Networking options
options INET # IP + ICMP + TCP + UDP
options INET6 # IPV6
# Kernel root file system and dump configuration.
config netbsd root on ? type ?
options NFS_BOOT_DHCP,NFS_BOOT_BOOTPARAM
#
# Device configuration
#
mainbus0 at root
cpu* at mainbus?
shb* at mainbus?
options SCIFCONSOLE,SCIFCN_SPEED=38400
scif0 at shb?
sci0 at shb?
# Ricoh RS5C316 Real Time Clock
rs5c313rtc0 at mainbus?
# Network interface
sm0 at mainbus? # SMC LAN91C111
sqphy* at mii? phy ? # Seeq 80220/80221/80223 PHYs
# PCMCIA bus support
shpcmcia0 at mainbus?
pcmcia* at shpcmcia?
#options PCMCIAVERBOSE
#options PCMCIACISDEBUG
# IDE and related devices
wdc* at pcmcia? function ?
atabus* at ata?
wd* at atabus? drive ? flags 0x0000
# Pseudo-Devices
# disk/mass storage pseudo-devices
pseudo-device md 1 # memory disk device (ramdisk)
pseudo-device vnd # disk-like interface to files
options VND_COMPRESSION # compressed vnd(4)
# network pseudo-devices
pseudo-device bpfilter # Berkeley packet filter
pseudo-device loop # network loopback
# miscellaneous pseudo-devices
pseudo-device pty # pseudo-terminals
pseudo-device rnd # /dev/random and in-kernel generator
pseudo-device clockctl # user control of clock subsystem
pseudo-device ksyms # /dev/ksyms
# userland interface to drivers, including autoconf and properties retrieval
pseudo-device drvctl

15
sys/arch/evbsh3/conf/AP_MS104_SH4_INSTALL Normal file
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@ -0,0 +1,15 @@
# $NetBSD: AP_MS104_SH4_INSTALL,v 1.1 2010/04/06 15:54:29 nonaka Exp $
#
# Alpha project AP-MS104-SH4 INSTALL config file
#
include "arch/evbsh3/conf/AP_MS104_SH4"
no options KLOADER
# Enable the hooks used for initializing the root memory-disk.
options MEMORY_DISK_HOOKS
options MEMORY_DISK_IS_ROOT # force root on memory disk
options MEMORY_DISK_SERVER=0 # no userspace memory disk support
options MEMORY_DISK_ROOT_SIZE=4096 # size of memory disk, in blocks
options MEMORY_DISK_RBFLAGS=RB_SINGLE # boot in single-user mode

3
sys/arch/evbsh3/conf/COMPUTEX7750
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@ -1,4 +1,4 @@
# $NetBSD: COMPUTEX7750,v 1.27 2009/02/06 18:50:27 jym Exp $
# $NetBSD: COMPUTEX7750,v 1.28 2010/04/06 15:54:30 nonaka Exp $
#
# GENERIC -- everything that's currently supported
#
@ -7,6 +7,7 @@
include "arch/evbsh3/conf/std.evbsh3.eb"
# for little endian
#include "arch/evbsh3/conf/std.evbsh3.el"
include "arch/evbsh3/conf/std.computex7750"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary

3
sys/arch/evbsh3/conf/COMPUTEXEVB
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@ -1,4 +1,4 @@
# $NetBSD: COMPUTEXEVB,v 1.29 2009/02/06 18:50:27 jym Exp $
# $NetBSD: COMPUTEXEVB,v 1.30 2010/04/06 15:54:30 nonaka Exp $
#
# GENERIC -- everything that's currently supported
#
@ -7,6 +7,7 @@
include "arch/evbsh3/conf/std.evbsh3.eb"
# for little endian
#include "arch/evbsh3/conf/std.evbsh3.el"
include "arch/evbsh3/conf/std.computexevb"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary

3
sys/arch/evbsh3/conf/CQREEKSH3
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@ -1,4 +1,4 @@
# $NetBSD: CQREEKSH3,v 1.30 2009/02/06 18:50:27 jym Exp $
# $NetBSD: CQREEKSH3,v 1.31 2010/04/06 15:54:30 nonaka Exp $
#
# GENERIC -- everything that's currently supported
#
@ -7,6 +7,7 @@
include "arch/evbsh3/conf/std.evbsh3.eb"
# for little endian
#include "arch/evbsh3/conf/std.evbsh3.el"
include "arch/evbsh3/conf/std.cqreeksh3"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary

3
sys/arch/evbsh3/conf/KZSH401
View File

@ -1,4 +1,4 @@
# $NetBSD: KZSH401,v 1.27 2009/02/06 18:50:27 jym Exp $
# $NetBSD: KZSH401,v 1.28 2010/04/06 15:54:30 nonaka Exp $
#
# GENERIC -- everything that's currently supported
#
@ -7,6 +7,7 @@
include "arch/evbsh3/conf/std.evbsh3.eb"
# for little endian
#include "arch/evbsh3/conf/std.evbsh3.el"
include "arch/evbsh3/conf/std.kzsh401"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary

5
sys/arch/evbsh3/conf/Makefile.evbsh3.inc Normal file
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@ -0,0 +1,5 @@
# $NetBSD: Makefile.evbsh3.inc,v 1.6 2010/04/06 15:54:30 nonaka Exp $
.if defined(BOARDMKFRAG) # Must be a full pathname.
.include "${BOARDMKFRAG}"
.endif

118
sys/arch/evbsh3/conf/T_SH7706LAN Normal file
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@ -0,0 +1,118 @@
# $NetBSD: T_SH7706LAN,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# TAC T-SH7706LAN Rev.3 config file
#
include "arch/evbsh3/conf/std.evbsh3.el"
include "arch/evbsh3/conf/std.t_sh7706lan"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
maxusers 32
# kloader-related
options KLOADER
options KLOADER_KERNEL_PATH="\"/netbsd\""
#options KLOADER_DEBUG
# Standard system options
options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
options NTP # NTP phase/frequency locked loop
options KTRACE # system call tracing via ktrace(1)
options SYSVMSG # System V-like message queues
options SYSVSEM # System V-like semaphores
options SYSVSHM # System V-like memory sharing
options USERCONF # userconf(4) support
#options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
# Development and Debugging options
options DIAGNOSTIC # expensive kernel consistency checks
#options DEBUG # expensive debugging checks/support
#options LOCKDEBUG # expensive locking checks/support
#options KMEMSTATS # kernel memory statistics (vmstat -m)
options DDB # in-kernel debugger
#options DDB_ONPANIC=1 # see also sysctl(8): `ddb.onpanic'
options DDB_HISTORY_SIZE=512 # enable history editing in DDB
#options DDB_VERBOSE_HELP
#makeoptions DEBUG="-g" # compile full symbol table
options SYMTAB_SPACE=320000
# Compatibility options
options COMPAT_14 # NetBSD 1.4
options COMPAT_15 # NetBSD 1.5
options COMPAT_16 # NetBSD 1.6
options COMPAT_20 # NetBSD 2.0
options COMPAT_30 # NetBSD 3.0
options COMPAT_40 # NetBSD 4.0
options COMPAT_50 # NetBSD 5.0
options COMPAT_43 # and 4.3BSD
options COMPAT_BSDPTY # /dev/[pt]ty?? ptys.
# File systems
file-system FFS # UFS
file-system KERNFS # /kern
file-system MSDOSFS # MS-DOS file system
file-system NFS # Network File System client
file-system PTYFS # /dev/ptm support
file-system PROCFS # /proc
file-system TMPFS # Efficient memory file-system
# File system options
options FFS_NO_SNAPSHOT # No FFS snapshot support
options WAPBL # File system journaling support - Experimental
# Networking options
options INET # IP + ICMP + TCP + UDP
options INET6 # IPV6
# Kernel root file system and dump configuration.
config netbsd root on ? type ?
options NFS_BOOT_DHCP,NFS_BOOT_BOOTPARAM
#
# Device configuration
#
mainbus0 at root
cpu* at mainbus?
shb* at mainbus?
wdog0 at shb?
options SCIFCONSOLE,SCIFCN_SPEED=115200
scif0 at shb?
# Network interface
ne0 at mainbus? # Realtek RTL8019AS
# Serial pheripheral interface for MMC
scimci0 at shb?
sdmmc* at scimci?
#options SCIMCI_DEBUG
#options SDMMC_DEBUG
#options SDMMC_DUMP_CSD
ld* at sdmmc? # MMC card
# Pseudo-Devices
# disk/mass storage pseudo-devices
pseudo-device md 1 # memory disk device (ramdisk)
pseudo-device vnd # disk-like interface to files
options VND_COMPRESSION # compressed vnd(4)
# network pseudo-devices
pseudo-device bpfilter # Berkeley packet filter
pseudo-device ipfilter # IP filter (firewall) and NAT
pseudo-device loop # network loopback
# miscellaneous pseudo-devices
pseudo-device pty # pseudo-terminals
pseudo-device rnd # /dev/random and in-kernel generator
pseudo-device clockctl # user control of clock subsystem
pseudo-device ksyms # /dev/ksyms
# userland interface to drivers, including autoconf and properties retrieval
pseudo-device drvctl

15
sys/arch/evbsh3/conf/T_SH7706LAN_INSTALL Normal file
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@ -0,0 +1,15 @@
# $NetBSD: T_SH7706LAN_INSTALL,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# TAC T-SH7706LAN Rev.3 INSTALL config file
#
include "arch/evbsh3/conf/T_SH7706LAN"
no options KLOADER
# Enable the hooks used for initializing the root memory-disk.
options MEMORY_DISK_HOOKS
options MEMORY_DISK_IS_ROOT # force root on memory disk
options MEMORY_DISK_SERVER=0 # no userspace memory disk support
options MEMORY_DISK_ROOT_SIZE=4096 # size of memory disk, in blocks
options MEMORY_DISK_RBFLAGS=RB_SINGLE # boot in single-user mode

119
sys/arch/evbsh3/conf/T_SH7706LSR Normal file
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@ -0,0 +1,119 @@
# $NetBSD: T_SH7706LSR,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# TAC T-SH7706LSR Rev.1 config file
#
include "arch/evbsh3/conf/std.evbsh3.el"
include "arch/evbsh3/conf/std.t_sh7706lsr"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
maxusers 32
# kloader-related
options KLOADER
options KLOADER_KERNEL_PATH="\"/netbsd\""
#options KLOADER_DEBUG
# Standard system options
options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
options NTP # NTP phase/frequency locked loop
options KTRACE # system call tracing via ktrace(1)
options SYSVMSG # System V-like message queues
options SYSVSEM # System V-like semaphores
options SYSVSHM # System V-like memory sharing
options USERCONF # userconf(4) support
#options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
# Development and Debugging options
options DIAGNOSTIC # expensive kernel consistency checks
#options DEBUG # expensive debugging checks/support
#options LOCKDEBUG # expensive locking checks/support
#options KMEMSTATS # kernel memory statistics (vmstat -m)
options DDB # in-kernel debugger
#options DDB_ONPANIC=1 # see also sysctl(8): `ddb.onpanic'
options DDB_HISTORY_SIZE=512 # enable history editing in DDB
#options DDB_VERBOSE_HELP
#makeoptions DEBUG="-g" # compile full symbol table
options SYMTAB_SPACE=320000
# Compatibility options
options COMPAT_14 # NetBSD 1.4
options COMPAT_15 # NetBSD 1.5
options COMPAT_16 # NetBSD 1.6
options COMPAT_20 # NetBSD 2.0
options COMPAT_30 # NetBSD 3.0
options COMPAT_40 # NetBSD 4.0
options COMPAT_50 # NetBSD 5.0
options COMPAT_43 # and 4.3BSD
options COMPAT_BSDPTY # /dev/[pt]ty?? ptys.
# File systems
file-system FFS # UFS
file-system KERNFS # /kern
file-system MSDOSFS # MS-DOS file system
file-system NFS # Network File System client
file-system PTYFS # /dev/ptm support
file-system PROCFS # /proc
file-system TMPFS # Efficient memory file-system
# File system options
options FFS_NO_SNAPSHOT # No FFS snapshot support
options WAPBL # File system journaling support - Experimental
# Networking options
options INET # IP + ICMP + TCP + UDP
options INET6 # IPV6
# Kernel root file system and dump configuration.
config netbsd root on ? type ?
options NFS_BOOT_DHCP,NFS_BOOT_BOOTPARAM
#
# Device configuration
#
mainbus0 at root
cpu* at mainbus?
shb* at mainbus?
rtc0 at shb?
wdog0 at shb?
options SCIFCONSOLE,SCIFCN_SPEED=115200
scif0 at shb?
# Network interface
ne0 at mainbus? # Realtek RTL8019AS
# MMC SPI
ssumci0 at mainbus?
sdmmc* at ssumci?
#options SCIMCI_DEBUG
#options SDMMC_DEBUG
#options SDMMC_DUMP_CSD
ld* at sdmmc? # MMC card
# Pseudo-Devices
# disk/mass storage pseudo-devices
pseudo-device md 1 # memory disk device (ramdisk)
pseudo-device vnd # disk-like interface to files
options VND_COMPRESSION # compressed vnd(4)
# network pseudo-devices
pseudo-device bpfilter # Berkeley packet filter
pseudo-device ipfilter # IP filter (firewall) and NAT
pseudo-device loop # network loopback
# miscellaneous pseudo-devices
pseudo-device pty # pseudo-terminals
pseudo-device rnd # /dev/random and in-kernel generator
pseudo-device clockctl # user control of clock subsystem
pseudo-device ksyms # /dev/ksyms
# userland interface to drivers, including autoconf and properties retrieval
pseudo-device drvctl

15
sys/arch/evbsh3/conf/T_SH7706LSR_INSTALL Normal file
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@ -0,0 +1,15 @@
# $NetBSD: T_SH7706LSR_INSTALL,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# TAC T-SH7706LSR Rev.1 INSTALL config file
#
include "arch/evbsh3/conf/T_SH7706LSR"
no options KLOADER
# Enable the hooks used for initializing the root memory-disk.
options MEMORY_DISK_HOOKS
options MEMORY_DISK_IS_ROOT # force root on memory disk
options MEMORY_DISK_SERVER=0 # no userspace memory disk support
options MEMORY_DISK_ROOT_SIZE=4096 # size of memory disk, in blocks
options MEMORY_DISK_RBFLAGS=RB_SINGLE # boot in single-user mode

27
sys/arch/evbsh3/conf/files.ap_ms104_sh4 Normal file
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@ -0,0 +1,27 @@
# $NetBSD: files.ap_ms104_sh4,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# Alpha project AP-MS104-SH4 configuration info
file arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4.c
file arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_intr.c
file arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c
file arch/evbsh3/ap_ms104_sh4/clock_machdep.c
# SMC LAN91C111
attach sm at mainbus with sm_mainbus
file arch/evbsh3/ap_ms104_sh4/if_sm_mainbus.c sm_mainbus
# CF slot
device shpcmcia: pcmciabus
attach shpcmcia at mainbus
file arch/evbsh3/ap_ms104_sh4/shpcmcia.c shpcmcia
# Ricoh RS5C316 Real Time Clock
device rs5c313rtc: rs5c313
attach rs5c313rtc at mainbus with rs5c313_mainbus
file arch/evbsh3/ap_ms104_sh4/rs5c316_mainbus.c rs5c313_mainbus
#
# Machine-independent PCMCIA drivers
#
include "dev/pcmcia/files.pcmcia"

6
sys/arch/evbsh3/conf/files.computex7750 Normal file
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@ -0,0 +1,6 @@
# $NetBSD: files.computex7750,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# COMPUTEX7750 configuration info
file arch/evbsh3/computex7750/computex7750.c
file arch/evbsh3/computex7750/clock_machdep.c

6
sys/arch/evbsh3/conf/files.computexevb Normal file
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@ -0,0 +1,6 @@
# $NetBSD: files.computexevb,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# COMPUTEXEVB configuration info
file arch/evbsh3/computexevb/computexevb.c
file arch/evbsh3/computexevb/clock_machdep.c

6
sys/arch/evbsh3/conf/files.cqreeksh3 Normal file
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@ -0,0 +1,6 @@
# $NetBSD: files.cqreeksh3,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# CQREEKSH3 configuration info
file arch/evbsh3/cqreeksh3/cqreeksh3.c
file arch/evbsh3/cqreeksh3/clock_machdep.c

24
sys/arch/evbsh3/conf/files.evbsh3
View File

@ -1,4 +1,4 @@
# $NetBSD: files.evbsh3,v 1.18 2005/12/11 12:17:13 christos Exp $
# $NetBSD: files.evbsh3,v 1.19 2010/04/06 15:54:30 nonaka Exp $
#
# new style config file for sh3 architecture
#
@ -8,10 +8,10 @@ maxpartitions 8
maxusers 2 16 64
file arch/evbsh3/evbsh3/autoconf.c
file arch/evbsh3/evbsh3/bus_dma.c
file arch/evbsh3/evbsh3/conf.c
file arch/evbsh3/evbsh3/machdep.c
file arch/evbsh3/evbsh3/autoconf.c
file arch/evbsh3/evbsh3/clock_machdep.c
file arch/sh3/sh3/disksubr.c disk
defparam opt_memsize.h IOM_ROM_BEGIN IOM_ROM_SIZE IOM_RAM_BEGIN IOM_RAM_SIZE
@ -43,7 +43,7 @@ file dev/md_root.c memory_disk_hooks
define mainbus { }
device mainbus: mainbus
attach mainbus at root
file arch/evbsh3/evbsh3/mainbus.c mainbus
file arch/evbsh3/evbsh3/mainbus.c mainbus
device cpu
attach cpu at mainbus
@ -51,4 +51,20 @@ file arch/sh3/sh3/cpu.c cpu
include "arch/sh3/conf/files.shb"
#
# SH3/4 evaluation board specific devices
#
defparam opt_evbsh3_boardtype.h EVBSH3_BOARDTYPE
#
# kloader
#
defflag opt_kloader.h KLOADER
defflag debug_kloader.h KLOADER_DEBUG
defparam opt_kloader_kernel_path.h KLOADER_KERNEL_PATH
file dev/kloader.c kloader
file arch/evbsh3/evbsh3/kloader_machdep.c kloader
include "arch/evbsh3/conf/majors.evbsh3"

6
sys/arch/evbsh3/conf/files.kzsh401 Normal file
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@ -0,0 +1,6 @@
# $NetBSD: files.kzsh401,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# KZSH401 configuration info
file arch/evbsh3/kzsh401/kzsh401.c
file arch/evbsh3/kzsh401/clock_machdep.c

23
sys/arch/evbsh3/conf/files.t_sh7706lan Normal file
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@ -0,0 +1,23 @@
# $NetBSD: files.t_sh7706lan,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# TAC T-SH7706LAN/T-SH7706LSR configuration info
file arch/evbsh3/t_sh7706lan/clock_machdep.c
file arch/evbsh3/t_sh7706lan/t_sh7706lan.c
file arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c
# Realtek RTL8019AS/AX88796BLF
attach ne at mainbus with ne_mainbus: rtl80x9
file arch/evbsh3/t_sh7706lan/if_ne_mainbus.c ne_mainbus
include "dev/sdmmc/files.sdmmc"
# Serial Peripheral Interface for MMC/SD card
device scimci: sdmmcbus
attach scimci at shb
file arch/evbsh3/t_sh7706lan/scimci.c scimci
# MMC SPI Interface for MMC/SD card
device ssumci: sdmmcbus
attach ssumci at mainbus
file arch/evbsh3/t_sh7706lan/ssumci.c ssumci

5
sys/arch/evbsh3/conf/majors.evbsh3
View File

@ -1,4 +1,4 @@
# $NetBSD: majors.evbsh3,v 1.18 2008/11/12 12:36:00 ad Exp $
# $NetBSD: majors.evbsh3,v 1.19 2010/04/06 15:54:30 nonaka Exp $
#
# Device majors for evbsh3
#
@ -29,7 +29,6 @@ device-major filedesc char 22
device-major bpf char 23 bpfilter
device-major md char 24 block 17 md
device-major tun char 40 tun
device-major vnd char 41 block 14 vnd
device-major audio char 42 audio
@ -46,6 +45,8 @@ device-major clockctl char 52 clockctl
device-major cgd char 54 block 19 cgd
device-major ksyms char 55 ksyms
device-major ld char 69 block 20 ld
device-major nsmb char 98 nsmb
# Majors up to 143 are reserved for machine-dependant drivers.

9
sys/arch/evbsh3/conf/mk.ap_ms104_sh4 Normal file
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@ -0,0 +1,9 @@
# $NetBSD: mk.ap_ms104_sh4,v 1.1 2010/04/06 15:54:30 nonaka Exp $
TEXTADDR="0x8c100000"
SYSTEM_LD_TAIL_EXTRA+=; \
echo ${OBJCOPY} -S -O binary $@ $@.bin; \
${OBJCOPY} -S -O binary $@ $@.bin
EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin@}

1
sys/arch/evbsh3/conf/mk.computex7750 Normal file
View File

@ -0,0 +1 @@
# $NetBSD: mk.computex7750,v 1.1 2010/04/06 15:54:30 nonaka Exp $

1
sys/arch/evbsh3/conf/mk.computexevb Normal file
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@ -0,0 +1 @@
# $NetBSD: mk.computexevb,v 1.1 2010/04/06 15:54:30 nonaka Exp $

1
sys/arch/evbsh3/conf/mk.cqreeksh3 Normal file
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@ -0,0 +1 @@
# $NetBSD: mk.cqreeksh3,v 1.1 2010/04/06 15:54:30 nonaka Exp $

1
sys/arch/evbsh3/conf/mk.kzsh401 Normal file
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@ -0,0 +1 @@
# $NetBSD: mk.kzsh401,v 1.1 2010/04/06 15:54:30 nonaka Exp $

9
sys/arch/evbsh3/conf/mk.t_sh7706lan Normal file
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@ -0,0 +1,9 @@
# $NetBSD: mk.t_sh7706lan,v 1.1 2010/04/06 15:54:30 nonaka Exp $
TEXTADDR="0x8c002000"
SYSTEM_LD_TAIL_EXTRA+=; \
echo ${OBJCOPY} -S -O binary $@ $@.bin; \
${OBJCOPY} -S -O binary $@ $@.bin
EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin@}

23
sys/arch/evbsh3/conf/std.ap_ms104_sh4 Normal file
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@ -0,0 +1,23 @@
# $NetBSD: std.ap_ms104_sh4,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# standard NetBSD/evbsh3 for AP-MS104-SH4 options
# Pull in SH7706LAN config definitions.
include "arch/evbsh3/conf/files.ap_ms104_sh4"
options EXEC_COFF
options SH4
options SH7750R # 235.9296MHz
options PCLOCK=58982400 # 58.9824MHz
options IOM_ROM_BEGIN=0x00000000
options IOM_ROM_SIZE=0x01000000 # 16MiB
options IOM_RAM_BEGIN=0x0c000000
options IOM_RAM_SIZE=0x02000000 # 32MiB
options DONT_INIT_BSC
options EVBSH3_BOARDTYPE="ap_ms104_sh4"
makeoptions BOARDTYPE="ap_ms104_sh4"
makeoptions BOARDMKFRAG="${THISSH3}/conf/mk.ap_ms104_sh4"

10
sys/arch/evbsh3/conf/std.computex7750 Normal file
View File

@ -0,0 +1,10 @@
# $NetBSD: std.computex7750,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# standard NetBSD/evbsh3 for COMPUTEX7750 options
# Pull in COMPUTEX7750 config definitions.
include "arch/evbsh3/conf/files.computex7750"
options EVBSH3_BOARDTYPE="computex7750"
makeoptions BOARDTYPE="computex7750"
makeoptions BOARDMKFRAG="${THISSH3}/conf/mk.computex7750"

10
sys/arch/evbsh3/conf/std.computexevb Normal file
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@ -0,0 +1,10 @@
# $NetBSD: std.computexevb,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# standard NetBSD/evbsh3 for COMPUTEXEVB options
# Pull in COMPUTEXEVB config definitions.
include "arch/evbsh3/conf/files.computexevb"
options EVBSH3_BOARDTYPE="computexevb"
makeoptions BOARDTYPE="computexevb"
makeoptions BOARDMKFRAG="${THISSH3}/conf/mk.computexevb"

10
sys/arch/evbsh3/conf/std.cqreeksh3 Normal file
View File

@ -0,0 +1,10 @@
# $NetBSD: std.cqreeksh3,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# standard NetBSD/evbsh3 for CQREEKSH3 options
# Pull in CQREEKSH3 config definitions.
include "arch/evbsh3/conf/files.cqreeksh3"
options EVBSH3_BOARDTYPE="cqreeksh3"
makeoptions BOARDTYPE="cqreeksh3"
makeoptions BOARDMKFRAG="${THISSH3}/conf/mk.cqreeksh3"

10
sys/arch/evbsh3/conf/std.kzsh401 Normal file
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@ -0,0 +1,10 @@
# $NetBSD: std.kzsh401,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# standard NetBSD/evbsh3 for KZSH401 options
# Pull in KZSH401 config definitions.
include "arch/evbsh3/conf/files.kzsh401"
options EVBSH3_BOARDTYPE="kzsh401"
makeoptions BOARDTYPE="kzsh401"
makeoptions BOARDMKFRAG="${THISSH3}/conf/mk.kzsh401"

31
sys/arch/evbsh3/conf/std.t_sh7706lan Normal file
View File

@ -0,0 +1,31 @@
# $NetBSD: std.t_sh7706lan,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# standard NetBSD/evbsh3 for SH7706LAN options
# Pull in SH7706LAN config definitions.
include "arch/evbsh3/conf/files.t_sh7706lan"
options EXEC_COFF
options SH3
options SH7706 # 132MHz
options PCLOCK=32000000 # 32.000MHz
options IOM_ROM_BEGIN=0x00000000
options IOM_ROM_SIZE=0x00080000 # 512KiB
options IOM_RAM_BEGIN=0x0c000000
options IOM_RAM_SIZE=0x02000000 # 32MiB
options DONT_INIT_BSC
#options BSC_BCR1_VAL=0x7808
#options BSC_BCR2_VAL=0x2980
#options BSC_WCR1_VAL=0x3ff3
#options BSC_WCR2_VAL=0xffff
#options BSC_MCR_VAL=0x526c
#options BSC_RTCSR_VAL=0x000c
#options BSC_RTCOR_VAL=0x0040
#options FRQCR_VAL=0x0101
options EVBSH3_BOARDTYPE=t_sh7706lan
makeoptions BOARDTYPE="t_sh7706lan"
makeoptions BOARDMKFRAG="${THISSH3}/conf/mk.t_sh7706lan"

23
sys/arch/evbsh3/conf/std.t_sh7706lsr Normal file
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@ -0,0 +1,23 @@
# $NetBSD: std.t_sh7706lsr,v 1.1 2010/04/06 15:54:30 nonaka Exp $
#
# standard NetBSD/evbsh3 for SH7706LSR options
# Pull in SH7706LSR config definitions.
include "arch/evbsh3/conf/files.t_sh7706lan"
options EXEC_COFF
options SH3
options SH7706 # 120MHz
options PCLOCK=40000000 # 40.000MHz
options IOM_ROM_BEGIN=0x00000000
options IOM_ROM_SIZE=0x00080000 # 512KiB
options IOM_RAM_BEGIN=0x0c000000
options IOM_RAM_SIZE=0x02000000 # 32MiB
options DONT_INIT_BSC
options EVBSH3_BOARDTYPE=t_sh7706lsr
makeoptions BOARDTYPE="t_sh7706lsr"
makeoptions BOARDMKFRAG="${THISSH3}/conf/mk.t_sh7706lan"

47
sys/arch/evbsh3/cqreeksh3/clock_machdep.c Normal file
View File

@ -0,0 +1,47 @@
/* $NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sh3/clock.h>
void
machine_clock_init(void)
{
#if defined(INITTODR_ALWAYS_USE_RTC)
sh_clock_init(SH_CLOCK_NOINITTODR);
#else
sh_clock_init(0);
#endif
}

39
sys/arch/evbsh3/cqreeksh3/cqreeksh3.c Normal file
View File

@ -0,0 +1,39 @@
/* $NetBSD: cqreeksh3.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: cqreeksh3.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $");
void machine_init(void);
void
machine_init(void)
{
/* nothing to do */
}

9
sys/arch/evbsh3/evbsh3/autoconf.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: autoconf.c,v 1.9 2009/03/18 10:22:28 cegger Exp $ */
/* $NetBSD: autoconf.c,v 1.10 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@ -27,19 +27,24 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.9 2009/03/18 10:22:28 cegger Exp $");
__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.10 2010/04/06 15:54:30 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/conf.h>
extern void machine_init(void);
void
cpu_configure(void)
{
/* Start configuration */
splhigh();
machine_init();
if (config_rootfound("mainbus", NULL) == NULL)
panic("no mainbus found");

752
sys/arch/evbsh3/evbsh3/bus_dma.c Normal file
View File

@ -0,0 +1,752 @@
/* $NetBSD: bus_dma.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $ */
/*
* Copyright (c) 2005 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <sys/mbuf.h>
#include <uvm/uvm_extern.h>
#include <sh3/cache.h>
#include <machine/autoconf.h>
#define _EVBSH3_BUS_DMA_PRIVATE
#include <machine/bus.h>
#if defined(DEBUG) && defined(BUSDMA_DEBUG)
int busdma_debug = 0;
#define DPRINTF(a) if (busdma_debug) printf a
#else
#define DPRINTF(a)
#endif
struct _bus_dma_tag evbsh3_bus_dma = {
._cookie = NULL,
._dmamap_create = _bus_dmamap_create,
._dmamap_destroy = _bus_dmamap_destroy,
._dmamap_load = _bus_dmamap_load,
._dmamap_load_mbuf = _bus_dmamap_load_mbuf,
._dmamap_load_uio = _bus_dmamap_load_uio,
._dmamap_load_raw = _bus_dmamap_load_raw,
._dmamap_unload = _bus_dmamap_unload,
._dmamap_sync = _bus_dmamap_sync,
._dmamem_alloc = _bus_dmamem_alloc,
._dmamem_free = _bus_dmamem_free,
._dmamem_map = _bus_dmamem_map,
._dmamem_unmap = _bus_dmamem_unmap,
._dmamem_mmap = _bus_dmamem_mmap,
};
/*
* Create a DMA map.
*/
int
_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
{
bus_dmamap_t map;
void *mapstore;
size_t mapsize;
DPRINTF(("%s: t = %p, size = %ld, nsegments = %d, maxsegsz = %ld,"
" boundary = %ld, flags = %x\n",
__func__, t, size, nsegments, maxsegsz, boundary, flags));
/*
* Allocate and initialize the DMA map. The end of the map is
* a variable-sized array of segments, so we allocate enough
* room for them in one shot. bus_dmamap_t includes one
* bus_dma_segment_t already, hence the (nsegments - 1).
*
* Note that we don't preserve WAITOK and NOWAIT flags.
* Preservation of ALLOCNOW notifies others that we've
* reserved these resources, and they are not to be freed.
*/
mapsize = sizeof(struct _bus_dmamap)
+ (sizeof(bus_dma_segment_t) * (nsegments - 1));
mapstore = malloc(mapsize, M_DMAMAP, M_ZERO
| ((flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK));
if (mapstore == NULL)
return ENOMEM;
DPRINTF(("%s: dmamp = %p\n", __func__, mapstore));
map = (bus_dmamap_t)mapstore;
map->_dm_size = size;
map->_dm_segcnt = nsegments;
map->_dm_maxsegsz = maxsegsz;
map->_dm_boundary = boundary;
map->_dm_flags = flags & ~(BUS_DMA_WAITOK | BUS_DMA_NOWAIT);
map->dm_mapsize = 0; /* no valid mappings */
map->dm_nsegs = 0;
*dmamp = map;
return 0;
}
/*
* Destroy a DMA map.
*/
void
_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
{
DPRINTF(("%s: t = %p, map = %p\n", __func__, t, map));
free(map, M_DMAMAP);
}
static inline int
_bus_dmamap_load_paddr(bus_dma_tag_t t, bus_dmamap_t map,
paddr_t paddr, vaddr_t vaddr, int size, int *segp, paddr_t *lastaddrp,
int first)
{
bus_dma_segment_t * const segs = map->dm_segs;
bus_addr_t bmask = ~(map->_dm_boundary - 1);
bus_addr_t lastaddr;
int nseg;
int sgsize;
nseg = *segp;
lastaddr = *lastaddrp;
DPRINTF(("%s: t = %p, map = %p, paddr = 0x%08lx,"
" vaddr = 0x%08lx, size = %d\n",
__func__, t, map, paddr, vaddr, size));
DPRINTF(("%s: nseg = %d, bmask = 0x%08lx, lastaddr = 0x%08lx\n",
__func__, nseg, bmask, lastaddr));
do {
sgsize = size;
/*
* Make sure we don't cross any boundaries.
*/
if (map->_dm_boundary > 0) {
bus_addr_t baddr; /* next boundary address */
baddr = (paddr + map->_dm_boundary) & bmask;
if (sgsize > (baddr - paddr))
sgsize = (baddr - paddr);
}
DPRINTF(("%s: sgsize = %d\n", __func__, sgsize));
/*
* Insert chunk coalescing with previous segment if possible.
*/
if (first) {
DPRINTF(("%s: first\n", __func__));
first = 0;
segs[nseg].ds_addr = SH3_PHYS_TO_P2SEG(paddr);
segs[nseg].ds_len = sgsize;
segs[nseg]._ds_vaddr = vaddr;
}
else if ((paddr == lastaddr)
&& (segs[nseg].ds_len + sgsize <= map->_dm_maxsegsz)
&& (map->_dm_boundary == 0 ||
(segs[nseg].ds_addr & bmask) == (paddr & bmask)))
{
DPRINTF(("%s: coalesce\n", __func__));
segs[nseg].ds_len += sgsize;
}
else {
DPRINTF(("%s: new\n", __func__));
++nseg;
if (nseg >= map->_dm_segcnt)
break;
segs[nseg].ds_addr = SH3_PHYS_TO_P2SEG(paddr);
segs[nseg].ds_len = sgsize;
segs[nseg]._ds_vaddr = vaddr;
}
paddr += sgsize;
vaddr += sgsize;
size -= sgsize;
lastaddr = paddr;
DPRINTF(("%s: lastaddr = 0x%08lx, paddr = 0x%08lx,"
" vaddr = 0x%08lx, size = %d\n",
__func__, lastaddr, paddr, vaddr, size));
} while (size > 0);
DPRINTF(("%s: nseg = %d\n", __func__, nseg));
*segp = nseg;
*lastaddrp = lastaddr;
if (size != 0) {
/*
* It didn't fit. If there is a chained window, we
* will automatically fall back to it.
*/
return (EFBIG); /* XXX better return value here? */
}
return (0);
}
static inline int
_bus_bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
bus_size_t buflen, struct proc *p, int flags, int *segp)
{
bus_size_t sgsize;
bus_addr_t curaddr;
bus_size_t len;
paddr_t lastaddr;
vaddr_t vaddr = (vaddr_t)buf;
pmap_t pmap;
int first;
int error;
DPRINTF(("%s: t = %p, map = %p, buf = %p, buflen = %ld,"
" p = %p, flags = %x\n",
__func__, t, map, buf, buflen, p, flags));
if (p != NULL)
pmap = p->p_vmspace->vm_map.pmap;
else
pmap = pmap_kernel();
first = 1;
lastaddr = 0;
len = buflen;
while (len > 0) {
bool mapped;
mapped = pmap_extract(pmap, vaddr, &curaddr);
if (!mapped)
return EFAULT;
sgsize = PAGE_SIZE - (vaddr & PGOFSET);
if (len < sgsize)
sgsize = len;
error = _bus_dmamap_load_paddr(t, map, curaddr, vaddr, sgsize,
segp, &lastaddr, first);
if (error)
return error;
vaddr += sgsize;
len -= sgsize;
first = 0;
}
return 0;
}
/*
* Load a DMA map with a linear buffer.
*/
int
_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
bus_size_t buflen, struct proc *p, int flags)
{
bus_addr_t addr = (bus_addr_t)buf;
paddr_t lastaddr;
int seg;
int first;
int error;
DPRINTF(("%s: t = %p, map = %p, buf = %p, buflen = %ld,"
" p = %p, flags = %x\n",
__func__, t, map, buf, buflen, p, flags));
/* make sure that on error condition we return "no valid mappings" */
map->dm_mapsize = 0;
map->dm_nsegs = 0;
if (buflen > map->_dm_size)
return (EINVAL);
error = 0;
seg = 0;
if (SH3_P1SEG_BASE <= addr && addr + buflen <= SH3_P2SEG_END) {
bus_addr_t curaddr;
bus_size_t sgsize;
bus_size_t len = buflen;
DPRINTF(("%s: P[12]SEG (0x%08lx)\n", __func__, addr));
first = 1;
lastaddr = 0;
while (len > 0) {
curaddr = SH3_P1SEG_TO_PHYS(addr);
sgsize = PAGE_SIZE - ((u_long)addr & PGOFSET);
if (len < sgsize)
sgsize = len;
error = _bus_dmamap_load_paddr(t, map,
curaddr, addr, sgsize,
&seg, &lastaddr, first);
if (error)
break;
addr += sgsize;
len -= sgsize;
first = 0;
}
}
else {
error = _bus_bus_dmamap_load_buffer(t, map, buf, buflen,
p, flags, &seg);
}
if (error)
return (error);
map->dm_nsegs = seg + 1;
map->dm_mapsize = buflen;
return 0;
}
/*
* Like _bus_dmamap_load(), but for mbufs.
*/
int
_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
int flags)
{
struct mbuf *m;
paddr_t lastaddr;
int seg;
int first;
int error;
DPRINTF(("%s: t = %p, map = %p, m0 = %p, flags = %x\n",
__func__, t, map, m0, flags));
/* make sure that on error condition we return "no valid mappings" */
map->dm_nsegs = 0;
map->dm_mapsize = 0;
#ifdef DIAGNOSTIC
if ((m0->m_flags & M_PKTHDR) == 0)
panic("_bus_dmamap_load_mbuf: no packet header");
#endif
if (m0->m_pkthdr.len > map->_dm_size)
return (EINVAL);
seg = 0;
first = 1;
lastaddr = 0;
for (m = m0; m != NULL; m = m->m_next) {
paddr_t paddr;
vaddr_t vaddr;
int size;
if (m->m_len == 0)
continue;
vaddr = (vaddr_t)m->m_data;
size = m->m_len;
if (SH3_P1SEG_BASE <= vaddr && vaddr < SH3_P3SEG_BASE) {
paddr = (paddr_t)(PMAP_UNMAP_POOLPAGE(vaddr));
error = _bus_dmamap_load_paddr(t, map,
paddr, vaddr, size,
&seg, &lastaddr, first);
if (error)
return error;
first = 0;
}
else {
/* XXX: stolen from load_buffer, need to refactor */
while (size > 0) {
bus_size_t sgsize;
bool mapped;
mapped = pmap_extract(pmap_kernel(), vaddr,
&paddr);
if (!mapped)
return EFAULT;
sgsize = PAGE_SIZE - (vaddr & PGOFSET);
if (size < sgsize)
sgsize = size;
error = _bus_dmamap_load_paddr(t, map,
paddr, vaddr, sgsize,
&seg, &lastaddr, first);
if (error)
return error;
vaddr += sgsize;
size -= sgsize;
first = 0;
}
}
}
map->dm_nsegs = seg + 1;
map->dm_mapsize = m0->m_pkthdr.len;
return 0;
}
/*
* Like _bus_dmamap_load(), but for uios.
*/
int
_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
int flags)
{
panic("_bus_dmamap_load_uio: not implemented");
}
/*
* Like _bus_dmamap_load(), but for raw memory allocated with
* bus_dmamem_alloc().
*/
int
_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
{
panic("_bus_dmamap_load_raw: not implemented");
}
/*
* Unload a DMA map.
*/
void
_bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
{
DPRINTF(("%s: t = %p, map = %p\n", __func__, t, map));
map->dm_nsegs = 0;
map->dm_mapsize = 0;
}
/*
* Synchronize a DMA map.
*/
void
_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
bus_size_t len, int ops)
{
bus_size_t minlen;
bus_addr_t addr, naddr;
int i;
DPRINTF(("%s: t = %p, map = %p, offset = %ld, len = %ld, ops = %x\n",
__func__, t, map, offset, len, ops));
#ifdef DIAGNOSTIC
if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
(ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
panic("_bus_dmamap_sync: mix PRE and POST");
if (offset >= map->dm_mapsize)
panic("_bus_dmamap_sync: bad offset");
if ((offset + len) > map->dm_mapsize)
panic("_bus_dmamap_sync: bad length");
#endif
if (!sh_cache_enable_dcache) {
/* Nothing to do */
DPRINTF(("%s: disabled D-Cache\n", __func__));
return;
}
for (i = 0; i < map->dm_nsegs && len != 0; i++) {
/* Find the beginning segment. */
if (offset >= map->dm_segs[i].ds_len) {
offset -= map->dm_segs[i].ds_len;
continue;
}
/*
* Now at the first segment to sync; nail
* each segment until we have exhausted the
* length.
*/
minlen = len < map->dm_segs[i].ds_len - offset ?
len : map->dm_segs[i].ds_len - offset;
addr = map->dm_segs[i]._ds_vaddr;
naddr = addr + offset;
if ((naddr >= SH3_P2SEG_BASE)
&& (naddr + minlen <= SH3_P2SEG_END)) {
DPRINTF(("%s: P2SEG (0x%08lx)\n", __func__, naddr));
offset = 0;
len -= minlen;
continue;
}
DPRINTF(("%s: flushing segment %d "
"(0x%lx+%lx, 0x%lx+0x%lx) (remain = %ld)\n",
__func__, i,
addr, offset, addr, offset + minlen - 1, len));
switch (ops) {
case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
if (SH_HAS_WRITEBACK_CACHE)
sh_dcache_wbinv_range(naddr, minlen);
else
sh_dcache_inv_range(naddr, minlen);
break;
case BUS_DMASYNC_PREREAD:
if (SH_HAS_WRITEBACK_CACHE &&
((naddr | minlen) & (sh_cache_line_size - 1)) != 0)
sh_dcache_wbinv_range(naddr, minlen);
else
sh_dcache_inv_range(naddr, minlen);
break;
case BUS_DMASYNC_PREWRITE:
if (SH_HAS_WRITEBACK_CACHE)
sh_dcache_wb_range(naddr, minlen);
break;
case BUS_DMASYNC_POSTREAD:
case BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE:
sh_dcache_inv_range(naddr, minlen);
break;
}
offset = 0;
len -= minlen;
}
}
/*
* Allocate memory safe for DMA.
*/
int
_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
int flags)
{
extern paddr_t avail_start, avail_end; /* from pmap.c */
struct pglist mlist;
paddr_t curaddr, lastaddr;
struct vm_page *m;
int curseg, error;
DPRINTF(("%s: t = %p, size = %ld, alignment = %ld, boundary = %ld,"
" segs = %p, nsegs = %d, rsegs = %p, flags = %x\n",
__func__, t, size, alignment, boundary,
segs, nsegs, rsegs, flags));
DPRINTF(("%s: avail_start = 0x%08lx, avail_end = 0x%08lx\n",
__func__, avail_start, avail_end));
/* Always round the size. */
size = round_page(size);
/*
* Allocate the pages from the VM system.
*/
error = uvm_pglistalloc(size, avail_start, avail_end - PAGE_SIZE,
alignment, boundary, &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
if (error)
return (error);
/*
* Compute the location, size, and number of segments actually
* returned by the VM code.
*/
m = mlist.tqh_first;
curseg = 0;
lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
segs[curseg].ds_len = PAGE_SIZE;
DPRINTF(("%s: m = %p, lastaddr = 0x%08lx\n", __func__, m, lastaddr));
while ((m = TAILQ_NEXT(m, pageq.queue)) != NULL) {
curaddr = VM_PAGE_TO_PHYS(m);
DPRINTF(("%s: m = %p, curaddr = 0x%08lx, lastaddr = 0x%08lx\n",
__func__, m, curaddr, lastaddr));
if (curaddr == (lastaddr + PAGE_SIZE)) {
segs[curseg].ds_len += PAGE_SIZE;
} else {
DPRINTF(("%s: new segment\n", __func__));
curseg++;
segs[curseg].ds_addr = curaddr;
segs[curseg].ds_len = PAGE_SIZE;
}
lastaddr = curaddr;
}
*rsegs = curseg + 1;
DPRINTF(("%s: curseg = %d, *rsegs = %d\n", __func__, curseg, *rsegs));
return (0);
}
/*
* Common function for freeing DMA-safe memory. May be called by
* bus-specific DMA memory free functions.
*/
void
_bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
{
struct vm_page *m;
bus_addr_t addr;
struct pglist mlist;
int curseg;
DPRINTF(("%s: t = %p, segs = %p, nsegs = %d\n",
__func__, t, segs, nsegs));
/*
* Build a list of pages to free back to the VM system.
*/
TAILQ_INIT(&mlist);
for (curseg = 0; curseg < nsegs; curseg++) {
DPRINTF(("%s: segs[%d]: ds_addr = 0x%08lx, ds_len = %ld\n",
__func__, curseg,
segs[curseg].ds_addr, segs[curseg].ds_len));
for (addr = segs[curseg].ds_addr;
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
addr += PAGE_SIZE)
{
m = PHYS_TO_VM_PAGE(addr);
DPRINTF(("%s: m = %p\n", __func__, m));
TAILQ_INSERT_TAIL(&mlist, m, pageq.queue);
}
}
uvm_pglistfree(&mlist);
}
int
_bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
size_t size, void **kvap, int flags)
{
vaddr_t va, topva;
bus_addr_t addr;
int curseg;
DPRINTF(("%s: t = %p, segs = %p, nsegs = %d, size = %d,"
" kvap = %p, flags = %x\n",
__func__, t, segs, nsegs, size, kvap, flags));
/*
* If we're mapping only a single segment, use direct-mapped
* va, to avoid thrashing the TLB.
*/
if (nsegs == 1) {
if (flags & BUS_DMA_COHERENT)
*kvap = (void *)SH3_PHYS_TO_P2SEG(segs[0].ds_addr);
else
*kvap = (void *)SH3_PHYS_TO_P1SEG(segs[0].ds_addr);
DPRINTF(("%s: addr = 0x%08lx, kva = %p\n",
__func__, segs[0].ds_addr, *kvap));
return 0;
}
/* Always round the size. */
size = round_page(size);
va = uvm_km_alloc(kernel_map, size, 0, UVM_KMF_VAONLY
| ((flags & BUS_DMA_NOWAIT) ? UVM_KMF_NOWAIT : 0));
if (va == 0)
return (ENOMEM);
topva = va;
for (curseg = 0; curseg < nsegs; curseg++) {
DPRINTF(("%s: segs[%d]: ds_addr = 0x%08lx, ds_len = %ld\n",
__func__, curseg,
segs[curseg].ds_addr, segs[curseg].ds_len));
for (addr = segs[curseg].ds_addr;
addr < segs[curseg].ds_addr + segs[curseg].ds_len;
addr += PAGE_SIZE, va += PAGE_SIZE, size -= PAGE_SIZE)
{
if (__predict_false(size == 0))
panic("_bus_dmamem_map: size botch");
pmap_kenter_pa(va, addr,
VM_PROT_READ | VM_PROT_WRITE, 0);
}
}
pmap_update(pmap_kernel());
*kvap = (void *)topva;
return (0);
}
void
_bus_dmamem_unmap(bus_dma_tag_t t, void *kva, size_t size)
{
vaddr_t vaddr = (vaddr_t)kva;
DPRINTF(("%s: t = %p, kva = %p, size = %d\n",
__func__, t, kva, size));
#ifdef DIAGNOSTIC
if (vaddr & PAGE_MASK)
panic("_bus_dmamem_unmap");
#endif
/* nothing to do if we mapped it via P1SEG or P2SEG */
if (SH3_P1SEG_BASE <= vaddr && vaddr <= SH3_P2SEG_END)
return;
size = round_page(size);
pmap_kremove(vaddr, size);
pmap_update(pmap_kernel());
uvm_km_free(kernel_map, vaddr, size, UVM_KMF_VAONLY);
}
paddr_t
_bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
off_t off, int prot, int flags)
{
/* Not implemented. */
return (paddr_t)(-1);
}

166
sys/arch/evbsh3/evbsh3/kloader_machdep.c Normal file
View File

@ -0,0 +1,166 @@
/* $NetBSD: kloader_machdep.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 2001, 2002, 2004 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: kloader_machdep.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $");
#include "debug_kloader.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sh3/mmu.h>
#include <sh3/mmu_sh3.h>
#include <sh3/mmu_sh4.h>
#include <sh3/cache.h>
#include <sh3/cache_sh3.h>
#include <sh3/cache_sh4.h>
#include <machine/kloader.h>
/* make gcc believe __attribute__((__noreturn__)) claim */
#define KLOADER_NORETURN for (;;) continue
kloader_jumpfunc_t kloader_evbsh3_jump __attribute__((__noreturn__));
kloader_bootfunc_t kloader_evbsh3_sh3_boot __attribute__((__noreturn__));
kloader_bootfunc_t kloader_evbsh3_sh4_boot __attribute__((__noreturn__));
static struct kloader_ops kloader_evbsh3_ops = {
.jump = kloader_evbsh3_jump,
.boot = NULL
};
void
kloader_reboot_setup(const char *filename)
{
#if defined(SH3) && defined(SH4)
#error "don't define both SH3 and SH4"
#elif defined(SH3)
kloader_evbsh3_ops.boot = kloader_evbsh3_sh3_boot;
#elif defined(SH4)
kloader_evbsh3_ops.boot = kloader_evbsh3_sh4_boot;
#endif
__kloader_reboot_setup(&kloader_evbsh3_ops, filename);
}
void
kloader_evbsh3_jump(kloader_bootfunc_t func, vaddr_t sp,
struct kloader_bootinfo *info, struct kloader_page_tag *tag)
{
sh_icache_sync_all(); /* also flushes d-cache */
__asm volatile(
"mov %0, r4;"
"mov %1, r5;"
"jmp @%2;"
" mov %3, sp"
: : "r"(info), "r"(tag), "r"(func), "r"(sp));
/* NOTREACHED */
KLOADER_NORETURN;
}
/*
* 2nd-stage bootloader. Fetches new kernel out of the page tags
* chain and copies it to its intended location in memory. Make sure
* this function is position independent and fits into a single page.
*/
#define KLOADER_EVBSH3_BOOT(cpu, product) \
void \
kloader_evbsh3_sh ## cpu ## _boot(struct kloader_bootinfo *kbi, \
struct kloader_page_tag *p) \
{ \
int tmp; \
\
/* Disable interrupts, block exceptions. */ \
__asm volatile( \
"stc sr, %0;" \
"or %1, %0;" \
"ldc %0, sr" \
: "=r"(tmp) \
: "r"(PSL_MD | PSL_BL | PSL_IMASK)); \
\
/* We run on P1, flush and disable TLB. */ \
SH ## cpu ## _TLB_DISABLE; \
\
do { \
uint32_t *dst = (uint32_t *)p->dst; \
uint32_t *src = (uint32_t *)p->src; \
uint32_t sz = p->sz / sizeof (uint32_t); \
while (sz--) \
*dst++ = *src++; \
} while ((p = (struct kloader_page_tag *)p->next) != 0); \
\
SH ## product ## _CACHE_FLUSH(); \
\
/* Jump to the kernel entry point. */ \
__asm volatile( \
"jmp @%0;" \
" nop;" \
: : "r"(kbi->entry)); \
\
/* NOTREACHED */ \
KLOADER_NORETURN; \
}
#ifdef SH3
#if defined(SH7708)
KLOADER_EVBSH3_BOOT(3, 7708A)
#elif defined(SH7708S)
KLOADER_EVBSH3_BOOT(3, 7708S)
#elif defined(SH7708R)
KLOADER_EVBSH3_BOOT(3, 7708R)
#elif defined(SH7709)
KLOADER_EVBSH3_BOOT(3, 7709)
#elif defined(SH7709A)
KLOADER_EVBSH3_BOOT(3, 7709A)
#elif defined(SH7706)
KLOADER_EVBSH3_BOOT(3, 7706)
#else
#error "unsupported SH3 variants"
#endif
#endif
#ifdef SH4
#if defined(SH7750)
KLOADER_EVBSH3_BOOT(4, 7750)
#elif defined(SH7750S)
KLOADER_EVBSH3_BOOT(4, 7750S)
#elif defined(SH7750R)
KLOADER_EVBSH3_BOOT(4, 7750R)
#elif defined(SH7751)
KLOADER_EVBSH3_BOOT(4, 7751)
#elif defined(SH7751R)
KLOADER_EVBSH3_BOOT(4, 7751R)
#else
#error "unsupported SH4 variants"
#endif
#endif

258
sys/arch/evbsh3/evbsh3/machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.70 2009/11/27 03:23:09 rmind Exp $ */
/* $NetBSD: machdep.c,v 1.71 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@ -65,12 +65,14 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.70 2009/11/27 03:23:09 rmind Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.71 2010/04/06 15:54:30 nonaka Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_memsize.h"
#include "opt_initbsc.h"
#include "opt_kloader.h"
#include "opt_kloader_kernel_path.h"
#include <sys/param.h>
#include <sys/systm.h>
@ -99,12 +101,20 @@ __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.70 2009/11/27 03:23:09 rmind Exp $");
#include <ddb/db_extern.h>
#endif
#ifdef KLOADER
#include <machine/kloader.h>
#endif
#include "ksyms.h"
/* the following is used externally (sysctl_hw) */
char machine[] = MACHINE; /* evbsh3 */
char machine_arch[] = MACHINE_ARCH; /* sh3eb or sh3el */
#ifdef KLOADER
struct kloader_bootinfo kbootinfo;
#endif
void initSH3(void *);
void LoadAndReset(const char *);
void XLoadAndReset(char *);
@ -176,6 +186,19 @@ cpu_reboot(int howto, char *bootstr)
goto haltsys;
}
#ifdef KLOADER
if ((howto & RB_HALT) == 0) {
if ((howto & RB_STRING) && (bootstr != NULL)) {
kloader_reboot_setup(bootstr);
}
#ifdef KLOADER_KERNEL_PATH
else {
kloader_reboot_setup(KLOADER_KERNEL_PATH);
}
#endif
}
#endif
boothowto = howto;
if ((howto & RB_NOSYNC) == 0 && waittime < 0) {
waittime = 0;
@ -205,11 +228,21 @@ haltsys:
printf("Please press any key to reboot.\n\n");
cngetc();
}
#ifdef KLOADER
else {
delay(1 * 1000 * 1000);
kloader_reboot();
printf("\n");
printf("Failed to load a new kernel.\n");
printf("Please press any key to reboot.\n\n");
cngetc();
}
#endif
printf("rebooting...\n");
cpu_reset();
for(;;)
;
continue;
/*NOTREACHED*/
}
@ -261,6 +294,11 @@ initSH3(void *pc) /* XXX return address */
/* Console */
consinit();
#ifdef KLOADER
/* copy boot parameter for kloader */
kloader_bootinfo_set(&kbootinfo, 0, NULL, NULL, true);
#endif
/* Load memory to UVM */
kernend = atop(round_page(SH3_P1SEG_TO_PHYS(end)));
physmem = atop(IOM_RAM_SIZE);
@ -303,219 +341,6 @@ consinit(void)
cninit();
}
int
bus_space_map (bus_space_tag_t t, bus_addr_t addr, bus_size_t size, int flags, bus_space_handle_t *bshp)
{
*bshp = (bus_space_handle_t)addr;
return 0;
}
int
sh_memio_subregion(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
{
*nbshp = bsh + offset;
return (0);
}
int
sh_memio_alloc(t, rstart, rend, size, alignment, boundary, flags,
bpap, bshp)
bus_space_tag_t t;
bus_addr_t rstart, rend;
bus_size_t size, alignment, boundary;
int flags;
bus_addr_t *bpap;
bus_space_handle_t *bshp;
{
*bshp = *bpap = rstart;
return (0);
}
void
sh_memio_free(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
{
}
void
sh_memio_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
{
return;
}
#ifdef SH4_PCMCIA
int
shpcmcia_memio_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp)
{
int error;
struct extent *ex;
bus_space_tag_t pt = t & ~SH3_BUS_SPACE_PCMCIA_8BIT;
if (pt != SH3_BUS_SPACE_PCMCIA_IO &&
pt != SH3_BUS_SPACE_PCMCIA_MEM &&
pt != SH3_BUS_SPACE_PCMCIA_ATT) {
*bshp = (bus_space_handle_t)bpa;
return 0;
}
ex = iomem_ex;
#if 0
/*
* Before we go any further, let's make sure that this
* region is available.
*/
error = extent_alloc_region(ex, bpa, size,
EX_NOWAIT | EX_MALLOCOK );
if (error){
printf("sh3_pcmcia_memio_map:extent_alloc_region error\n");
return (error);
}
#endif
/*
* For memory space, map the bus physical address to
* a kernel virtual address.
*/
error = shpcmcia_mem_add_mapping(bpa, size, (int)t, bshp );
#if 0
if (error) {
if (extent_free(ex, bpa, size, EX_NOWAIT | EX_MALLOCOK )) {
printf("sh3_pcmcia_memio_map: pa 0x%lx, size 0x%lx\n",
bpa, size);
printf("sh3_pcmcia_memio_map: can't free region\n");
}
}
#endif
return (error);
}
int
shpcmcia_mem_add_mapping(bus_addr_t bpa, bus_size_t size, int type, bus_space_handle_t *bshp)
{
u_long pa, endpa;
vaddr_t va;
pt_entry_t *pte;
unsigned int m = 0;
int io_type = type & ~SH3_BUS_SPACE_PCMCIA_8BIT;
pa = sh3_trunc_page(bpa);
endpa = sh3_round_page(bpa + size);
#ifdef DIAGNOSTIC
if (endpa <= pa)
panic("sh3_pcmcia_mem_add_mapping: overflow");
#endif
va = uvm_km_alloc(kernel_map, endpa - pa, 0,
UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
if (va == 0){
printf("shpcmcia_add_mapping: nomem \n");
return (ENOMEM);
}
*bshp = (bus_space_handle_t)(va + (bpa & PGOFSET));
#define MODE(t, s) \
(t) & SH3_BUS_SPACE_PCMCIA_8BIT ? \
_PG_PCMCIA_ ## s ## 8 : \
_PG_PCMCIA_ ## s ## 16
switch (io_type) {
default:
panic("unknown pcmcia space.");
/* NOTREACHED */
case SH3_BUS_SPACE_PCMCIA_IO:
m = MODE(type, IO);
break;
case SH3_BUS_SPACE_PCMCIA_MEM:
m = MODE(type, MEM);
break;
case SH3_BUS_SPACE_PCMCIA_ATT:
m = MODE(type, ATTR);
break;
}
#undef MODE
for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, 0);
pte = __pmap_kpte_lookup(va);
KDASSERT(pte);
*pte |= m; /* PTEA PCMCIA assistant bit */
sh_tlb_update(0, va, *pte);
}
return 0;
}
void
shpcmcia_memio_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
{
struct extent *ex;
u_long va, endva;
bus_addr_t bpa;
bus_space_tag_t pt = t & ~SH3_BUS_SPACE_PCMCIA_8BIT;
if (pt != SH3_BUS_SPACE_PCMCIA_IO &&
pt != SH3_BUS_SPACE_PCMCIA_MEM &&
pt != SH3_BUS_SPACE_PCMCIA_ATT) {
return ;
}
ex = iomem_ex;
va = sh3_trunc_page(bsh);
endva = sh3_round_page(bsh + size);
#ifdef DIAGNOSTIC
if (endva <= va)
panic("sh3_pcmcia_memio_unmap: overflow");
#endif
pmap_extract(pmap_kernel(), va, &bpa);
bpa += bsh & PGOFSET;
/*
* Free the kernel virtual mapping.
*/
pmap_kremove(va, endva - va);
pmap_update(pmap_kernel());
uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
#if 0
if (extent_free(ex, bpa, size,
EX_NOWAIT | EX_MALLOCOK)) {
printf("sh3_pcmcia_memio_unmap: %s 0x%lx, size 0x%lx\n",
"pa", bpa, size);
printf("sh3_pcmcia_memio_unmap: can't free region\n");
}
#endif
}
void
shpcmcia_memio_free(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
{
/* sh3_pcmcia_memio_unmap() does all that we need to do. */
shpcmcia_memio_unmap(t, bsh, size);
}
int
shpcmcia_memio_subregion(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
{
*nbshp = bsh + offset;
return (0);
}
#endif /* SH4_PCMCIA */
#if !defined(DONT_INIT_BSC)
/*
* InitializeBsc
@ -755,4 +580,3 @@ intc_intr(int ssr, int spc, int ssp)
break;
}
}

61
sys/arch/evbsh3/evbsh3/mainbus.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: mainbus.c,v 1.7 2008/04/28 20:23:18 martin Exp $ */
/* $NetBSD: mainbus.c,v 1.8 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@ -27,45 +27,64 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.7 2008/04/28 20:23:18 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.8 2010/04/06 15:54:30 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/autoconf.h>
int mainbus_match(struct device *, struct cfdata *, void *);
void mainbus_attach(struct device *, struct device *, void *);
int mainbus_print(void *, const char *);
static int mainbus_match(struct device *, struct cfdata *, void *);
static void mainbus_attach(struct device *, struct device *, void *);
struct mainbus_attach_args mainbusdevs[] = {
{ "cpu" },
{ "shb" },
{ NULL } /* terminator */
};
CFATTACH_DECL(mainbus, sizeof(struct device),
CFATTACH_DECL_NEW(mainbus, sizeof(struct device),
mainbus_match, mainbus_attach, NULL, NULL);
int
mainbus_match(struct device *parent, struct cfdata *cf, void *aux)
static int mainbus_search(device_t, cfdata_t, const int *, void *);
static int mainbus_print(void *, const char *);
static int
mainbus_match(device_t parent, cfdata_t cf, void *aux)
{
return (1);
}
void
mainbus_attach(struct device *parent, struct device *self, void *aux)
static void
mainbus_attach(device_t parent, device_t self, void *aux)
{
struct mainbus_attach_args *ma;
struct mainbus_attach_args maa;
printf("\n");
aprint_naive("\n");
aprint_normal("\n");
for (ma = mainbusdevs; ma->ma_name != NULL; ma++)
config_found(self, ma, mainbus_print);
/* CPU */
memset(&maa, 0, sizeof(maa));
maa.ma_name = "cpu";
config_found_ia(self, "mainbus", &maa, mainbus_print);
/* Devices */
config_search_ia(mainbus_search, self, "mainbus", NULL);
}
int
static int
mainbus_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
{
struct mainbus_attach_args maa;
if (strcmp(cf->cf_name, "cpu") == 0)
return 0;
maa.ma_name = cf->cf_name;
if (config_match(parent, cf, &maa))
config_attach(parent, cf, &maa, mainbus_print);
return 0;
}
static int
mainbus_print(void *aux, const char *pnp)
{

709
sys/arch/evbsh3/include/bus.h
View File

@ -1,7 +1,708 @@
/* $NetBSD: bus.h,v 1.1 1999/09/13 10:30:29 itojun Exp $ */
/* $NetBSD: bus.h,v 1.2 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Christopher G. Demetriou
* for the NetBSD Project.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _EVBSH3_BUS_H_
#define _EVBSH3_BUS_H_
#define _EVBSH3_BUS_H_
#include <sh3/bus.h>
#include <sys/types.h>
#endif /* _EVBSH3_BUS_H_ */
#ifdef _KERNEL
/*
* Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
*/
#if defined(DEBUG) && !defined(BUS_SPACE_DEBUG)
#define BUS_SPACE_DEBUG
#endif
#ifdef BUS_SPACE_DEBUG
#include <sys/systm.h> /* for printf() prototype */
/*
* Macros for checking the aligned-ness of pointers passed to bus
* space ops. Strict alignment is required by the Alpha architecture,
* and a trap will occur if unaligned access is performed. These
* may aid in the debugging of a broken device driver by displaying
* useful information about the problem.
*/
#define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
((((u_long)(p)) & (sizeof(t)-1)) == 0)
#define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
({ \
if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
printf("%s 0x%lx not aligned to %lu bytes %s:%d\n", \
d, (u_long)(p), (u_long)sizeof(t), __FILE__, __LINE__); \
} \
(void) 0; \
})
#define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
#else
#define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0
#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
#endif /* BUS_SPACE_DEBUG */
#endif /* _KERNEL */
typedef u_long bus_addr_t;
typedef u_long bus_size_t;
typedef struct _bus_space *bus_space_tag_t;
typedef u_long bus_space_handle_t;
struct _bus_space {
/* cookie */
void *bs_cookie;
/* mapping/unmapping */
int (*bs_map)(void *, bus_addr_t, bus_size_t,
int, bus_space_handle_t *);
void (*bs_unmap)(void *, bus_space_handle_t,
bus_size_t);
int (*bs_subregion)(void *, bus_space_handle_t,
bus_size_t, bus_size_t, bus_space_handle_t *);
/* allocation/deallocation */
int (*bs_alloc)(void *, bus_addr_t, bus_addr_t,
bus_size_t, bus_size_t, bus_size_t, int,
bus_addr_t *, bus_space_handle_t *);
void (*bs_free)(void *, bus_space_handle_t,
bus_size_t);
/* get kernel virtual address */
void * (*bs_vaddr)(void *, bus_space_handle_t);
/* read (single) */
uint8_t (*bs_r_1)(void *, bus_space_handle_t,
bus_size_t);
uint16_t (*bs_r_2)(void *, bus_space_handle_t,
bus_size_t);
uint32_t (*bs_r_4)(void *, bus_space_handle_t,
bus_size_t);
uint64_t (*bs_r_8)(void *, bus_space_handle_t,
bus_size_t);
/* read multiple */
void (*bs_rm_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
void (*bs_rm_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t *, bus_size_t);
void (*bs_rm_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rm_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* read region */
void (*bs_rr_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
void (*bs_rr_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t *, bus_size_t);
void (*bs_rr_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rr_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* read stream (single) */
uint8_t (*bs_rs_1)(void *, bus_space_handle_t,
bus_size_t);
uint16_t (*bs_rs_2)(void *, bus_space_handle_t,
bus_size_t);
uint32_t (*bs_rs_4)(void *, bus_space_handle_t,
bus_size_t);
uint64_t (*bs_rs_8)(void *, bus_space_handle_t,
bus_size_t);
/* read multiple stream */
void (*bs_rms_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
void (*bs_rms_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t *, bus_size_t);
void (*bs_rms_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rms_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* read region stream */
void (*bs_rrs_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
void (*bs_rrs_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t *, bus_size_t);
void (*bs_rrs_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rrs_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* write (single) */
void (*bs_w_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t);
void (*bs_w_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t);
void (*bs_w_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t);
void (*bs_w_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t);
/* write multiple */
void (*bs_wm_1)(void *, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
void (*bs_wm_2)(void *, bus_space_handle_t,
bus_size_t, const uint16_t *, bus_size_t);
void (*bs_wm_4)(void *, bus_space_handle_t,
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wm_8)(void *, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
/* write region */
void (*bs_wr_1)(void *, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
void (*bs_wr_2)(void *, bus_space_handle_t,
bus_size_t, const uint16_t *, bus_size_t);
void (*bs_wr_4)(void *, bus_space_handle_t,
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wr_8)(void *, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
/* write stream (single) */
void (*bs_ws_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t);
void (*bs_ws_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t);
void (*bs_ws_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t);
void (*bs_ws_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t);
/* write multiple stream */
void (*bs_wms_1)(void *, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
void (*bs_wms_2)(void *, bus_space_handle_t,
bus_size_t, const uint16_t *, bus_size_t);
void (*bs_wms_4)(void *, bus_space_handle_t,
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wms_8)(void *, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
/* write region stream */
void (*bs_wrs_1)(void *, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
void (*bs_wrs_2)(void *, bus_space_handle_t,
bus_size_t, const uint16_t *, bus_size_t);
void (*bs_wrs_4)(void *, bus_space_handle_t,
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wrs_8)(void *, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
/* set multiple */
void (*bs_sm_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t, bus_size_t);
void (*bs_sm_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t, bus_size_t);
void (*bs_sm_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t, bus_size_t);
void (*bs_sm_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t, bus_size_t);
/* set region */
void (*bs_sr_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t, bus_size_t);
void (*bs_sr_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t, bus_size_t);
void (*bs_sr_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t, bus_size_t);
void (*bs_sr_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t, bus_size_t);
/* copy */
void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t);
void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t);
void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t);
void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t);
};
#ifdef _KERNEL
extern struct _bus_space evbsh3_bus_space;
/*
* Utility macros; INTERNAL USE ONLY.
*/
#define __bs_c(a,b) __CONCAT(a,b)
#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
#define __bs_rs(sz, tn, t, h, o) \
(__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"), \
(*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o))
#define __bs_rss(sz, tn, t, h, o) \
(__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"), \
(*(t)->__bs_opname(rs,sz))((t)->bs_cookie, h, o))
#define __bs_ws(sz, tn, t, h, o, v) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \
(*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v); \
} while (0)
#define __bs_wss(sz, tn, t, h, o, v) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \
(*(t)->__bs_opname(ws,sz))((t)->bs_cookie, h, o, v); \
} while (0)
#define __bs_nonsingle(type, sz, tn, t, h, o, a, c) \
do { \
__BUS_SPACE_ADDRESS_SANITY((a), tn, "buffer"); \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \
(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c); \
} while (0)
#define __bs_set(type, sz, tn, t, h, o, v, c) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \
(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c); \
} while (0)
#define __bs_copy(sz, tn, t, h1, o1, h2, o2, cnt) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h1) + (o1), tn, "bus addr 1"); \
__BUS_SPACE_ADDRESS_SANITY((h2) + (o2), tn, "bus addr 2"); \
(*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt); \
} while (0)
/*
* Mapping and unmapping operations.
*/
#define bus_space_map(t, a, s, f, hp) \
(*(t)->bs_map)((t)->bs_cookie, (a), (s), (f), (hp))
#define bus_space_unmap(t, h, s) \
(*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
#define bus_space_subregion(t, h, o, s, hp) \
(*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
#endif /* _KERNEL */
#define BUS_SPACE_MAP_CACHEABLE 0x01
#define BUS_SPACE_MAP_LINEAR 0x02
#define BUS_SPACE_MAP_PREFETCHABLE 0x04
#ifdef _KERNEL
/*
* Allocation and deallocation operations.
*/
#define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
(*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
(f), (ap), (hp))
#define bus_space_free(t, h, s) \
(*(t)->bs_free)((t)->bs_cookie, (h), (s))
/*
* Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
*/
#define bus_space_vaddr(t, h) \
(*(t)->bs_vaddr)((t)->bs_cookie, (h))
/*
* Bus barrier operations. The SH3 does not currently require
* barriers, but we must provide the flags to MI code.
*/
#define bus_space_barrier(t, h, o, l, f) \
((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
#define BUS_SPACE_BARRIER_READ 0x01
#define BUS_SPACE_BARRIER_WRITE 0x02
/*
* Bus read (single) operations.
*/
#define bus_space_read_1(t, h, o) __bs_rs(1,uint8_t,(t),(h),(o))
#define bus_space_read_2(t, h, o) __bs_rs(2,uint16_t,(t),(h),(o))
#define bus_space_read_4(t, h, o) __bs_rs(4,uint32_t,(t),(h),(o))
#define bus_space_read_8(t, h, o) __bs_rs(8,uint64_t,(t),(h),(o))
#define bus_space_read_stream_1(t, h, o) __bs_rss(1,uint8_t,(t),(h),(o))
#define bus_space_read_stream_2(t, h, o) __bs_rss(2,uint16_t,(t),(h),(o))
#define bus_space_read_stream_4(t, h, o) __bs_rss(4,uint32_t,(t),(h),(o))
#define bus_space_read_stream_8(t, h, o) __bs_rss(8,uint64_t,(t),(h),(o))
/*
* Bus read multiple operations.
*/
#define bus_space_read_multi_1(t, h, o, a, c) \
__bs_nonsingle(rm,1,uint8_t,(t),(h),(o),(a),(c))
#define bus_space_read_multi_2(t, h, o, a, c) \
__bs_nonsingle(rm,2,uint16_t,(t),(h),(o),(a),(c))
#define bus_space_read_multi_4(t, h, o, a, c) \
__bs_nonsingle(rm,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_read_multi_8(t, h, o, a, c) \
__bs_nonsingle(rm,8,uint64_t,(t),(h),(o),(a),(c))
#define bus_space_read_multi_stream_1(t, h, o, a, c) \
__bs_nonsingle(rms,1,uint8_t,(t),(h),(o),(a),(c))
#define bus_space_read_multi_stream_2(t, h, o, a, c) \
__bs_nonsingle(rms,2,uint16_t,(t),(h),(o),(a),(c))
#define bus_space_read_multi_stream_4(t, h, o, a, c) \
__bs_nonsingle(rms,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_read_multi_stream_8(t, h, o, a, c) \
__bs_nonsingle(rms,8,uint64_t,(t),(h),(o),(a),(c))
/*
* Bus read region operations.
*/
#define bus_space_read_region_1(t, h, o, a, c) \
__bs_nonsingle(rr,1,uint8_t,(t),(h),(o),(a),(c))
#define bus_space_read_region_2(t, h, o, a, c) \
__bs_nonsingle(rr,2,uint16_t,(t),(h),(o),(a),(c))
#define bus_space_read_region_4(t, h, o, a, c) \
__bs_nonsingle(rr,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_read_region_8(t, h, o, a, c) \
__bs_nonsingle(rr,8,uint64_t,(t),(h),(o),(a),(c))
#define bus_space_read_region_stream_1(t, h, o, a, c) \
__bs_nonsingle(rrs,1,uint8_t,(t),(h),(o),(a),(c))
#define bus_space_read_region_stream_2(t, h, o, a, c) \
__bs_nonsingle(rrs,2,uint16_t,(t),(h),(o),(a),(c))
#define bus_space_read_region_stream_4(t, h, o, a, c) \
__bs_nonsingle(rrs,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_read_region_stream_8(t, h, o, a, c) \
__bs_nonsingle(rrs,8,uint64_t,(t),(h),(o),(a),(c))
/*
* Bus write (single) operations.
*/
#define bus_space_write_1(t, h, o, v) __bs_ws(1,uint8_t,(t),(h),(o),(v))
#define bus_space_write_2(t, h, o, v) __bs_ws(2,uint16_t,(t),(h),(o),(v))
#define bus_space_write_4(t, h, o, v) __bs_ws(4,uint32_t,(t),(h),(o),(v))
#define bus_space_write_8(t, h, o, v) __bs_ws(8,uint64_t,(t),(h),(o),(v))
#define bus_space_write_stream_1(t, h, o, v) \
__bs_wss(1,uint8_t,(t),(h),(o),(v))
#define bus_space_write_stream_2(t, h, o, v) \
__bs_wss(2,uint16_t,(t),(h),(o),(v))
#define bus_space_write_stream_4(t, h, o, v) \
__bs_wss(4,uint32_t,(t),(h),(o),(v))
#define bus_space_write_stream_8(t, h, o, v) \
__bs_wss(8,uint64_t,(t),(h),(o),(v))
/*
* Bus write multiple operations.
*/
#define bus_space_write_multi_1(t, h, o, a, c) \
__bs_nonsingle(wm,1,uint8_t,(t),(h),(o),(a),(c))
#define bus_space_write_multi_2(t, h, o, a, c) \
__bs_nonsingle(wm,2,uint16_t,(t),(h),(o),(a),(c))
#define bus_space_write_multi_4(t, h, o, a, c) \
__bs_nonsingle(wm,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_write_multi_8(t, h, o, a, c) \
__bs_nonsingle(wm,8,uint64_t,(t),(h),(o),(a),(c))
#define bus_space_write_multi_stream_1(t, h, o, a, c) \
__bs_nonsingle(wms,1,uint8_t,(t),(h),(o),(a),(c))
#define bus_space_write_multi_stream_2(t, h, o, a, c) \
__bs_nonsingle(wms,2,uint16_t,(t),(h),(o),(a),(c))
#define bus_space_write_multi_stream_4(t, h, o, a, c) \
__bs_nonsingle(wms,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_write_multi_stream_8(t, h, o, a, c) \
__bs_nonsingle(wms,8,uint64_t,(t),(h),(o),(a),(c))
/*
* Bus write region operations.
*/
#define bus_space_write_region_1(t, h, o, a, c) \
__bs_nonsingle(wr,1,uint8_t,(t),(h),(o),(a),(c))
#define bus_space_write_region_2(t, h, o, a, c) \
__bs_nonsingle(wr,2,uint16_t,(t),(h),(o),(a),(c))
#define bus_space_write_region_4(t, h, o, a, c) \
__bs_nonsingle(wr,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_write_region_8(t, h, o, a, c) \
__bs_nonsingle(wr,8,uint64_t,(t),(h),(o),(a),(c))
#define bus_space_write_region_stream_1(t, h, o, a, c) \
__bs_nonsingle(wrs,1,uint8_t,(t),(h),(o),(a),(c))
#define bus_space_write_region_stream_2(t, h, o, a, c) \
__bs_nonsingle(wrs,2,uint16_t,(t),(h),(o),(a),(c))
#define bus_space_write_region_stream_4(t, h, o, a, c) \
__bs_nonsingle(wrs,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_write_region_stream_8(t, h, o, a, c) \
__bs_nonsingle(wrs,8,uint64_t,(t),(h),(o),(a),(c))
/*
* Set multiple operations.
*/
#define bus_space_set_multi_1(t, h, o, v, c) \
__bs_set(sm,1,uint8_t,(t),(h),(o),(v),(c))
#define bus_space_set_multi_2(t, h, o, v, c) \
__bs_set(sm,2,uint16_t,(t),(h),(o),(v),(c))
#define bus_space_set_multi_4(t, h, o, v, c) \
__bs_set(sm,4,uint32_t,(t),(h),(o),(v),(c))
#define bus_space_set_multi_8(t, h, o, v, c) \
__bs_set(sm,8,uint64_t,(t),(h),(o),(v),(c))
/*
* Set region operations.
*/
#define bus_space_set_region_1(t, h, o, v, c) \
__bs_set(sr,1,uint8_t,(t),(h),(o),(v),(c))
#define bus_space_set_region_2(t, h, o, v, c) \
__bs_set(sr,2,uint16_t,(t),(h),(o),(v),(c))
#define bus_space_set_region_4(t, h, o, v, c) \
__bs_set(sr,4,uint32_t,(t),(h),(o),(v),(c))
#define bus_space_set_region_8(t, h, o, v, c) \
__bs_set(sr,8,uint64_t,(t),(h),(o),(v),(c))
/*
* Copy region operations.
*/
#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
__bs_copy(1, uint8_t, (t), (h1), (o1), (h2), (o2), (c))
#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
__bs_copy(2, uint16_t, (t), (h1), (o1), (h2), (o2), (c))
#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
__bs_copy(4, uint32_t, (t), (h1), (o1), (h2), (o2), (c))
#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
__bs_copy(8, uint64_t, (t), (h1), (o1), (h2), (o2), (c))
/*
* Bus stream operations--defined in terms of non-stream counterparts
*/
#define __BUS_SPACE_HAS_STREAM_METHODS
#endif /* _KERNEL */
/*
* Flags used in various bus DMA methods.
*/
#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
#define BUS_DMA_COHERENT 0x004 /* map memory to not require sync */
#define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
#define BUS_DMA_BUS2 0x020
#define BUS_DMA_BUS3 0x040
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;
struct uio;
/*
* Operations performed by bus_dmamap_sync().
*/
#define BUS_DMASYNC_PREREAD 0x01
#define BUS_DMASYNC_POSTREAD 0x02
#define BUS_DMASYNC_PREWRITE 0x04
#define BUS_DMASYNC_POSTWRITE 0x08
typedef struct _bus_dma_tag *bus_dma_tag_t;
typedef struct _bus_dmamap *bus_dmamap_t;
#define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
/*
* bus_dma_segment_t
*
* Describes a single contiguous DMA transaction. Values
* are suitable for programming into DMA registers.
*/
struct _bus_dma_segment {
bus_addr_t ds_addr; /* DMA address */
bus_size_t ds_len; /* length of transfer */
/* private section */
bus_addr_t _ds_vaddr; /* virtual address */
};
typedef struct _bus_dma_segment bus_dma_segment_t;
/*
* bus_dma_tag_t
*
* A machine-dependent opaque type describing the implementation of
* DMA for a given bus.
*/
struct _bus_dma_tag {
void *_cookie; /* cookie used in the guts */
/*
* DMA mapping methods.
*/
int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
bus_size_t, bus_size_t, int, bus_dmamap_t *);
void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
bus_size_t, struct proc *, int);
int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
struct mbuf *, int);
int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
struct uio *, int);
int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
bus_dma_segment_t *, int, bus_size_t, int);
void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
bus_addr_t, bus_size_t, int);
/*
* DMA memory utility functions.
*/
int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
bus_size_t, bus_dma_segment_t *, int, int *, int);
void (*_dmamem_free)(bus_dma_tag_t,
bus_dma_segment_t *, int);
int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
int, size_t, void **, int);
void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
int, off_t, int, int);
};
#define bus_dmamap_create(t, s, n, m, b, f, p) \
(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
#define bus_dmamap_destroy(t, p) \
(*(t)->_dmamap_destroy)((t), (p))
#define bus_dmamap_load(t, m, b, s, p, f) \
(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
#define bus_dmamap_load_mbuf(t, m, b, f) \
(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
#define bus_dmamap_load_uio(t, m, u, f) \
(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
#define bus_dmamap_unload(t, p) \
(*(t)->_dmamap_unload)((t), (p))
#define bus_dmamap_sync(t, m, o, l, op) \
(void)((t)->_dmamap_sync ? \
(*(t)->_dmamap_sync)((t), (m), (o), (l), (op)) : (void)0)
#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
#define bus_dmamem_free(t, sg, n) \
(*(t)->_dmamem_free)((t), (sg), (n))
#define bus_dmamem_map(t, sg, n, s, k, f) \
(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
#define bus_dmamem_unmap(t, k, s) \
(*(t)->_dmamem_unmap)((t), (k), (s))
#define bus_dmamem_mmap(t, sg, n, o, p, f) \
(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
#define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
#define bus_dmatag_destroy(t)
/*
* bus_dmamap_t
*
* Describes a DMA mapping.
*/
struct _bus_dmamap {
/*
* PRIVATE MEMBERS: not for use my machine-independent code.
*/
bus_size_t _dm_size; /* largest DMA transfer mappable */
int _dm_segcnt; /* number of segs this map can map */
bus_size_t _dm_maxsegsz; /* largest possible segment */
bus_size_t _dm_boundary; /* don't cross this */
int _dm_flags; /* misc. flags */
void *_dm_cookie; /* cookie for bus-specific functions */
/*
* PUBLIC MEMBERS: these are used by machine-independent code.
*/
bus_size_t dm_mapsize; /* size of the mapping */
int dm_nsegs; /* # valid segments in mapping */
bus_dma_segment_t dm_segs[1]; /* segments; variable length */
};
#if defined(_EVBSH3_BUS_DMA_PRIVATE)
int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
bus_size_t, int, bus_dmamap_t *);
void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t,
struct proc *, int);
int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *,int);
int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, bus_dma_segment_t *,
int, bus_size_t, int);
void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
bus_size_t, int);
int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs,
int nsegs, int *rsegs, int flags);
void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs);
int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs,
size_t size, void **kvap, int flags);
void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size);
paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs, off_t off, int prot, int flags);
#endif /* _EVBSH3_BUS_DMA_PRIVATE */
#endif /* _EVBSH3_BUS_H_ */

4
sys/arch/evbsh3/include/intr.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.13 2008/04/28 20:23:18 martin Exp $ */
/* $NetBSD: intr.h,v 1.14 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@ -32,7 +32,7 @@
#include <sh3/intr.h>
/* Number of interrupt source */
#define _INTR_N 11 /* TMU0, TMU1, TMU2, (SCIF and SCI) * 4 */
#define _INTR_N 16 /* TMU0, TMU1, TMU2, (SCIF and SCI) * 4 */
/* Interrupt priority levels */
#define IPL_VM 12

38
sys/arch/evbsh3/include/kloader.h Normal file
View File

@ -0,0 +1,38 @@
/* $NetBSD: kloader.h,v 1.1 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 2002, 2004 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _EVBSH3_KLOADER_H_
#define _EVBSH3_KLOADER_H_
#define PG_VADDR(pg) SH3_PHYS_TO_P1SEG(VM_PAGE_TO_PHYS(pg))
#define KLOADER_NO_BOOTINFO
#include <dev/kloader.h>
#endif /* _EVBSH3_KLOADER_H_ */

47
sys/arch/evbsh3/kzsh401/clock_machdep.c Normal file
View File

@ -0,0 +1,47 @@
/* $NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sh3/clock.h>
void
machine_clock_init(void)
{
#if defined(INITTODR_ALWAYS_USE_RTC)
sh_clock_init(SH_CLOCK_NOINITTODR);
#else
sh_clock_init(0);
#endif
}

39
sys/arch/evbsh3/kzsh401/kzsh401.c Normal file
View File

@ -0,0 +1,39 @@
/* $NetBSD: kzsh401.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: kzsh401.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $");
void machine_init(void);
void
machine_init(void)
{
/* nothing to do */
}

5
sys/arch/evbsh3/stand/Makefile Normal file
View File

@ -0,0 +1,5 @@
# $NetBSD: Makefile,v 1.1 2010/04/06 15:54:30 nonaka Exp $
SUBDIR= mesboot
.include <bsd.subdir.mk>

286
sys/arch/evbsh3/stand/mesboot/binary/mesboot.exe.uue Normal file
View File

@ -0,0 +1,286 @@
begin 644 mesboot.exe
M!0``!P```````!NH```!&0```@`N<W1A8VL`````!@````8`````````````
M````````````````````+G1E>'0`````````````````$Q````$L```60```
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M```````N9&%T80``````$Q```!,0````(```%#P``!JP```````!``````!`
M+F=O=````````!,P```3,````````````````````````````````"YB<W,`
M```````3,```$S`````0`````````````````````````(`N8V]M;65N=```
M```````````!X```%%P```````````````````(`T`=`"P`)9`/0!D`+``FO
M_@`)``L`"0`)``D`"0`)``D```'@```$<``)``D`"0`)#0I.971"4T0@8F]O
M="!L;V%D97(@=F5R+C`N,@T*```E<R!;+6A=(%LM,%T@6VME<FYE;"!B:6YA
M<GD@:6UA9V4@9FEL95T*````"0`)``DOAB_FV`=/(M0'2`MN\]$'U`=("V42
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M`%-$4D%-(&YO="!F;W5N9"$A#0H`;65M/38T32!C;VYS;VQE/71T>5-#,2PQ
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M````````7U]?97AI=`````1P``(```(``````````8$``!,P``4```(`7W1R
M87````````\P``(```(`7U]?9G)E90````\0``(```(`7W-L965P``````[`
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M9&%T80```!,0``0```(`7V5T97AT`````!,0``(```(`7V=O=%]E;F0``!,P
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M8R]A<'`O<VAC<G0P+E,`7W1U<F)O7VUO9&4`7W!R;V=N86UE`%]?7W9P<FEN
M=&8`7U]?=G-C86YF`"XN+RXN+RXN+RXN+RXN+RXN+RXN+VYE=VQI8B]L:6)C
M+VUA8VAI;F4O<V@O;65M<V5T+E,`0SI<;7-Y<UPQ+C!<:&]M95QK:6MA:5QN
M97=L:6(M,2XQ,BXP7&)U:6QD7'-H+6-O9F9<;3)<;F5W;&EB7&QI8F-<;6%C
M:&EN95QS:"\O`#RELZ7>I?.ER:7II:2E\SX`+BXO+BXO+BXO+BXO+BXO+BXO
M+BXO;F5W;&EB+VQI8F,O;6%C:&EN92]S:"]A<VTN:``N+B\N+B\N+B\N+B\N
M+B\N+B\N+B]N97=L:6(O;&EB8R]M86-H:6YE+W-H+VUE;6-P>2Y3`%]?8W1Y
M<&5?8@`N+B\N+B\N+B\N+B\N+B\N+B\N+B]N97=L:6(O;&EB8R]M86-H:6YE
M+W-H+W-T<FQE;BY3`%]G;W1?<W1A<G0`7U]?<')I;G1F`%]H=U]C;VYF:6<`
M7V)S<U]S=&%R=`!?7U]G971C:&%R`%]?7W-P<FEN=&8`7U]?<W-C86YF`%]?
M7V1O7V=L;V)A;%]D=&]R<P!?7U]F<')I;G1F`%]?7W!U=&-H87(`7U]?9G-C
M86YF`%]?7V-T;W)S7V5N9`!?7U]D;U]G;&]B86Q?8W1O<G,`7U]?8W1Y<&5?
;<'1R`%]?7VUA;&QO8P!?7U]D=&]R<U]E;F0`
`
end

109
sys/arch/evbsh3/stand/mesboot/src/mesboot.c Normal file
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@ -0,0 +1,109 @@
/* $NetBSD: mesboot.c,v 1.1 2010/04/06 15:54:30 nonaka Exp $ */
#include <macro.h>
#include <mes2.h>
#include <h8/reg770x.h>
#include <string.h>
#define NBBOOT_VERSION "0.2"
#define KERNEL_TEXTADDR 0x8c002000
static const char *progname;
static int turbo_mode = 1;
void
usage(void)
{
printf("\r\nNetBSD boot loader ver." NBBOOT_VERSION "\r\n");
printf("%s [-h] [-0] [kernel binary image file]\n", progname);
exit(1);
}
int
main(int argc, char **argv)
{
char *kernel;
char *ptr, *mem, *rdptr;
void (*func)();
int fd, size, c;
int i;
progname = argv[0];
/* getopt... */
for (i = 1; i < argc; i++) {
if (argv[i][0] != '-') {
if (kernel == NULL) {
kernel = argv[i];
}
} else if (argv[i][0] == '-') {
if (argv[i][1] == '0') {
turbo_mode = !turbo_mode;
} else {
usage();
}
}
}
if (kernel == NULL)
kernel = "/mmc0/netbsd.bin";
printf("\r\nNetBSD boot loader ver." NBBOOT_VERSION "\r\n");
rdptr = 0;
ptr = malloc(0x2000);
if (ptr == 0) {
printf("No memory\r\n");
return -1;
}
memset(ptr, 0, 0x2000);
fd = open(kernel, OptRead);
if (fd == -1) {
free(ptr);
printf("can't open %s\r\n", kernel);
return -1;
}
switch(MCR) {
case 0x5224:
strcpy(ptr + 0x1100, "mem=8M console=ttySC1,115200 root=/dev/shmmc2");
break;
case 0x522c:
strcpy(ptr + 0x1100, "mem=16M console=ttySC1,115200 root=/dev/shmmc2");
break;
case 0x526c:
strcpy(ptr + 0x1100, "mem=32M console=ttySC1,115200 root=/dev/shmmc2");
break;
case 0x5274:
strcpy(ptr + 0x1100, "mem=64M console=ttySC1,115200 root=/dev/shmmc2");
break;
default:
printf("SDRAM not found!!\r\n");
return -1;
}
mem = (char *)KERNEL_TEXTADDR;
func = (void *)KERNEL_TEXTADDR;
printf("NetBSD kernel loading.");
c = 0;
do {
size = read(fd, mem, 0x4000);
mem = &mem[0x4000];
if((++c & 0x7) == 0) putchar('.');
} while (size == 0x4000);
putchar('\r'), putchar('\n');
close(fd);
if (turbo_mode)
hw_config(HW_CONFIG_TURBO, 1, 0);
sleep(500);
INT_DISABLE();
WTCSR_WR = 0xa500;
memcpy((char *)0x8c000000, ptr, 0x2000);
(*func)();
/*NOTREACHED*/
return 0;
}

44
sys/arch/evbsh3/t_sh7706lan/clock_machdep.c Normal file
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@ -0,0 +1,44 @@
/* $NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: clock_machdep.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sh3/clock.h>
#include <evbsh3/t_sh7706lan/t_sh7706lanvar.h>
void
machine_clock_init(void)
{
sh_clock_init(IS_SH7706LSR ? 0 : SH_CLOCK_NORTC);
}

189
sys/arch/evbsh3/t_sh7706lan/if_ne_mainbus.c Normal file
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@ -0,0 +1,189 @@
/* $NetBSD: if_ne_mainbus.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBS$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/mbuf.h>
#include <sys/socket.h>
#include <sys/ioctl.h>
#include <sys/errno.h>
#include <sys/syslog.h>
#include <sys/select.h>
#include <sys/device.h>
#include <net/if.h>
#include <net/if_dl.h>
#include <net/if_ether.h>
#include <net/if_media.h>
#include <sys/intr.h>
#include <sys/bus.h>
#include <dev/ic/dp8390reg.h>
#include <dev/ic/dp8390var.h>
#include <dev/ic/ne2000reg.h>
#include <dev/ic/ne2000var.h>
#include <machine/autoconf.h>
#include <sh3/exception.h>
static int ne_mainbus_match(device_t, cfdata_t, void *);
static void ne_mainbus_attach(device_t, device_t, void *);
struct ne_mainbus_softc {
struct ne2000_softc sc_ne2000; /* real "ne2000" softc */
void *sc_ih; /* interrupt cookie */
};
CFATTACH_DECL_NEW(ne_mainbus, sizeof(struct ne_mainbus_softc),
ne_mainbus_match, ne_mainbus_attach, NULL, NULL);
extern struct _bus_space t_sh7706lan_bus_io;
static int
ne_mainbus_match(device_t parent, cfdata_t cf, void *aux)
{
struct mainbus_attach_args *maa = (struct mainbus_attach_args *)aux;
bus_space_tag_t nict = &t_sh7706lan_bus_io;
bus_space_handle_t nich;
bus_space_tag_t asict;
bus_space_handle_t asich;
int rv = 0;
if (strcmp(maa->ma_name, "ne") != 0)
return 0;
/* Map i/o space. */
if (bus_space_map(nict, 0x10000300, NE2000_NPORTS, 0, &nich))
return 0;
asict = nict;
if (bus_space_subregion(nict, nich, NE2000_ASIC_OFFSET,
NE2000_ASIC_NPORTS, &asich))
goto out;
/* Look for an NE2000-compatible card. */
rv = ne2000_detect(nict, nich, asict, asich);
out:
bus_space_unmap(nict, nich, NE2000_NPORTS);
return rv;
}
static void
ne_mainbus_attach(device_t parent, device_t self, void *aux)
{
struct ne_mainbus_softc *msc = device_private(self);
struct ne2000_softc *nsc = &msc->sc_ne2000;
struct dp8390_softc *dsc = &nsc->sc_dp8390;
bus_space_tag_t nict = &t_sh7706lan_bus_io;
bus_space_handle_t nich;
bus_space_tag_t asict = nict;
bus_space_handle_t asich;
const char *typestr;
int netype;
dsc->sc_dev = self;
aprint_naive("\n");
aprint_normal("\n");
/* Map i/o space. */
if (bus_space_map(nict, 0x10000300, NE2000_NPORTS, 0, &nich)){
aprint_error_dev(self, "can't map i/o space\n");
return;
}
if (bus_space_subregion(nict, nich, NE2000_ASIC_OFFSET,
NE2000_ASIC_NPORTS, &asich)) {
aprint_error_dev(self, "can't subregion i/o space\n");
bus_space_unmap(nict, nich, NE2000_NPORTS);
return;
}
dsc->sc_regt = nict;
dsc->sc_regh = nich;
nsc->sc_asict = asict;
nsc->sc_asich = asich;
/*
* Detect it again, so we can print some information about the
* interface.
*/
netype = ne2000_detect(nict, nich, asict, asich);
switch (netype) {
case NE2000_TYPE_NE1000:
typestr = "NE1000";
break;
case NE2000_TYPE_NE2000:
typestr = "NE2000";
break;
case NE2000_TYPE_RTL8019:
typestr = "NE2000 (RTL8019)";
break;
default:
aprint_error_dev(self, "where did the card go?!\n");
bus_space_unmap(nict, nich, NE2000_NPORTS);
return;
}
aprint_normal_dev(self, "%s Ethernet\n", typestr);
/* This interface is always enabled. */
dsc->sc_enabled = 1;
/* force 8bit */
nsc->sc_quirk |= NE2000_QUIRK_8BIT;
/*
* Do generic NE2000 attach. This will read the station address
* from the EEPROM.
*/
ne2000_attach(nsc, NULL);
/* Establish the interrupt handler. */
msc->sc_ih = intc_intr_establish(SH7709_INTEVT2_IRQ2, IST_LEVEL,
IPL_NET, dp8390_intr, dsc);
if (msc->sc_ih == NULL)
aprint_error_dev(self,
"couldn't establish interrupt handler\n");
}

658
sys/arch/evbsh3/t_sh7706lan/scimci.c Normal file
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@ -0,0 +1,658 @@
/* $NetBSD: scimci.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*-
* Copyright (c) 2009 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Serial Peripheral interface driver to access MMC card
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: scimci.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $");
#include <sys/param.h>
#include <sys/device.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/proc.h>
#include <sys/bus.h>
#include <sys/intr.h>
#include <sh3/devreg.h>
#include <sh3/pfcreg.h>
#include <sh3/scireg.h>
#include <dev/sdmmc/sdmmcvar.h>
#include <dev/sdmmc/sdmmcchip.h>
#include <evbsh3/t_sh7706lan/t_sh7706lanvar.h>
#ifdef SCIMCI_DEBUG
int scimci_debug = 1;
#define DPRINTF(n,s) do { if ((n) <= scimci_debug) printf s; } while (0)
#else
#define DPRINTF(n,s) do {} while (0)
#endif
static int scimci_host_reset(sdmmc_chipset_handle_t);
static uint32_t scimci_host_ocr(sdmmc_chipset_handle_t);
static int scimci_host_maxblklen(sdmmc_chipset_handle_t);
static int scimci_card_detect(sdmmc_chipset_handle_t);
static int scimci_write_protect(sdmmc_chipset_handle_t);
static int scimci_bus_power(sdmmc_chipset_handle_t, uint32_t);
static int scimci_bus_clock(sdmmc_chipset_handle_t, int);
static int scimci_bus_width(sdmmc_chipset_handle_t, int);
static void scimci_exec_command(sdmmc_chipset_handle_t,
struct sdmmc_command *);
static struct sdmmc_chip_functions scimci_chip_functions = {
/* host controller reset */
.host_reset = scimci_host_reset,
/* host controller capabilities */
.host_ocr = scimci_host_ocr,
.host_maxblklen = scimci_host_maxblklen,
/* card detection */
.card_detect = scimci_card_detect,
/* write protect */
.write_protect = scimci_write_protect,
/* bus power, clock frequency, width */
.bus_power = scimci_bus_power,
.bus_clock = scimci_bus_clock,
.bus_width = scimci_bus_width,
/* command execution */
.exec_command = scimci_exec_command,
/* card interrupt */
.card_enable_intr = NULL,
.card_intr_ack = NULL,
};
static void scimci_spi_initialize(sdmmc_chipset_handle_t);
static struct sdmmc_spi_chip_functions scimci_spi_chip_functions = {
.initialize = scimci_spi_initialize,
};
#define CSR_SET_1(reg,set,mask) \
do { \
uint8_t _r; \
_r = _reg_read_1((reg)); \
_r &= ~(mask); \
_r |= (set); \
_reg_write_1((reg), _r); \
} while (/*CONSTCOND*/0)
#define CSR_SET_2(reg,set,mask) \
do { \
uint16_t _r; \
_r = _reg_read_2((reg)); \
_r &= ~(mask); \
_r |= (set); \
_reg_write_2((reg), _r); \
} while (/*CONSTCOND*/0)
#define CSR_CLR_1(reg,clr) \
do { \
uint8_t _r; \
_r = _reg_read_1((reg)); \
_r &= ~(clr); \
_reg_write_1((reg), _r); \
} while (/*CONSTCOND*/0)
#define CSR_CLR_2(reg,clr) \
do { \
uint16_t _r; \
_r = _reg_read_2((reg)); \
_r &= ~(clr); \
_reg_write_2((reg), _r); \
} while (/*CONSTCOND*/0)
#define SCPCR_CLK_MASK 0x000C
#define SCPCR_CLK_IN 0x000C
#define SCPCR_CLK_OUT 0x0004
#define SCPDR_CLK 0x02
#define SCPCR_DAT_MASK 0x0003
#define SCPCR_DAT_IN 0x0003
#define SCPCR_DAT_OUT 0x0001
#define SCPDR_DAT 0x01
#define SCPCR_CMD_MASK 0x0030
#define SCPCR_CMD_IN 0x0030
#define SCPCR_CMD_OUT 0x0010
#define SCPDR_CMD 0x04
#define SCPCR_CS_MASK 0x00C0
#define SCPCR_CS_IN 0x00C0
#define SCPCR_CS_OUT 0x0040
#define SCPDR_CS 0x08
#define PGCR_EJECT 0x0300
#define PGDR_EJECT 0x10
/* SCSCR */
#define SCSCR_SCK_OUT 0
#define SCSCR_SCK_IN (SCSCR_CKE1)
#define LOW_SPEED 144
#define MID_SPEED 48
#define MMC_TIME_OVER 1000
struct scimci_softc {
device_t sc_dev;
device_t sc_sdmmc;
};
static int scimci_match(device_t, cfdata_t, void *);
static void scimci_attach(device_t, device_t, void *);
CFATTACH_DECL_NEW(scimci, sizeof(struct scimci_softc),
scimci_match, scimci_attach, NULL, NULL);
static void scimci_putc(int);
static void scimci_putc_sw(void);
static int scimci_getc(void);
static void scimci_getc_sw(void);
static void scimci_cmd_cfgread(struct scimci_softc *, struct sdmmc_command *);
static void scimci_cmd_read(struct scimci_softc *, struct sdmmc_command *);
static void scimci_cmd_write(struct scimci_softc *, struct sdmmc_command *);
void scimci_read_buffer(u_char *buf);
void scimci_write_buffer(const u_char *buf);
/*ARGSUSED*/
static int
scimci_match(device_t parent, cfdata_t cf, void *aux)
{
if (IS_SH7706LSR)
return 0;
return 1;
}
/*ARGSUSED*/
static void
scimci_attach(device_t parent, device_t self, void *aux)
{
struct scimci_softc *sc = device_private(self);
struct sdmmcbus_attach_args saa;
sc->sc_dev = self;
aprint_naive("\n");
aprint_normal(": SCI MMC controller\n");
/* Setup */
CSR_SET_2(SH7709_SCPCR, SCPCR_CLK_OUT | SCPCR_CMD_OUT,
SCPCR_CLK_MASK | SCPCR_CMD_MASK);
CSR_CLR_2(SH7709_SCPCR, SCPCR_CMD_MASK);
CSR_SET_1(SH7709_SCPDR, SCPDR_CLK | SCPDR_CMD, 0);
CSR_SET_2(SH7709_SCPCR, SCPCR_CS_OUT, SCPCR_CS_MASK);
SHREG_SCSCR = 0x00;
SHREG_SCSSR = 0x00;
SHREG_SCSCMR = 0xfa; /* MSB first */
SHREG_SCSMR = SCSMR_CA; /* clock sync mode */
SHREG_SCBRR = LOW_SPEED;
delay(1000); /* wait 1ms */
/*
* Attach the generic SD/MMC bus driver. (The bus driver must
* not invoke any chipset functions before it is attached.)
*/
memset(&saa, 0, sizeof(saa));
saa.saa_busname = "sdmmc";
saa.saa_sct = &scimci_chip_functions;
saa.saa_spi_sct = &scimci_spi_chip_functions;
saa.saa_sch = sc;
saa.saa_clkmin = 4000 / (LOW_SPEED + 1);
saa.saa_clkmax = 4000 / (MID_SPEED + 1);
saa.saa_caps = SMC_CAPS_SPI_MODE
| SMC_CAPS_SINGLE_ONLY
| SMC_CAPS_POLL_CARD_DET;
sc->sc_sdmmc = config_found(sc->sc_dev, &saa, NULL);
if (sc->sc_sdmmc == NULL)
aprint_error_dev(sc->sc_dev, "couldn't attach bus\n");
}
/*
* SCI access functions
*/
static void
scimci_putc(int c)
{
CSR_SET_2(SH7709_SCPCR, SCPCR_CLK_OUT, SCPCR_CLK_MASK);
SHREG_SCSCR = SCSCR_TE | SCSCR_SCK_OUT;
while ((SHREG_SCSSR & SCSSR_TDRE) == 0)
continue;
CSR_CLR_2(SH7709_SCPCR, SCPCR_CLK_MASK);
SHREG_SCTDR = (uint8_t)c;
(void) SHREG_SCSSR;
SHREG_SCSSR = 0;
}
static void
scimci_putc_sw(void)
{
while ((SHREG_SCSSR & SCSSR_TEND) == 0)
continue;
CSR_SET_2(SH7709_SCPCR, SCPCR_CLK_IN, 0);
SHREG_SCSCR |= SCSCR_SCK_IN;
CSR_CLR_2(SH7709_SCPCR, SCPCR_CLK_MASK);
SHREG_SCSMR = 0;
SHREG_SCSCR = SCSCR_SCK_OUT;
SHREG_SCSSR = 0;
SHREG_SCSMR = SCSMR_CA;
}
static int
scimci_getc(void)
{
int c;
SHREG_SCSCR = SCSCR_RE | SCSCR_SCK_OUT;
if (SHREG_SCSSR & SCSSR_ORER) {
SHREG_SCSSR &= ~SCSSR_ORER;
return -1;
}
CSR_CLR_2(SH7709_SCPCR, SCPCR_CLK_MASK);
while ((SHREG_SCSSR & SCSSR_RDRF) == 0)
continue;
c = SHREG_SCRDR;
(void) SHREG_SCSSR;
SHREG_SCSSR = 0;
return (uint8_t)c;
}
static void
scimci_getc_sw(void)
{
SHREG_SCBRR = LOW_SPEED;
while ((SHREG_SCSSR & SCSSR_RDRF) == 0)
continue;
(void) SHREG_SCRDR;
CSR_SET_2(SH7709_SCPCR, SCPCR_CLK_IN, 0);
SHREG_SCSCR |= SCSCR_SCK_IN;
CSR_CLR_2(SH7709_SCPCR, SCPCR_CLK_MASK);
SHREG_SCSMR = 0;
SHREG_SCSCR = SCSCR_SCK_OUT;
SHREG_SCSSR = 0;
SHREG_SCSMR = SCSMR_CA;
}
/*
* Reset the host controller. Called during initialization, when
* cards are removed, upon resume, and during error recovery.
*/
/*ARGSUSED*/
static int
scimci_host_reset(sdmmc_chipset_handle_t sch)
{
return 0;
}
/*ARGSUSED*/
static uint32_t
scimci_host_ocr(sdmmc_chipset_handle_t sch)
{
return MMC_OCR_3_2V_3_3V|MMC_OCR_3_3V_3_4V;
}
/*ARGSUSED*/
static int
scimci_host_maxblklen(sdmmc_chipset_handle_t sch)
{
return 512;
}
/*ARGSUSED*/
static int
scimci_card_detect(sdmmc_chipset_handle_t sch)
{
uint8_t reg;
int s;
s = splserial();
CSR_SET_2(SH7709_PGCR, PGCR_EJECT, 0);
reg = _reg_read_1(SH7709_PGDR);
splx(s);
return !(reg & PGDR_EJECT);
}
/*ARGSUSED*/
static int
scimci_write_protect(sdmmc_chipset_handle_t sch)
{
return 0; /* non-protect */
}
/*
* Set or change SD bus voltage and enable or disable SD bus power.
* Return zero on success.
*/
/*ARGSUSED*/
static int
scimci_bus_power(sdmmc_chipset_handle_t sch, uint32_t ocr)
{
if ((ocr & (MMC_OCR_3_2V_3_3V|MMC_OCR_3_3V_3_4V)) == 0)
return 1;
/*XXX???*/
return 0;
}
/*
* Set or change MMCLK frequency or disable the MMC clock.
* Return zero on success.
*/
/*ARGSUSED*/
static int
scimci_bus_clock(sdmmc_chipset_handle_t sch, int freq)
{
return 0;
}
/*ARGSUSED*/
static int
scimci_bus_width(sdmmc_chipset_handle_t sch, int width)
{
if (width != 1)
return 1;
return 0;
}
/*ARGSUSED*/
static void
scimci_spi_initialize(sdmmc_chipset_handle_t sch)
{
int i, s;
s = splserial();
CSR_SET_1(SH7709_SCPDR, SCPDR_CS, 0);
for (i = 0; i < 20; i++)
scimci_putc(0xff);
scimci_putc_sw();
CSR_CLR_1(SH7709_SCPDR, SCPDR_CS);
splx(s);
}
static void
scimci_exec_command(sdmmc_chipset_handle_t sch, struct sdmmc_command *cmd)
{
struct scimci_softc *sc = (struct scimci_softc *)sch;
uint16_t resp;
int timo;
int s;
DPRINTF(1,("%s: start cmd %d arg=%#x data=%p dlen=%d flags=%#x "
"proc=%p \"%s\"\n", device_xname(sc->sc_dev),
cmd->c_opcode, cmd->c_arg, cmd->c_data, cmd->c_datalen,
cmd->c_flags, curproc, curproc ? curproc->p_comm : ""));
s = splhigh();
if (cmd->c_opcode == MMC_GO_IDLE_STATE)
SHREG_SCBRR = LOW_SPEED;
else
SHREG_SCBRR = MID_SPEED;
scimci_putc(0xff);
scimci_putc(0x40 | (cmd->c_opcode & 0x3f));
scimci_putc((cmd->c_arg >> 24) & 0xff);
scimci_putc((cmd->c_arg >> 16) & 0xff);
scimci_putc((cmd->c_arg >> 8) & 0xff);
scimci_putc((cmd->c_arg >> 0) & 0xff);
scimci_putc((cmd->c_opcode == MMC_GO_IDLE_STATE) ? 0x95 :
(cmd->c_opcode == SD_SEND_IF_COND) ? 0x87 : 0); /* CRC */
scimci_putc(0xff);
scimci_putc_sw();
timo = MMC_TIME_OVER;
while ((resp = scimci_getc()) & 0x80) {
if(--timo == 0) {
DPRINTF(1, ("%s: response timeout\n",
device_xname(sc->sc_dev)));
scimci_getc_sw();
cmd->c_error = ETIMEDOUT;
goto out;
}
}
if (ISSET(cmd->c_flags, SCF_RSP_SPI_S2)) {
resp |= (uint16_t)scimci_getc() << 8;
} else if (ISSET(cmd->c_flags, SCF_RSP_SPI_B4)) {
cmd->c_resp[1] = (uint32_t) scimci_getc() << 24;
cmd->c_resp[1] |= (uint32_t) scimci_getc() << 16;
cmd->c_resp[1] |= (uint32_t) scimci_getc() << 8;
cmd->c_resp[1] |= (uint32_t) scimci_getc();
DPRINTF(1, ("R3 resp: %#x\n", cmd->c_resp[1]));
}
scimci_getc_sw();
cmd->c_resp[0] = resp;
if (resp != 0 && resp != R1_SPI_IDLE) {
DPRINTF(1, ("%s: response error: %#x\n",
device_xname(sc->sc_dev), resp));
cmd->c_error = EIO;
goto out;
}
DPRINTF(1, ("R1 resp: %#x\n", resp));
if (cmd->c_datalen > 0) {
if (ISSET(cmd->c_flags, SCF_CMD_READ)) {
/* XXX: swap in this place? */
if (cmd->c_opcode == MMC_SEND_CID ||
cmd->c_opcode == MMC_SEND_CSD) {
sdmmc_response res;
uint32_t *p = cmd->c_data;
scimci_cmd_cfgread(sc, cmd);
res[0] = be32toh(p[3]);
res[1] = be32toh(p[2]);
res[2] = be32toh(p[1]);
res[3] = be32toh(p[0]);
memcpy(p, &res, sizeof(res));
} else {
scimci_cmd_read(sc, cmd);
}
} else {
scimci_cmd_write(sc, cmd);
}
}
out:
SET(cmd->c_flags, SCF_ITSDONE);
splx(s);
DPRINTF(1,("%s: cmd %d done (flags=%#x error=%d)\n",
device_xname(sc->sc_dev), cmd->c_opcode, cmd->c_flags, cmd->c_error));
}
static void
scimci_cmd_cfgread(struct scimci_softc *sc, struct sdmmc_command *cmd)
{
u_char *data = cmd->c_data;
int timo;
int c;
int i;
/* wait data token */
for (timo = MMC_TIME_OVER; timo > 0; timo--) {
c = scimci_getc();
if (c < 0) {
aprint_error_dev(sc->sc_dev, "cfg read i/o error\n");
cmd->c_error = EIO;
return;
}
if (c != 0xff)
break;
}
if (timo == 0) {
aprint_error_dev(sc->sc_dev, "cfg read timeout\n");
cmd->c_error = ETIMEDOUT;
return;
}
if (c != 0xfe) {
aprint_error_dev(sc->sc_dev, "cfg read error (data=%#x)\n", c);
cmd->c_error = EIO;
return;
}
/* data read */
SHREG_SCSCR = SCSCR_RE | SCSCR_SCK_OUT;
data[0] = '\0'; /* XXXFIXME!!! */
for (i = 1 /* XXXFIXME!!!*/ ; i < cmd->c_datalen; i++) {
while ((SHREG_SCSSR & SCSSR_RDRF) == 0)
continue;
data[i] = SHREG_SCRDR;
(void) SHREG_SCSSR;
SHREG_SCSSR = 0;
}
SHREG_SCBRR = LOW_SPEED;
(void) scimci_getc();
(void) scimci_getc();
(void) scimci_getc();
scimci_getc_sw();
#ifdef SCIMCI_DEBUG
sdmmc_dump_data(NULL, cmd->c_data, cmd->c_datalen);
#endif
}
static void
scimci_cmd_read(struct scimci_softc *sc, struct sdmmc_command *cmd)
{
u_char *data = cmd->c_data;
int timo;
int c;
int i;
/* wait data token */
for (timo = MMC_TIME_OVER; timo > 0; timo--) {
c = scimci_getc();
if (c < 0) {
aprint_error_dev(sc->sc_dev, "read i/o error\n");
cmd->c_error = EIO;
return;
}
if (c != 0xff)
break;
}
if (timo == 0) {
aprint_error_dev(sc->sc_dev, "read timeout\n");
cmd->c_error = ETIMEDOUT;
return;
}
if (c != 0xfe) {
aprint_error_dev(sc->sc_dev, "read error (data=%#x)\n", c);
cmd->c_error = EIO;
return;
}
/* data read */
SHREG_SCBRR = MID_SPEED;
SHREG_SCSCR = SCSCR_RE | SCSCR_SCK_OUT;
for (i = 0; i < cmd->c_datalen; i++) {
while ((SHREG_SCSSR & SCSSR_RDRF) == 0)
continue;
data[i] = SHREG_SCRDR;
(void) SHREG_SCSSR;
SHREG_SCSSR = 0;
}
SHREG_SCBRR = LOW_SPEED;
(void) scimci_getc();
(void) scimci_getc();
(void) scimci_getc();
scimci_getc_sw();
#ifdef SCIMCI_DEBUG
sdmmc_dump_data(NULL, cmd->c_data, cmd->c_datalen);
#endif
}
static void
scimci_cmd_write(struct scimci_softc *sc, struct sdmmc_command *cmd)
{
char *data = cmd->c_data;
int timo;
int c;
int i;
scimci_putc(0xff);
scimci_putc(0xfe);
/* data write */
SHREG_SCBRR = MID_SPEED;
SHREG_SCSCR = SCSCR_TE | SCSCR_SCK_OUT;
for (i = 0; i < cmd->c_datalen; i++) {
while ((SHREG_SCSSR & SCSSR_TDRE) == 0)
continue;
SHREG_SCTDR = data[i];
(void) SHREG_SCSSR;
SHREG_SCSSR = 0;
}
SHREG_SCBRR = LOW_SPEED;
scimci_putc(0);
scimci_putc(0);
scimci_putc(0);
scimci_putc_sw();
for (timo = MMC_TIME_OVER; timo > 0; timo--) {
c = scimci_getc();
if (c < 0) {
aprint_error_dev(sc->sc_dev, "write i/o error\n");
cmd->c_error = EIO;
scimci_getc_sw();
return;
}
if (c == 0xff)
break;
}
if (timo == 0) {
aprint_error_dev(sc->sc_dev, "write timeout\n");
cmd->c_error = ETIMEDOUT;
}
scimci_getc_sw();
}

555
sys/arch/evbsh3/t_sh7706lan/ssumci.c Normal file
View File

@ -0,0 +1,555 @@
/* $NetBSD: ssumci.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*-
* Copyright (c) 2010 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* driver to access MMC/SD card
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ssumci.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $");
#include <sys/param.h>
#include <sys/device.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/proc.h>
#include <sys/bus.h>
#include <sys/intr.h>
#include <sh3/devreg.h>
#include <sh3/pfcreg.h>
#include <sh3/scireg.h>
#include <dev/sdmmc/sdmmcvar.h>
#include <dev/sdmmc/sdmmcchip.h>
#include <machine/autoconf.h>
#include <evbsh3/t_sh7706lan/t_sh7706lanvar.h>
#ifdef SSUMCI_DEBUG
int ssumci_debug = 1;
#define DPRINTF(n,s) do { if ((n) <= ssumci_debug) printf s; } while (0)
#else
#define DPRINTF(n,s) do {} while (0)
#endif
static int ssumci_host_reset(sdmmc_chipset_handle_t);
static uint32_t ssumci_host_ocr(sdmmc_chipset_handle_t);
static int ssumci_host_maxblklen(sdmmc_chipset_handle_t);
static int ssumci_card_detect(sdmmc_chipset_handle_t);
static int ssumci_write_protect(sdmmc_chipset_handle_t);
static int ssumci_bus_power(sdmmc_chipset_handle_t, uint32_t);
static int ssumci_bus_clock(sdmmc_chipset_handle_t, int);
static int ssumci_bus_width(sdmmc_chipset_handle_t, int);
static void ssumci_exec_command(sdmmc_chipset_handle_t,
struct sdmmc_command *);
static struct sdmmc_chip_functions ssumci_chip_functions = {
/* host controller reset */
.host_reset = ssumci_host_reset,
/* host controller capabilities */
.host_ocr = ssumci_host_ocr,
.host_maxblklen = ssumci_host_maxblklen,
/* card detection */
.card_detect = ssumci_card_detect,
/* write protect */
.write_protect = ssumci_write_protect,
/* bus power, clock frequency, width */
.bus_power = ssumci_bus_power,
.bus_clock = ssumci_bus_clock,
.bus_width = ssumci_bus_width,
/* command execution */
.exec_command = ssumci_exec_command,
/* card interrupt */
.card_enable_intr = NULL,
.card_intr_ack = NULL,
};
static void ssumci_spi_initialize(sdmmc_chipset_handle_t);
static struct sdmmc_spi_chip_functions ssumci_spi_chip_functions = {
.initialize = ssumci_spi_initialize,
};
#define CSR_SET_1(reg,set,mask) \
do { \
uint8_t _r; \
_r = _reg_read_1((reg)); \
_r &= ~(mask); \
_r |= (set); \
_reg_write_1((reg), _r); \
} while (/*CONSTCOND*/0)
#define CSR_SET_2(reg,set,mask) \
do { \
uint16_t _r; \
_r = _reg_read_2((reg)); \
_r &= ~(mask); \
_r |= (set); \
_reg_write_2((reg), _r); \
} while (/*CONSTCOND*/0)
#define CSR_CLR_1(reg,clr) \
do { \
uint8_t _r; \
_r = _reg_read_1((reg)); \
_r &= ~(clr); \
_reg_write_1((reg), _r); \
} while (/*CONSTCOND*/0)
#define CSR_CLR_2(reg,clr) \
do { \
uint16_t _r; \
_r = _reg_read_2((reg)); \
_r &= ~(clr); \
_reg_write_2((reg), _r); \
} while (/*CONSTCOND*/0)
#define SCPCR_CLK_MASK 0x000C
#define SCPCR_CLK_IN 0x000C
#define SCPCR_CLK_OUT 0x0004
#define SCPDR_CLK 0x02
#define SCPCR_DAT_MASK 0x0003
#define SCPCR_DAT_IN 0x0003
#define SCPCR_DAT_OUT 0x0001
#define SCPDR_DAT 0x01
#define SCPCR_CMD_MASK 0x0030
#define SCPCR_CMD_IN 0x0030
#define SCPCR_CMD_OUT 0x0010
#define SCPDR_CMD 0x04
#define SCPCR_CS_MASK 0x000C
#define SCPCR_CS_OUT 0x0004
#define SCPDR_CS 0x08
#define SCPCR_EJECT 0x00C0
#define SCPDR_EJECT 0x08
#define MMC_TIME_OVER 20000
struct ssumci_softc {
device_t sc_dev;
device_t sc_sdmmc;
};
static int ssumci_match(device_t, cfdata_t, void *);
static void ssumci_attach(device_t, device_t, void *);
CFATTACH_DECL_NEW(ssumci, sizeof(struct ssumci_softc),
ssumci_match, ssumci_attach, NULL, NULL);
static void ssumci_cmd_cfgread(struct ssumci_softc *, struct sdmmc_command *);
static void ssumci_cmd_read(struct ssumci_softc *, struct sdmmc_command *);
static void ssumci_cmd_write(struct ssumci_softc *, struct sdmmc_command *);
#define SSUMCI_SPIDR 0xb0008000
#define SSUMCI_SPISR 0xb0008002
#define SSUMCI_SPIBR 0xb0008004
static inline void
ssumci_wait(void)
{
while (_reg_read_1(SSUMCI_SPISR) == 0x00)
continue;
}
static inline uint8_t
ssumci_getc(void)
{
ssumci_wait();
return _reg_read_1(SSUMCI_SPIBR);
}
static inline void
ssumci_putc(uint8_t v)
{
_reg_write_1(SSUMCI_SPIDR, v);
ssumci_wait();
}
/*ARGSUSED*/
static int
ssumci_match(device_t parent, cfdata_t cf, void *aux)
{
struct mainbus_attach_args *maa = (struct mainbus_attach_args *)aux;
if (strcmp(maa->ma_name, "ssumci") != 0)
return 0;
if (!IS_SH7706LSR)
return 0;
return 1;
}
/*ARGSUSED*/
static void
ssumci_attach(device_t parent, device_t self, void *aux)
{
struct ssumci_softc *sc = device_private(self);
struct sdmmcbus_attach_args saa;
sc->sc_dev = self;
aprint_naive("\n");
aprint_normal(": SPI MMC controller\n");
/* setup */
CSR_SET_2(SH7709_SCPCR, SCPCR_CS_OUT, SCPCR_CS_MASK);
/*
* Attach the generic SD/MMC bus driver. (The bus driver must
* not invoke any chipset functions before it is attached.)
*/
memset(&saa, 0, sizeof(saa));
saa.saa_busname = "sdmmc";
saa.saa_sct = &ssumci_chip_functions;
saa.saa_spi_sct = &ssumci_spi_chip_functions;
saa.saa_sch = sc;
saa.saa_clkmin = 400;
saa.saa_clkmax = 400;
saa.saa_caps = SMC_CAPS_SPI_MODE
| SMC_CAPS_SINGLE_ONLY
| SMC_CAPS_POLL_CARD_DET;
sc->sc_sdmmc = config_found(sc->sc_dev, &saa, NULL);
if (sc->sc_sdmmc == NULL)
aprint_error_dev(sc->sc_dev, "couldn't attach bus\n");
}
/*
* Reset the host controller. Called during initialization, when
* cards are removed, upon resume, and during error recovery.
*/
/*ARGSUSED*/
static int
ssumci_host_reset(sdmmc_chipset_handle_t sch)
{
return 0;
}
/*ARGSUSED*/
static uint32_t
ssumci_host_ocr(sdmmc_chipset_handle_t sch)
{
return MMC_OCR_3_2V_3_3V|MMC_OCR_3_3V_3_4V;
}
/*ARGSUSED*/
static int
ssumci_host_maxblklen(sdmmc_chipset_handle_t sch)
{
return 512;
}
/*ARGSUSED*/
static int
ssumci_card_detect(sdmmc_chipset_handle_t sch)
{
uint8_t reg;
int s;
s = splsdmmc();
CSR_SET_2(SH7709_SCPCR, SCPCR_EJECT, 0);
reg = _reg_read_1(SH7709_SCPDR);
splx(s);
return !(reg & SCPDR_EJECT);
}
/*ARGSUSED*/
static int
ssumci_write_protect(sdmmc_chipset_handle_t sch)
{
return 0; /* non-protect */
}
/*
* Set or change SD bus voltage and enable or disable SD bus power.
* Return zero on success.
*/
/*ARGSUSED*/
static int
ssumci_bus_power(sdmmc_chipset_handle_t sch, uint32_t ocr)
{
if ((ocr & (MMC_OCR_3_2V_3_3V|MMC_OCR_3_3V_3_4V)) == 0)
return 1;
/*XXX???*/
return 0;
}
/*
* Set or change MMCLK frequency or disable the MMC clock.
* Return zero on success.
*/
/*ARGSUSED*/
static int
ssumci_bus_clock(sdmmc_chipset_handle_t sch, int freq)
{
return 0;
}
/*ARGSUSED*/
static int
ssumci_bus_width(sdmmc_chipset_handle_t sch, int width)
{
if (width != 1)
return 1;
return 0;
}
/*ARGSUSED*/
static void
ssumci_spi_initialize(sdmmc_chipset_handle_t sch)
{
int i, s;
s = splsdmmc();
CSR_SET_1(SH7709_SCPDR, SCPDR_CS, 0);
for (i = 0; i < 10; i++) {
ssumci_putc(0xff);
}
CSR_CLR_1(SH7709_SCPDR, SCPDR_CS);
splx(s);
}
static void
ssumci_exec_command(sdmmc_chipset_handle_t sch, struct sdmmc_command *cmd)
{
struct ssumci_softc *sc = (struct ssumci_softc *)sch;
uint16_t resp;
int timo;
int s;
DPRINTF(1,("%s: start cmd %d arg=%#x data=%p dlen=%d flags=%#x\n",
device_xname(sc->sc_dev), cmd->c_opcode, cmd->c_arg, cmd->c_data,
cmd->c_datalen, cmd->c_flags));
s = splsdmmc();
ssumci_putc(0xff);
ssumci_putc(0x40 | (cmd->c_opcode & 0x3f));
ssumci_putc((cmd->c_arg >> 24) & 0xff);
ssumci_putc((cmd->c_arg >> 16) & 0xff);
ssumci_putc((cmd->c_arg >> 8) & 0xff);
ssumci_putc((cmd->c_arg >> 0) & 0xff);
ssumci_putc((cmd->c_opcode == MMC_GO_IDLE_STATE) ? 0x95 :
(cmd->c_opcode == SD_SEND_IF_COND) ? 0x87 : 0); /* CRC */
for (timo = MMC_TIME_OVER; timo > 0; timo--) {
resp = ssumci_getc();
if (!(resp & 0x80) && timo <= (MMC_TIME_OVER - 2))
break;
}
if (timo == 0) {
DPRINTF(1,(sc->sc_dev, "response timeout\n"));
cmd->c_error = ETIMEDOUT;
goto out;
}
if (ISSET(cmd->c_flags, SCF_RSP_SPI_S2)) {
resp |= (uint16_t) ssumci_getc() << 8;
} else if (ISSET(cmd->c_flags, SCF_RSP_SPI_B4)) {
cmd->c_resp[1] = (uint32_t) ssumci_getc() << 24;
cmd->c_resp[1] |= (uint32_t) ssumci_getc() << 16;
cmd->c_resp[1] |= (uint32_t) ssumci_getc() << 8;
cmd->c_resp[1] |= (uint32_t) ssumci_getc();
DPRINTF(1, ("R3 resp: %#x\n", cmd->c_resp[1]));
}
cmd->c_resp[0] = resp;
if (resp != 0 && resp != R1_SPI_IDLE) {
DPRINTF(1,("response error: %#x\n", resp));
cmd->c_error = EIO;
goto out;
}
DPRINTF(1, ("R1 resp: %#x\n", resp));
if (cmd->c_datalen > 0) {
if (ISSET(cmd->c_flags, SCF_CMD_READ)) {
/* XXX: swap in this place? */
if (cmd->c_opcode == MMC_SEND_CID ||
cmd->c_opcode == MMC_SEND_CSD) {
sdmmc_response res;
uint32_t *p = cmd->c_data;
ssumci_cmd_cfgread(sc, cmd);
res[0] = be32toh(p[3]);
res[1] = be32toh(p[2]);
res[2] = be32toh(p[1]);
res[3] = be32toh(p[0]);
memcpy(p, &res, sizeof(res));
} else {
ssumci_cmd_read(sc, cmd);
}
} else {
ssumci_cmd_write(sc, cmd);
}
} else {
ssumci_wait();
}
out:
SET(cmd->c_flags, SCF_ITSDONE);
splx(s);
DPRINTF(1,("%s: cmd %d done (flags=%#x error=%d)\n",
device_xname(sc->sc_dev), cmd->c_opcode, cmd->c_flags, cmd->c_error));
}
static void
ssumci_cmd_cfgread(struct ssumci_softc *sc, struct sdmmc_command *cmd)
{
u_char *data = cmd->c_data;
int timo;
int c;
int i;
/* wait data token */
for (timo = MMC_TIME_OVER; timo > 0; timo--) {
c = ssumci_getc();
if (c != 0xff)
break;
}
if (timo == 0) {
aprint_error_dev(sc->sc_dev, "cfg read timeout\n");
cmd->c_error = ETIMEDOUT;
return;
}
if (c != 0xfe) {
aprint_error_dev(sc->sc_dev, "cfg read error (data=%#x)\n", c);
cmd->c_error = EIO;
return;
}
/* data read */
data[0] = '\0'; /* XXXFIXME!!! */
for (i = 1 /* XXXFIXME!!!*/ ; i < cmd->c_datalen; i++) {
data[i] = ssumci_getc();
}
(void) ssumci_getc();
(void) ssumci_getc();
ssumci_wait();
#ifdef SSUMCI_DEBUG
sdmmc_dump_data(NULL, cmd->c_data, cmd->c_datalen);
#endif
}
static void
ssumci_cmd_read(struct ssumci_softc *sc, struct sdmmc_command *cmd)
{
u_char *data = cmd->c_data;
int timo;
int c;
int i;
/* wait data token */
for (timo = MMC_TIME_OVER; timo > 0; timo--) {
c = ssumci_getc();
if (c != 0xff)
break;
}
if (timo == 0) {
aprint_error_dev(sc->sc_dev, "read timeout\n");
cmd->c_error = ETIMEDOUT;
return;
}
if (c != 0xfe) {
aprint_error_dev(sc->sc_dev, "read error (data=%#x)\n", c);
cmd->c_error = EIO;
return;
}
/* data read */
for (i = 0; i < cmd->c_datalen; i++) {
data[i] = ssumci_getc();
}
/* ignore CRC */
(void) ssumci_getc();
(void) ssumci_getc();
ssumci_wait();
#ifdef SSUMCI_DEBUG
sdmmc_dump_data(NULL, cmd->c_data, cmd->c_datalen);
#endif
}
static void
ssumci_cmd_write(struct ssumci_softc *sc, struct sdmmc_command *cmd)
{
u_char *data = cmd->c_data;
int timo;
int c;
int i;
ssumci_wait();
ssumci_putc(0xfe);
/* data write */
for (i = 0; i < cmd->c_datalen; i++) {
ssumci_putc(data[i]);
}
/* dummy CRC */
ssumci_putc(0);
ssumci_putc(0);
ssumci_putc(0xff);
if ((_reg_read_1(SSUMCI_SPIDR) & 0x0f) != 5) {
aprint_error_dev(sc->sc_dev, "write error\n");
cmd->c_error = EIO;
return;
}
for (timo = 0x7fffffff; timo > 0; timo--) {
ssumci_putc(0xff);
c = _reg_read_1(SSUMCI_SPIDR);
if (c == 0xff)
break;
}
if (timo == 0) {
aprint_error_dev(sc->sc_dev, "write timeout\n");
cmd->c_error = ETIMEDOUT;
}
}

63
sys/arch/evbsh3/t_sh7706lan/t_sh7706lan.c Normal file
View File

@ -0,0 +1,63 @@
/* $NetBSD: t_sh7706lan.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*-
* Copyright (c) 2009 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBS$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sh3/devreg.h>
#include <sh3/bscreg.h>
#include <sh3/intcreg.h>
#include <sh3/pfcreg.h>
void machine_init(void);
void
machine_init(void)
{
uint16_t reg;
/* IRQ0-4=IRQ */
_reg_write_2(SH7709_PHCR, 0x2800);
/* IRQ5=IRQ */
reg = _reg_read_2(SH7709_SCPCR);
reg &= 0x3ff;
_reg_write_2(SH7709_SCPCR, reg);
/* IRQ0-5=IRQ-mode, active-low */
_reg_write_2(SH7709_ICR1, 0x0aaa);
/* CS4: 8bit bus width */
reg = _reg_read_2(SH3_BCR2);
reg &= ~(BCR2_AREA_WIDTH_MASK << BCR2_AREA4_SHIFT);
reg |= (BCR2_AREA_WIDTH_8 << BCR2_AREA4_SHIFT);
_reg_write_2(SH3_BCR2, reg);
}

731
sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c Normal file
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@ -0,0 +1,731 @@
/* $NetBSD: t_sh7706lan_space.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Charles M. Hannum.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: t_sh7706lan_space.c,v 1.1 2010/04/06 15:54:31 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/bus.h>
#include <sys/intr.h>
#include <uvm/uvm_extern.h>
#include <sh3/bscreg.h>
#include <sh3/devreg.h>
#include <sh3/mmu.h>
#include <sh3/pmap.h>
#include <sh3/pte.h>
#include <machine/cpu.h>
/*
* I/O bus space
*/
#define T_SH7706LAN_IOMEM_IO 0 /* space is i/o space */
#define T_SH7706LAN_IOMEM_MEM 1 /* space is mem space */
#define T_SH7706LAN_IOMEM_PCMCIA_IO 2 /* PCMCIA IO space */
#define T_SH7706LAN_IOMEM_PCMCIA_MEM 3 /* PCMCIA Mem space */
#define T_SH7706LAN_IOMEM_PCMCIA_ATT 4 /* PCMCIA Attr space */
#define T_SH7706LAN_IOMEM_PCMCIA_8BIT 0x8000 /* PCMCIA BUS 8 BIT WIDTH */
#define T_SH7706LAN_IOMEM_PCMCIA_IO8 \
(T_SH7706LAN_IOMEM_PCMCIA_IO|T_SH7706LAN_IOMEM_PCMCIA_8BIT)
#define T_SH7706LAN_IOMEM_PCMCIA_MEM8 \
(T_SH7706LAN_IOMEM_PCMCIA_MEM|T_SH7706LAN_IOMEM_PCMCIA_8BIT)
#define T_SH7706LAN_IOMEM_PCMCIA_ATT8 \
(T_SH7706LAN_IOMEM_PCMCIA_ATT|T_SH7706LAN_IOMEM_PCMCIA_8BIT)
int t_sh7706lan_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
bus_space_handle_t *bshp);
void t_sh7706lan_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
int t_sh7706lan_iomem_subregion(void *v, bus_space_handle_t bsh,
bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
int t_sh7706lan_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
bus_addr_t *bpap, bus_space_handle_t *bshp);
void t_sh7706lan_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
static int t_sh7706lan_iomem_add_mapping(bus_addr_t, bus_size_t, int,
bus_space_handle_t *);
static int
t_sh7706lan_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type,
bus_space_handle_t *bshp)
{
u_long pa, endpa;
vaddr_t va;
pt_entry_t *pte;
unsigned int m = 0;
int io_type = type & ~T_SH7706LAN_IOMEM_PCMCIA_8BIT;
pa = sh3_trunc_page(bpa);
endpa = sh3_round_page(bpa + size);
#ifdef DIAGNOSTIC
if (endpa <= pa)
panic("t_sh7706lan_iomem_add_mapping: overflow");
#endif
va = uvm_km_alloc(kernel_map, endpa - pa, 0, UVM_KMF_VAONLY);
if (va == 0){
printf("t_sh7706lan_iomem_add_mapping: nomem\n");
return (ENOMEM);
}
*bshp = (bus_space_handle_t)(va + (bpa & PGOFSET));
#define MODE(t, s) \
((t) & T_SH7706LAN_IOMEM_PCMCIA_8BIT) ? \
_PG_PCMCIA_ ## s ## 8 : \
_PG_PCMCIA_ ## s ## 16
switch (io_type) {
default:
panic("unknown pcmcia space.");
/* NOTREACHED */
case T_SH7706LAN_IOMEM_PCMCIA_IO:
m = MODE(type, IO);
break;
case T_SH7706LAN_IOMEM_PCMCIA_MEM:
m = MODE(type, MEM);
break;
case T_SH7706LAN_IOMEM_PCMCIA_ATT:
m = MODE(type, ATTR);
break;
}
#undef MODE
for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, 0);
pte = __pmap_kpte_lookup(va);
KDASSERT(pte);
*pte |= m; /* PTEA PCMCIA assistant bit */
sh_tlb_update(0, va, *pte);
}
return (0);
}
int
t_sh7706lan_iomem_map(void *v, bus_addr_t bpa, bus_size_t size,
int flags, bus_space_handle_t *bshp)
{
bus_addr_t addr = SH3_PHYS_TO_P2SEG(bpa);
int error;
KASSERT((bpa & SH3_PHYS_MASK) == bpa);
if (bpa < 0x14000000 || bpa >= 0x1c000000) {
/* CS0,1,2,3,4,7 */
*bshp = (bus_space_handle_t)addr;
return (0);
}
/* CS5,6 */
error = t_sh7706lan_iomem_add_mapping(addr, size, (int)(u_long)v, bshp);
return (error);
}
void
t_sh7706lan_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size)
{
u_long va, endva;
bus_addr_t bpa;
if (bsh >= SH3_P2SEG_BASE && bsh <= SH3_P2SEG_END) {
/* maybe CS0,1,2,3,4,7 */
return;
}
/* CS5,6 */
va = sh3_trunc_page(bsh);
endva = sh3_round_page(bsh + size);
#ifdef DIAGNOSTIC
if (endva <= va)
panic("t_sh7706lan_io_unmap: overflow");
#endif
pmap_extract(pmap_kernel(), va, &bpa);
bpa += bsh & PGOFSET;
pmap_kremove(va, endva - va);
/*
* Free the kernel virtual mapping.
*/
uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
}
int
t_sh7706lan_iomem_subregion(void *v, bus_space_handle_t bsh,
bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
{
*nbshp = bsh + offset;
return (0);
}
int
t_sh7706lan_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
bus_addr_t *bpap, bus_space_handle_t *bshp)
{
*bshp = *bpap = rstart;
return (0);
}
void
t_sh7706lan_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
{
t_sh7706lan_iomem_unmap(v, bsh, size);
}
/*
* on-board I/O bus space read/write
*/
uint8_t t_sh7706lan_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
uint16_t t_sh7706lan_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
uint32_t t_sh7706lan_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
void t_sh7706lan_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t *addr, bus_size_t count);
void t_sh7706lan_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t *addr, bus_size_t count);
void t_sh7706lan_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count);
void t_sh7706lan_iomem_read_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t *addr, bus_size_t count);
void t_sh7706lan_iomem_read_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t *addr, bus_size_t count);
void t_sh7706lan_iomem_read_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count);
void t_sh7706lan_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint8_t value);
void t_sh7706lan_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint16_t value);
void t_sh7706lan_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint32_t value);
void t_sh7706lan_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint8_t *addr, bus_size_t count);
void t_sh7706lan_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint16_t *addr, bus_size_t count);
void t_sh7706lan_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count);
void t_sh7706lan_iomem_write_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint8_t *addr, bus_size_t count);
void t_sh7706lan_iomem_write_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint16_t *addr, bus_size_t count);
void t_sh7706lan_iomem_write_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count);
void t_sh7706lan_iomem_set_multi_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint8_t val, bus_size_t count);
void t_sh7706lan_iomem_set_multi_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint16_t val, bus_size_t count);
void t_sh7706lan_iomem_set_multi_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint32_t val, bus_size_t count);
void t_sh7706lan_iomem_set_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t val, bus_size_t count);
void t_sh7706lan_iomem_set_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t val, bus_size_t count);
void t_sh7706lan_iomem_set_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t val, bus_size_t count);
void t_sh7706lan_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
void t_sh7706lan_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
void t_sh7706lan_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
struct _bus_space t_sh7706lan_bus_io =
{
.bs_cookie = (void *)T_SH7706LAN_IOMEM_PCMCIA_IO,
.bs_map = t_sh7706lan_iomem_map,
.bs_unmap = t_sh7706lan_iomem_unmap,
.bs_subregion = t_sh7706lan_iomem_subregion,
.bs_alloc = t_sh7706lan_iomem_alloc,
.bs_free = t_sh7706lan_iomem_free,
.bs_r_1 = t_sh7706lan_iomem_read_1,
.bs_r_2 = t_sh7706lan_iomem_read_2,
.bs_r_4 = t_sh7706lan_iomem_read_4,
.bs_rm_1 = t_sh7706lan_iomem_read_multi_1,
.bs_rm_2 = t_sh7706lan_iomem_read_multi_2,
.bs_rm_4 = t_sh7706lan_iomem_read_multi_4,
.bs_rr_1 = t_sh7706lan_iomem_read_region_1,
.bs_rr_2 = t_sh7706lan_iomem_read_region_2,
.bs_rr_4 = t_sh7706lan_iomem_read_region_4,
.bs_rs_1 = t_sh7706lan_iomem_read_1,
.bs_rs_2 = t_sh7706lan_iomem_read_2,
.bs_rs_4 = t_sh7706lan_iomem_read_4,
.bs_rms_1 = t_sh7706lan_iomem_read_multi_1,
.bs_rms_2 = t_sh7706lan_iomem_read_multi_2,
.bs_rms_4 = t_sh7706lan_iomem_read_multi_4,
.bs_rrs_1 = t_sh7706lan_iomem_read_region_1,
.bs_rrs_2 = t_sh7706lan_iomem_read_region_2,
.bs_rrs_4 = t_sh7706lan_iomem_read_region_4,
.bs_w_1 = t_sh7706lan_iomem_write_1,
.bs_w_2 = t_sh7706lan_iomem_write_2,
.bs_w_4 = t_sh7706lan_iomem_write_4,
.bs_wm_1 = t_sh7706lan_iomem_write_multi_1,
.bs_wm_2 = t_sh7706lan_iomem_write_multi_2,
.bs_wm_4 = t_sh7706lan_iomem_write_multi_4,
.bs_wr_1 = t_sh7706lan_iomem_write_region_1,
.bs_wr_2 = t_sh7706lan_iomem_write_region_2,
.bs_wr_4 = t_sh7706lan_iomem_write_region_4,
.bs_ws_1 = t_sh7706lan_iomem_write_1,
.bs_ws_2 = t_sh7706lan_iomem_write_2,
.bs_ws_4 = t_sh7706lan_iomem_write_4,
.bs_wms_1 = t_sh7706lan_iomem_write_multi_1,
.bs_wms_2 = t_sh7706lan_iomem_write_multi_2,
.bs_wms_4 = t_sh7706lan_iomem_write_multi_4,
.bs_wrs_1 = t_sh7706lan_iomem_write_region_1,
.bs_wrs_2 = t_sh7706lan_iomem_write_region_2,
.bs_wrs_4 = t_sh7706lan_iomem_write_region_4,
.bs_sm_1 = t_sh7706lan_iomem_set_multi_1,
.bs_sm_2 = t_sh7706lan_iomem_set_multi_2,
.bs_sm_4 = t_sh7706lan_iomem_set_multi_4,
.bs_sr_1 = t_sh7706lan_iomem_set_region_1,
.bs_sr_2 = t_sh7706lan_iomem_set_region_2,
.bs_sr_4 = t_sh7706lan_iomem_set_region_4,
.bs_c_1 = t_sh7706lan_iomem_copy_region_1,
.bs_c_2 = t_sh7706lan_iomem_copy_region_2,
.bs_c_4 = t_sh7706lan_iomem_copy_region_4,
};
struct _bus_space t_sh7706lan_bus_mem =
{
.bs_cookie = (void *)T_SH7706LAN_IOMEM_PCMCIA_MEM,
.bs_map = t_sh7706lan_iomem_map,
.bs_unmap = t_sh7706lan_iomem_unmap,
.bs_subregion = t_sh7706lan_iomem_subregion,
.bs_alloc = t_sh7706lan_iomem_alloc,
.bs_free = t_sh7706lan_iomem_free,
.bs_r_1 = t_sh7706lan_iomem_read_1,
.bs_r_2 = t_sh7706lan_iomem_read_2,
.bs_r_4 = t_sh7706lan_iomem_read_4,
.bs_rm_1 = t_sh7706lan_iomem_read_multi_1,
.bs_rm_2 = t_sh7706lan_iomem_read_multi_2,
.bs_rm_4 = t_sh7706lan_iomem_read_multi_4,
.bs_rr_1 = t_sh7706lan_iomem_read_region_1,
.bs_rr_2 = t_sh7706lan_iomem_read_region_2,
.bs_rr_4 = t_sh7706lan_iomem_read_region_4,
.bs_rs_1 = t_sh7706lan_iomem_read_1,
.bs_rs_2 = t_sh7706lan_iomem_read_2,
.bs_rs_4 = t_sh7706lan_iomem_read_4,
.bs_rms_1 = t_sh7706lan_iomem_read_multi_1,
.bs_rms_2 = t_sh7706lan_iomem_read_multi_2,
.bs_rms_4 = t_sh7706lan_iomem_read_multi_4,
.bs_rrs_1 = t_sh7706lan_iomem_read_region_1,
.bs_rrs_2 = t_sh7706lan_iomem_read_region_2,
.bs_rrs_4 = t_sh7706lan_iomem_read_region_4,
.bs_w_1 = t_sh7706lan_iomem_write_1,
.bs_w_2 = t_sh7706lan_iomem_write_2,
.bs_w_4 = t_sh7706lan_iomem_write_4,
.bs_wm_1 = t_sh7706lan_iomem_write_multi_1,
.bs_wm_2 = t_sh7706lan_iomem_write_multi_2,
.bs_wm_4 = t_sh7706lan_iomem_write_multi_4,
.bs_wr_1 = t_sh7706lan_iomem_write_region_1,
.bs_wr_2 = t_sh7706lan_iomem_write_region_2,
.bs_wr_4 = t_sh7706lan_iomem_write_region_4,
.bs_ws_1 = t_sh7706lan_iomem_write_1,
.bs_ws_2 = t_sh7706lan_iomem_write_2,
.bs_ws_4 = t_sh7706lan_iomem_write_4,
.bs_wms_1 = t_sh7706lan_iomem_write_multi_1,
.bs_wms_2 = t_sh7706lan_iomem_write_multi_2,
.bs_wms_4 = t_sh7706lan_iomem_write_multi_4,
.bs_wrs_1 = t_sh7706lan_iomem_write_region_1,
.bs_wrs_2 = t_sh7706lan_iomem_write_region_2,
.bs_wrs_4 = t_sh7706lan_iomem_write_region_4,
.bs_sm_1 = t_sh7706lan_iomem_set_multi_1,
.bs_sm_2 = t_sh7706lan_iomem_set_multi_2,
.bs_sm_4 = t_sh7706lan_iomem_set_multi_4,
.bs_sr_1 = t_sh7706lan_iomem_set_region_1,
.bs_sr_2 = t_sh7706lan_iomem_set_region_2,
.bs_sr_4 = t_sh7706lan_iomem_set_region_4,
.bs_c_1 = t_sh7706lan_iomem_copy_region_1,
.bs_c_2 = t_sh7706lan_iomem_copy_region_2,
.bs_c_4 = t_sh7706lan_iomem_copy_region_4,
};
/* read */
uint8_t
t_sh7706lan_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
{
return *(volatile uint8_t *)(bsh + offset);
}
uint16_t
t_sh7706lan_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
{
return (*(volatile uint8_t *)(bsh + offset)) |
(((uint16_t)*(volatile uint8_t *)(bsh + offset + 1)) << 8);
}
uint32_t
t_sh7706lan_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
{
return (*(volatile uint8_t *)(bsh + offset)) |
(((uint32_t)*(volatile uint8_t *)(bsh + offset + 1)) << 8) |
(((uint32_t)*(volatile uint8_t *)(bsh + offset + 2)) << 16) |
(((uint32_t)*(volatile uint8_t *)(bsh + offset + 3)) << 24);
}
void
t_sh7706lan_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t *addr, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*addr++ = *p;
}
}
void
t_sh7706lan_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t *addr, bus_size_t count)
{
volatile uint8_t *src = (void *)(bsh + offset);
volatile uint8_t *dest = (void *)addr;
while (count--) {
*dest++ = src[0];
*dest++ = src[1];
}
}
void
t_sh7706lan_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count)
{
volatile uint8_t *src = (void *)(bsh + offset);
volatile uint8_t *dest = (void *)addr;
while (count--) {
*dest++ = src[0];
*dest++ = src[1];
*dest++ = src[2];
*dest++ = src[3];
}
}
void
t_sh7706lan_iomem_read_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t *addr, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*addr++ = *p++;
}
}
void
t_sh7706lan_iomem_read_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t *addr, bus_size_t count)
{
t_sh7706lan_iomem_read_region_1(v, bsh, offset, (void *)addr, count * 2);
}
void
t_sh7706lan_iomem_read_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t *addr, bus_size_t count)
{
t_sh7706lan_iomem_read_region_1(v, bsh, offset, (void *)addr, count * 4);
}
/* write */
void
t_sh7706lan_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint8_t value)
{
*(volatile uint8_t *)(bsh + offset) = value;
}
void
t_sh7706lan_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint16_t value)
{
*(volatile uint8_t *)(bsh + offset) = value & 0xff;
*(volatile uint8_t *)(bsh + offset + 1) = (value >> 8) & 0xff;
}
void
t_sh7706lan_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
uint32_t value)
{
*(volatile uint8_t *)(bsh + offset) = value & 0xff;
*(volatile uint8_t *)(bsh + offset + 1) = (value >> 8) & 0xff;
*(volatile uint8_t *)(bsh + offset + 2) = (value >> 16) & 0xff;
*(volatile uint8_t *)(bsh + offset + 3) = (value >> 24) & 0xff;
}
void
t_sh7706lan_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*p = *addr++;
}
}
void
t_sh7706lan_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint16_t *addr, bus_size_t count)
{
volatile uint8_t *dest = (void *)(bsh + offset);
volatile const uint8_t *src = (const void *)addr;
while (count--) {
dest[0] = *src++;
dest[1] = *src++;
}
}
void
t_sh7706lan_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count)
{
volatile uint8_t *dest = (void *)(bsh + offset);
volatile const uint8_t *src = (const void *)addr;
while (count--) {
dest[0] = *src++;
dest[1] = *src++;
dest[2] = *src++;
dest[3] = *src++;
}
}
void
t_sh7706lan_iomem_write_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*p++ = *addr++;
}
}
void
t_sh7706lan_iomem_write_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint16_t *addr, bus_size_t count)
{
t_sh7706lan_iomem_write_region_1(v, bsh, offset, (const void*)addr, count * 2);
}
void
t_sh7706lan_iomem_write_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, const uint32_t *addr, bus_size_t count)
{
t_sh7706lan_iomem_write_region_1(v, bsh, offset, (const void*)addr, count * 4);
}
void
t_sh7706lan_iomem_set_multi_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t val, bus_size_t count)
{
volatile uint8_t *p = (void *)(bsh + offset);
while (count--) {
*p = val;
}
}
void
t_sh7706lan_iomem_set_multi_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t val, bus_size_t count)
{
volatile uint8_t *dest = (void *)(bsh + offset);
uint8_t src[2];
src[0] = val & 0xff;
src[1] = (val >> 8) & 0xff;
while (count--) {
dest[0] = src[0];
dest[1] = src[1];
}
}
void
t_sh7706lan_iomem_set_multi_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t val, bus_size_t count)
{
volatile uint8_t *dest = (void *)(bsh + offset);
uint8_t src[4];
src[0] = val & 0xff;
src[1] = (val >> 8) & 0xff;
src[2] = (val >> 16) & 0xff;
src[3] = (val >> 24) & 0xff;
while (count--) {
dest[0] = src[0];
dest[1] = src[1];
dest[2] = src[2];
dest[3] = src[3];
}
}
void
t_sh7706lan_iomem_set_region_1(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint8_t val, bus_size_t count)
{
volatile uint8_t *addr = (void *)(bsh + offset);
while (count--) {
*addr++ = val;
}
}
void
t_sh7706lan_iomem_set_region_2(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint16_t val, bus_size_t count)
{
volatile uint8_t *dest = (void *)(bsh + offset);
uint8_t src[2];
src[0] = val & 0xff;
src[1] = (val >> 8) & 0xff;
while (count--) {
*dest++ = src[0];
*dest++ = src[1];
}
}
void
t_sh7706lan_iomem_set_region_4(void *v, bus_space_handle_t bsh,
bus_size_t offset, uint32_t val, bus_size_t count)
{
volatile uint8_t *dest = (void *)(bsh + offset);
uint8_t src[4];
src[0] = val & 0xff;
src[1] = (val >> 8) & 0xff;
src[2] = (val >> 16) & 0xff;
src[3] = (val >> 24) & 0xff;
while (count--) {
*dest++ = src[0];
*dest++ = src[1];
*dest++ = src[2];
*dest++ = src[3];
}
}
void
t_sh7706lan_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
{
volatile uint8_t *addr1 = (void *)(h1 + o1);
volatile uint8_t *addr2 = (void *)(h2 + o2);
if (addr1 >= addr2) { /* src after dest: copy forward */
while (count--) {
*addr2++ = *addr1++;
}
} else { /* dest after src: copy backwards */
addr1 += count - 1;
addr2 += count - 1;
while (count--) {
*addr2-- = *addr1--;
}
}
}
void
t_sh7706lan_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
{
t_sh7706lan_iomem_copy_region_1(v, h1, o1, h2, o2, count * 2);
}
void
t_sh7706lan_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
{
t_sh7706lan_iomem_copy_region_1(v, h1, o1, h2, o2, count * 4);
}

34
sys/arch/evbsh3/t_sh7706lan/t_sh7706lanreg.h Normal file
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/* $NetBSD: t_sh7706lanreg.h,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*-
* Copyright (c) 2009-2010 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef T_SH7706LANREG_H_
#define T_SH7706LANREG_H_
#define T_SH7706LSR_ID 0xb0008006
#endif /* T_SH7706LANREG_H_ */

37
sys/arch/evbsh3/t_sh7706lan/t_sh7706lanvar.h Normal file
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/* $NetBSD: t_sh7706lanvar.h,v 1.1 2010/04/06 15:54:31 nonaka Exp $ */
/*-
* Copyright (c) 2009-2010 NONAKA Kimihiro <nonaka@netbsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef T_SH7706LAN_REG_H_
#define T_SH7706LAN_REG_H_
#include <sh3/devreg.h>
#include <evbsh3/t_sh7706lan/t_sh7706lanreg.h>
#define IS_SH7706LSR (_reg_read_1(T_SH7706LSR_ID) == 0xab)
#endif /* T_SH7706LAN_REG_H_ */