e48c624741
(which disables the interrupts) is *not* a good idea. k0 (and k1) is used by the kernel code such as the TLB miss handler, and the interrupt entry. If an interrupt occurs after loading k0 and before the SR gets interrupts disabled, k0 will be clobbered and when used to load the PC on exit from the exception handler, results in various hangs and crashes. |
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conf | ||
include | ||
mips | ||
Makefile | ||
Makefile.inc |