70 lines
2.5 KiB
C
70 lines
2.5 KiB
C
/* $NetBSD: kobo_reg.h,v 1.1 2014/07/25 11:22:50 hkenken Exp $ */
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/*
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* Copyright (c) 2012 Genetec Corporation. All rights reserved.
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* Written by Hiroyuki Bessho for Genetec Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef _EVBARM_KOBO_REG_H
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#define _EVBARM_KOBO_REG_H
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#include "opt_imx.h"
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#include <arm/imx/imx51reg.h>
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#define DDRSDRAM_BASE CSD0DDR_BASE
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/* map UART2 and IOMUXC for bootstrap */
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#define KOBO_PRIVATE_VBASE 0xf0000000
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#define KOBO_IO_VBASE0 0xfd000000
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#define KOBO_IO_PBASE0 0x53f00000 /* GPIO, IOMUXC, UART */
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#define KOBO_UART2_VBASE \
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(IMX51_UART2_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0)
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#define KOBO_IOMUXC_VBASE \
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(IOMUXC_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0)
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/* GPIO[1..4] */
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#define KOBO_GPIO1_VBASE \
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(GPIO1_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0)
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#define KOBO_GPIO_VBASE(n) \
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(KOBO_GPIO1_VBASE+((n)-1)*0x4000)
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#define KOBO_WDOG_VBASE \
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(WDOG1_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0)
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#define ioreg_read(a) (*(volatile uint32_t *)(a))
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#define ioreg_write(a,v) (*(volatile uint32_t *)(a)=(v))
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#define ioreg32_read ioreg_read
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#define ioreg32_write ioreg_write
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#define ioreg16_read(a) (*(volatile uint16_t *)(a))
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#define ioreg16_write(a,v) (*(volatile uint16_t *)(a) = (v))
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#define ioreg8_read(a) (*(volatile uint8_t *)(a))
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#define ioreg8_write(a,v) (*(volatile uint8_t *)(a) = (v))
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#endif /* _EVBARM_KOBO_REG_H */
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