Initial commit of support for Kobo touch. (i.MX507 or i.MX508)

(http://www.kobo.com)
2014-07-25 11:22:50 +00:00 · 2014-07-25 11:22:50 +00:00 · 3515fb1d7c
commit 3515fb1d7c
parent ce9ef29908
12 changed files with 1598 additions and 2 deletions
--- a/etc/etc.evbarm/Makefile.inc
+++ b/etc/etc.evbarm/Makefile.inc
@ -1,4 +1,4 @@
-#	$NetBSD: Makefile.inc,v 1.62 2014/03/30 16:00:48 matt Exp $
+#	$NetBSD: Makefile.inc,v 1.63 2014/07/25 11:22:50 hkenken Exp $
 #
 #	etc.evbarm/Makefile.inc -- evbarm-specific etc Makefile targets
 #
@ -91,6 +91,8 @@ EVBARM_BOARDS.armv7hf+=		OMAP5EVM
 #EVBARM_BOARDS.armv7+=		OVERO
 EVBARM_BOARDS.armv7+=		PANDABOARD
 EVBARM_BOARDS.armv7hf+= 	PANDABOARD
+EVBARM_BOARDS.armv7+=		KOBO
+EVBARM_BOARDS.armv7hf+= 	KOBO
 .endif

 IMAGE.rel=	${RELEASEDIR}/${RELEASEMACHINEDIR}
--- a/sys/arch/evbarm/conf/KOBO
+++ b/sys/arch/evbarm/conf/KOBO
@ -0,0 +1,289 @@
+#	$NetBSD: KOBO,v 1.1 2014/07/25 11:22:50 hkenken Exp $
+#
+#	KOBO -- http://kobo.com
+#
+
+include	"arch/evbarm/conf/std.kobo"
+
+#options 	INCLUDE_CONFIG_FILE	# embed config file in kernel binary
+
+# estimated number of users
+
+maxusers	32
+
+# Standard system options
+
+options 	RTC_OFFSET=0	# hardware clock is this many mins. west of GMT
+#options 	NTP		# NTP phase/frequency locked loop
+
+# CPU options
+options 	CPU_CORTEXA8	# Support the ARM-v7a core
+options 	IMX50
+options 	IMX508
+options		IMX51
+options 	PMAPCOUNTERS
+
+# Architecture options
+
+options 	MEMSTART=0x70000000
+options 	MEMSIZE=256
+options 	IMX51_IPGCLK_FREQ=50000000   # XXX This value is not correct.
+
+# File systems
+
+file-system	FFS		# UFS
+#file-system	LFS		# log-structured file system
+file-system	MFS		# memory file system
+file-system	NFS		# Network file system
+#file-system 	ADOSFS		# AmigaDOS-compatible file system
+file-system 	EXT2FS		# second extended file system (linux)
+#file-system	CD9660		# ISO 9660 + Rock Ridge file system
+file-system	MSDOSFS		# MS-DOS file system
+file-system	FDESC		# /dev/fd
+file-system	KERNFS		# /kern
+file-system	NULLFS		# loopback file system
+file-system	PROCFS		# /proc
+#file-system	PUFFS		# Userspace file systems (e.g. ntfs-3g & sshfs)
+file-system	TMPFS		# memory file system
+#file-system	UMAPFS		# NULLFS + uid and gid remapping
+#file-system	UNION		# union file system
+file-system	PTYFS		# /dev/pts/N support
+
+# File system options
+#options 	QUOTA		# legacy UFS quotas
+#options 	QUOTA2		# new, in-filesystem UFS quotas
+#options 	FFS_EI		# FFS Endian Independent support
+#options 	NFSSERVER
+options 	WAPBL		# File system journaling support
+#options 	FFS_NO_SNAPSHOT	# No FFS snapshot support
+
+# Networking options
+
+#options 	GATEWAY		# packet forwarding
+options 	INET		# IP + ICMP + TCP + UDP
+options 	INET6		# IPV6
+#options 	IPSEC		# IP security
+#options 	IPSEC_DEBUG	# debug for IP security
+#options 	MROUTING	# IP multicast routing
+#options 	PIM		# Protocol Independent Multicast
+#options 	NETATALK	# AppleTalk networking
+#options 	PPP_BSDCOMP	# BSD-Compress compression support for PPP
+#options 	PPP_DEFLATE	# Deflate compression support for PPP
+#options 	PPP_FILTER	# Active filter support for PPP (requires bpf)
+#options 	TCP_DEBUG	# Record last TCP_NDEBUG packets with SO_DEBUG
+
+#options 	NFS_BOOT_BOOTP
+#options 	NFS_BOOT_DHCP
+#options 	NFS_BOOT_BOOTPARAM
+#options	DEBUG_NFS_BOOT_DHCP
+
+# Compatibility options
+
+#options 	COMPAT_43	# 4.3BSD compatibility.
+options 	COMPAT_60	# NetBSD 6.0 compatibility.
+#options 	COMPAT_50	# NetBSD 5.0 compatibility.
+#options 	COMPAT_40	# NetBSD 4.0 compatibility.
+#options 	COMPAT_30	# NetBSD 3.0 compatibility.
+#options 	COMPAT_20	# NetBSD 2.0 compatibility.
+#options 	COMPAT_16	# NetBSD 1.6 compatibility.
+#options 	COMPAT_15	# NetBSD 1.5 compatibility.
+#options 	COMPAT_14	# NetBSD 1.4 compatibility.
+#options 	COMPAT_13	# NetBSD 1.3 compatibility.
+#options 	COMPAT_12	# NetBSD 1.2 compatibility.
+#options 	COMPAT_11	# NetBSD 1.1 compatibility.
+#options 	COMPAT_10	# NetBSD 1.0 compatibility.
+#options 	COMPAT_09	# NetBSD 0.9 compatibility.
+#options 	TCP_COMPAT_42	# 4.2BSD TCP/IP bug compat. Not recommended.
+
+options 	COMPAT_OSSAUDIO	# OSS (Voxware) audio driver compatibility
+#options 	COMPAT_LINUX	# binary compatibility with Linux
+options		COMPAT_BSDPTY	# /dev/[pt]ty?? ptys.
+
+# Shared memory options
+
+options 	SYSVMSG		# System V-like message queues
+options 	SYSVSEM		# System V-like semaphores
+#options 	SEMMNI=10	# number of semaphore identifiers
+#options 	SEMMNS=60	# number of semaphores in system
+#options 	SEMUME=10	# max number of undo entries per process
+#options 	SEMMNU=30	# number of undo structures in system
+options 	SYSVSHM		# System V-like memory sharing
+
+# Device options
+
+# Console options.    also need IMXUARTCONSOLE
+options 	CONSDEVNAME="\"imxuart\"",CONADDR=0x53fc0000
+options 	CONSPEED=115200	# Console speed
+
+# kgdb
+#options	KGDB
+#options 	KGDB_DEVNAME="\"imxuart\""
+#options 	KGDB_DEVADDR=0x73fbc000
+#options 	KGDB_DEVRATE=115200
+
+# Miscellaneous kernel options
+options 	KTRACE		# system call tracing, a la ktrace(1)
+options 	IRQSTATS	# manage IRQ statistics
+#options 	KMEMSTATS	# kernel memory statistics
+options 	PCMCIAVERBOSE	# verbose PCMCIA configuration messages
+options 	USBVERBOSE	# verbose USB device autoconfig messages
+#options 	SCSIVERBOSE	# Verbose SCSI errors
+options 	MIIVERBOSE	# Verbose MII autoconfuration messages
+#options 	PCI_CONFIG_DUMP	# verbosely dump PCI config space
+#options 	DDB_KEYCODE=0x40
+options 	USERCONF	# userconf(4) support
+#options	PIPE_SOCKETPAIR	# smaller, but slower pipe(2)
+#options 	SYSCTL_INCLUDE_DESCR	# Include sysctl descriptions in kernel
+options 	NO_POWERSAVE	# uncomment this to run under ICE
+
+# Development and Debugging options
+#options 	PERFCTRS	# performance counters
+#options 	DIAGNOSTIC	# internally consistency checks
+#options 	DEBUG
+#options 	KMEMSTATS	# kernel memory statistics (vmstat -m)
+options 	DDB		# in-kernel debugger
+options 	DDB_ONPANIC=1	# see also sysctl(8): `ddb.onpanic'
+options 	DDB_HISTORY_SIZE=100	# Enable history editing in DDB
+options 	DDB_VERBOSE_HELP
+#options 	LOCKDEBUG
+#ptions 	PMAP_DEBUG	# Enable pmap_debug_level code
+#options 	IPKDB		# remote kernel debugging
+options 	VERBOSE_INIT_ARM # verbose bootstraping messages
+makeoptions	DEBUG="-g"	# compile full symbol table
+#makeoptions	COPTS="-O2"
+#options 	SYSCALL_STATS	# per syscall counts
+#options 	SYSCALL_TIMES 	# per syscall times
+#options 	SYSCALL_TIMES_HASCOUNTER	# use 'broken' rdtsc (soekris)
+#options 	SCSIPI_DEBUG
+#options	SCSIPI_DEBUG_TYPE=SCSIPI_BUSTYPE_SCSI
+#options	SCSIPI_DEBUG_TARGET=0
+#options	SCSIPI_DEBUG_LUN=0
+#options	DEBUG_STARTUP
+
+## USB Debugging options
+#options	USB_DEBUG
+#options	EHCI_DEBUG
+#options	OHCI_DEBUG
+#options	UHUB_DEBUG
+
+# Valid options for BOOT_ARGS:
+#  single		Boot to single user only
+#  kndb			Give control to kernel debugger
+#  ask			Ask for file name to reboot from
+#  pmapdebug=<n>	If PMAP_DEBUG, set pmap_debug_level to <n>
+#  memorydisk=<n>	Set memorydisk size to <n> KB
+#  quiet		Show aprint_naive output
+#  verbose		Show aprint_normal and aprint_verbose output
+options		BOOT_ARGS="\"verbose\""
+
+# Kernel root file system and dump configuration.
+config		netbsd		root on ? type ?
+config		netbsd-ld0	root on ld0 type ffs
+
+# The main bus device
+mainbus0	at root
+
+# The boot cpu
+cpu*		at mainbus?
+
+# Devices
+# On-chip
+# On-chip bus
+axi0		at mainbus?
+
+# Interrupt Cotroller
+tzic0		at axi? addr 0x0fffc000 size 0x4000 irqbase 0
+
+# Serial
+#imxuart0	at axi? addr 0x53fbc000 irq 31		# UART1
+imxuart1	at axi? addr 0x53fc0000 irq 32
+#imxuart2	at axi? addr 0x5000c000 irq 33
+options		IMXUARTCONSOLE
+
+# Clock Control
+imxccm0		at axi? addr 0x53fd4000
+options		IMX51_CKIL_FREQ=32768
+
+# Enhanced Periodic Interrupt Timer
+imxclock0	at axi? addr 0x53fac000 size 0x4000 irq 40
+
+# IOMUX
+imxiomux0	at axi? addr 0x53fa8000
+
+# WatchDog
+imxwdog0	at axi? addr 0x53f98000 irq 58 flags 0
+
+# GPIO
+imxgpio0	at axi? addr 0x53f84000 irqbase 128 irq 50
+imxgpio1	at axi? addr 0x53f88000 irqbase 160 irq 52
+imxgpio2	at axi? addr 0x53f8c000 irqbase 192 irq 54
+imxgpio3	at axi? addr 0x53f90000 irqbase 224 irq 56
+imxgpio4	at axi? addr 0x53fdc000 irqbase 256 irq 103
+imxgpio5	at axi? addr 0x53fe0000 irqbase 288 irq 105
+
+# EPDC E-Ink Controller
+#epdc0		at axi? addr 0x41010000 size 0x2000 irq 27
+#wsdisplay0	at wsemuldisplaydev? console ?
+#wsdisplay*	at wsemuldisplaydev?
+#options		EPDC_DEBUG=10
+#options		EINK_DEBUG
+#options		IMXEPDCCONSOLE
+
+# I2C
+imxi2c0		at axi? addr 0x63fc8000 irq 62
+imxi2c1		at axi? addr 0x63fc4000 irq 63
+#imxi2c2	at axi? addr 0x53fec000 irq 64
+
+# IIC
+iic*		at imxi2c?
+
+lmtemp*		at iic1 addr 0x48		# LM75 temperature sensor
+
+# SD/MMC
+sdhc0		at axi? addr 0x50004000 irq 1	# eSDHC1
+sdhc1		at axi? addr 0x50008000 irq 2	# eSDHC2
+sdhc2		at axi? addr 0x50020000 irq 3	# eSDHC3
+#sdhc3		at axi? addr 0x50024000 irq 4	# eSDHC4
+sdmmc*		at sdhc?
+ld*		at sdmmc?		# MMC/SD card
+#options 	SDHC_DEBUG
+#options 	SDMMC_DEBUG
+
+# USB
+imxusbc0	at axi? addr 0x53f80000
+ehci0		at imxusbc0	unit 0	irq 18 # OTG
+#ehci1		at imxusbc0	unit 1	irq 14 # Host1
+
+usb*		at ehci?
+
+# USB device drivers, just as soon as we have something to attach them to
+include "dev/usb/usbdevices.config"
+
+ukphy*		at mii? phy ?
+
+# Pseudo-Devices
+
+pseudo-device	crypto			# /dev/crypto device
+pseudo-device	swcrypto		# software crypto implementation
+
+# disk/mass storage pseudo-devices
+#pseudo-device	md			# memory disk device (ramdisk)
+#pseudo-device	vnd			# disk-like interface to files
+
+# network pseudo-devices
+pseudo-device	bpfilter		# Berkeley packet filter
+#pseudo-device	ipfilter		# IP filter (firewall) and NAT
+pseudo-device	loop			# network loopback
+pseudo-device	ppp			# Point-to-Point Protocol
+
+# miscellaneous pseudo-devices
+pseudo-device	pty			# pseudo-terminals
+pseudo-device	ksyms			# /dev/ksyms
+pseudo-device	clockctl		# NTP clockctl
+
+# wscons pseudo-devices
+pseudo-device	wsmux			# mouse & keyboard multiplexor
+pseudo-device	wsfont
+
+# local configuration
+cinclude "arch/evbarm/conf/KOBO.local"
--- a/sys/arch/evbarm/conf/KOBO_INSTALL
+++ b/sys/arch/evbarm/conf/KOBO_INSTALL
@ -0,0 +1,13 @@
+#	$NetBSD: KOBO_INSTALL,v 1.1 2014/07/25 11:22:50 hkenken Exp $
+#
+#	KOBO_INSTALL -- KOBO kernel with installation-sized
+#	ramdisk
+#
+
+include "arch/evbarm/conf/KOBO"
+include "arch/evbarm/conf/INSTALL"
+
+options BOOTHOWTO=RB_SINGLE
+
+no makeoptions	DEBUG
+no config netbsd-ld0
--- a/sys/arch/evbarm/conf/README.evbarm
+++ b/sys/arch/evbarm/conf/README.evbarm
@ -1,4 +1,4 @@
-$NetBSD: README.evbarm,v 1.7 2013/09/30 13:38:16 kiyohara Exp $
+$NetBSD: README.evbarm,v 1.8 2014/07/25 11:22:50 hkenken Exp $

 config		date		boards
 -------------------------------------------------------------------------------
@ -24,6 +24,7 @@ IQ80310		2001/09/05	Intel IQ80310 eval board
 IQ80321		2002/03/27	Intel IQ321 eval board
 IXDP425		2003/04/08	Intel IXDP425/IXCDP1100 development platform
 IXM1200		2002/07/15	Intel IMX1200 eval board
+KOBO		2014/07/25	Kobo touch (eReaders)
 KUROBOX_PRO	2010/10/02	Kuroutoshikou KURO-BOX/PRO
 LUBBOCK		2003/06/18	Intel Lubbock DBPXA250 board
 MARVELL_NAS	2010/10/02	Generic Marvell SoC based NAS
--- a/sys/arch/evbarm/conf/files.kobo
+++ b/sys/arch/evbarm/conf/files.kobo
@ -0,0 +1,26 @@
+#	$NetBSD: files.kobo,v 1.1 2014/07/25 11:22:50 hkenken Exp $
+#
+# KOBO evaluation board configuration info
+#
+
+file	arch/arm/arm32/arm32_boot.c
+file	arch/arm/arm32/arm32_kvminit.c
+file	arch/arm/arm32/arm32_reboot.c
+
+file	arch/evbarm/kobo/kobo_machdep.c
+
+# Kernel boot arguments
+defparam opt_machdep.h				BOOT_ARGS
+
+# CPU support and integrated peripherals
+include	"arch/arm/imx/files.imx51"
+
+# USB Host controller
+device	imxusbc_axi
+attach	imxusbc at axi with imxusbc_axi
+file	arch/evbarm/kobo/kobo_usb.c		imxusbc_axi
+
+# E-Ink controller
+# attach	epdc at axi with eink_kobo
+# file	arch/evbarm/kobo/kobo_eink.c		eink_kobo
+# defflag	opt_kobo_eink.h				EINK_DEBUG
--- a/sys/arch/evbarm/conf/mk.kobo
+++ b/sys/arch/evbarm/conf/mk.kobo
@ -0,0 +1,31 @@
+#	$NetBSD: mk.kobo,v 1.1 2014/07/25 11:22:50 hkenken Exp $
+
+CPPFLAGS+= -mcpu=cortex-a8 -mfpu=neon
+
+SYSTEM_FIRST_OBJ=	kobo_start.o
+SYSTEM_FIRST_SFILE=	${THISARM}/kobo/kobo_start.S
+
+MKUBOOTIMAGEARGS=	-A arm -T kernel
+MKUBOOTIMAGEARGS+=	-a $(LOADADDRESS) -e $(LOADADDRESS)
+MKUBOOTIMAGEARGS+=	-n "NetBSD/$(BOARDTYPE) ${_OSRELEASE}"
+MKUBOOTIMAGEARGS_NONE=	${MKUBOOTIMAGEARGS} -C none
+MKUBOOTIMAGEARGS_GZ=	${MKUBOOTIMAGEARGS} -C gz
+
+KERNEL_BASE_PHYS=$(LOADADDRESS)
+KERNEL_BASE_VIRT=$(LOADADDRESS_VIRT)
+
+SYSTEM_LD_TAIL_EXTRA+=; \
+	echo ${OBJCOPY} -S -O binary $@ $@.bin; \
+	${OBJCOPY} -S -O binary $@ $@.bin; \
+	echo ${TOOL_GZIP} -9c $@.bin > $@.bin.gz; \
+	${TOOL_GZIP} -9c $@.bin > $@.bin.gz; \
+	echo ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_GZ} $@.bin.gz $@.gz.ub; \
+	${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_GZ} $@.bin.gz $@.gz.ub; \
+	echo ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_NONE} $@.bin $@.ub; \
+	${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_NONE} $@.bin $@.ub; \
+	echo
+
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin@}
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.ub@}
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin.gz@}
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.gz.ub@}
--- a/sys/arch/evbarm/conf/std.kobo
+++ b/sys/arch/evbarm/conf/std.kobo
@ -0,0 +1,29 @@
+#	$NetBSD: std.kobo,v 1.1 2014/07/25 11:22:50 hkenken Exp $
+#
+# standard NetBSD/evbarm options for Kobo
+
+machine	evbarm arm
+include 	"arch/evbarm/conf/std.evbarm"
+
+# Pull in i.mx51 config definitions.
+include	  	"arch/evbarm/conf/files.kobo"
+
+options 	MODULAR
+options 	__HAVE_FAST_SOFTINTS		# should be in types.h
+options 	__HAVE_CPU_COUNTER
+options         __HAVE_MM_MD_DIRECT_MAPPED_PHYS
+options 	__HAVE_CPU_UAREA_ALLOC_IDLELWP
+options 	ARM_HAS_VBAR
+options 	TPIDRPRW_IS_CURCPU
+options 	CORTEX_PMC
+options 	CORTEX_PMC_CCNT_HZ=800000000
+options 	KERNEL_BASE_EXT=0x80000000
+options 	EVBARM_BOARDTYPE="kobo"
+options 	FPU_VFP
+
+makeoptions	LOADADDRESS_VIRT="0x80100000"
+makeoptions	LOADADDRESS="0x70100000"
+makeoptions	BOARDMKFRAG="${THISARM}/conf/mk.kobo"
+
+options 	ARM_INTR_IMPL="<arch/arm/imx/imx51_intr.h>"
+options		ARM_GENERIC_TODR
--- a/sys/arch/evbarm/kobo/kobo.h
+++ b/sys/arch/evbarm/kobo/kobo.h
@ -0,0 +1,45 @@
+/*	$NetBSD: kobo.h,v 1.1 2014/07/25 11:22:50 hkenken Exp $	*/
+
+/*
+ * Copyright (c) 2014  Genetec Corporation.  All rights reserved.
+ * Written by Hashimoto Kenichi for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _EVBARM_KOBO_KOBO_H
+#define _EVBARM_KOBO_KOBO_H
+
+/*
+ * Kernel VM space: 256MB at KERNEL_VM_BASE
+ */
+#define KERNEL_VM_BASE		0xc0000000
+#define KERNEL_VM_SIZE		0x10000000
+
+#define GPIO0_IRQBASE		128
+#define GPIO1_IRQBASE		160
+#define GPIO2_IRQBASE		192
+#define GPIO3_IRQBASE		224
+#define GPIO4_IRQBASE		256
+#define GPIO5_IRQBASE		288
+
+#endif /* _EVBARM_KOBO_KOBO_H */
--- a/sys/arch/evbarm/kobo/kobo_machdep.c
+++ b/sys/arch/evbarm/kobo/kobo_machdep.c
@ -0,0 +1,570 @@
+/*	$NetBSD: kobo_machdep.c,v 1.1 2014/07/25 11:22:50 hkenken Exp $	*/
+
+/*
+ * Copyright (c) 2002, 2003, 2005, 2010  Genetec Corporation.
+ * All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Machine dependent functions for kernel setup for RAKUTEN Kobo.
+ * Based on iq80310_machhdep.c
+ */
+/*
+ * Copyright (c) 2001 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed for the NetBSD Project by
+ *	Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1997,1998 Mark Brinicombe.
+ * Copyright (c) 1997,1998 Causality Limited.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe
+ *	for the NetBSD Project.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Machine dependent functions for kernel setup for Intel IQ80310 evaluation
+ * boards using RedBoot firmware.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: kobo_machdep.c,v 1.1 2014/07/25 11:22:50 hkenken Exp $");
+
+#include "opt_evbarm_boardtype.h"
+#include "opt_arm_debug.h"
+#include "opt_cputypes.h"
+#include "opt_ddb.h"
+#include "opt_kgdb.h"
+#include "opt_md.h"
+#include "opt_com.h"
+#include "imxuart.h"
+#include "opt_imxuart.h"
+#include "opt_imx.h"
+#include "opt_machdep.h"
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/termios.h>
+#include <sys/bus.h>
+
+#include <machine/db_machdep.h>
+#ifdef KGDB
+#include <sys/kgdb.h>
+#endif
+
+#include <machine/bootconfig.h>
+
+#include <arm/arm32/machdep.h>
+
+#include <arm/imx/imx51reg.h>
+#include <arm/imx/imx51var.h>
+#include <arm/imx/imxuartreg.h>
+#include <arm/imx/imxuartvar.h>
+#include <arm/imx/imx50_iomuxreg.h>
+#include <arm/imx/imxgpiovar.h>
+
+#include <evbarm/kobo/kobo.h>
+#include <evbarm/kobo/kobo_reg.h>
+
+/* Kernel text starts 1MB in from the bottom of the kernel address space. */
+#define	KERNEL_TEXT_BASE	(KERNEL_BASE + 0x00100000)
+
+BootConfig bootconfig;		/* Boot config storage */
+static char bootargs[MAX_BOOT_STRING];
+char *boot_args = NULL;
+
+extern char KERNEL_BASE_phys[];
+
+/*
+ * Macros to translate between physical and virtual for a subset of the
+ * kernel address space.  *Not* for general use.
+ */
+#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
+
+void consinit(void);
+
+#ifdef KGDB
+void	kgdb_port_init(void);
+#endif
+
+static void init_clocks(void);
+static void setup_ioports(void);
+
+#ifndef CONSPEED
+#define CONSPEED B115200	/* What RedBoot uses */
+#endif
+#ifndef CONMODE
+#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
+#endif
+
+int comcnspeed = CONSPEED;
+int comcnmode = CONMODE;
+
+/*
+ * Static device mappings. These peripheral registers are mapped at
+ * fixed virtual addresses very early in initarm() so that we can use
+ * them while booting the kernel, and stay at the same address
+ * throughout whole kernel's life time.
+ *
+ * We use this table twice; once with bootstrap page table, and once
+ * with kernel's page table which we build up in initarm().
+ *
+ * Since we map these registers into the bootstrap page table using
+ * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
+ * registers segment-aligned and segment-rounded in order to avoid
+ * using the 2nd page tables.
+ */
+
+#define _A(a)   ((a) & ~L1_S_OFFSET)
+#define _S(s)   (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
+
+const struct pmap_devmap kobo_devmap[] = {
+	{
+		/* for UART2, IOMUXC */
+		.pd_va = _A(KOBO_IO_VBASE0),
+		.pd_pa = _A(KOBO_IO_PBASE0),
+		.pd_size = _S(L1_S_SIZE * 4),
+		.pd_prot = VM_PROT_READ|VM_PROT_WRITE,
+		.pd_cache = PTE_NOCACHE
+	},
+	{0}
+};
+
+#undef	_A
+#undef	_S
+
+#ifndef MEMSTART
+#define MEMSTART	0x70000000
+#endif
+#ifndef MEMSIZE
+#define MEMSIZE		256
+#endif
+
+static void
+init_clocks(void)
+{
+	cortex_pmc_ccnt_init();
+}
+
+struct iomux_setup {
+	/* iomux registers are 32-bit wide, but upper 16 bits are not
+	 * used. */
+	uint16_t	reg;
+	uint16_t	val;
+};
+
+#define	IOMUX_M(padname, mux)		\
+	IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux)
+
+#define	IOMUX_P(padname, pad)		\
+	IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad)
+
+#define	IOMUX_MP(padname, mux, pad)	\
+	IOMUX_M(padname, mux), \
+	IOMUX_P(padname, pad)
+
+#define	IOMUX_DATA(offset, value)	\
+	{				\
+		.reg = (offset),	\
+		.val = (value),		\
+	}
+
+const struct iomux_setup iomux_setup_data[] = {
+#define	HYS	PAD_CTL_HYS
+#define	ODE	PAD_CTL_ODE
+#define	DSEHIGH	PAD_CTL_DSE_HIGH
+#define	DSEMID	PAD_CTL_DSE_MID
+#define	DSELOW	PAD_CTL_DSE_LOW
+#define	DSEMAX	PAD_CTL_DSE_MAX
+#define	SRE	PAD_CTL_SRE
+#define	KEEPER	PAD_CTL_KEEPER
+#define	PULL	PAD_CTL_PULL
+#define	PU_22K	PAD_CTL_PUS_22K_PU
+#define	PU_47K	PAD_CTL_PUS_47K_PU
+#define	PU_100K	PAD_CTL_PUS_100K_PU
+#define	PD_100K	PAD_CTL_PUS_100K_PD
+#define	HVE	PAD_CTL_HVE	/* Low output voltage */
+
+#define	ALT0	IOMUX_CONFIG_ALT0
+#define	ALT1	IOMUX_CONFIG_ALT1
+#define	ALT2	IOMUX_CONFIG_ALT2
+#define	ALT3	IOMUX_CONFIG_ALT3
+#define	ALT4	IOMUX_CONFIG_ALT4
+#define	ALT5	IOMUX_CONFIG_ALT5
+#define	ALT6	IOMUX_CONFIG_ALT6
+#define	ALT7	IOMUX_CONFIG_ALT7
+#define	SION	IOMUX_CONFIG_SION
+
+	/* I2C1 */
+	IOMUX_MP(I2C1_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
+	IOMUX_MP(I2C1_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
+
+	/* I2C2 */
+	IOMUX_MP(I2C2_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
+	IOMUX_MP(I2C2_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
+
+	/* I2C3 */
+	IOMUX_MP(I2C3_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
+	IOMUX_MP(I2C3_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
+
+	/* UART2 */
+	IOMUX_MP(UART2_RXD, ALT0, HYS | PULL | DSEHIGH | SRE),
+	IOMUX_MP(UART2_TXD, ALT0, HYS | PULL | DSEHIGH | SRE),
+
+	/* SD1 */
+	IOMUX_MP(SD1_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD1_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD1_D0, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD1_D1, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD1_D2, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD1_D3, ALT0, HVE | PU_22K | DSEMAX | SRE),
+//	IOMUX_MP(SD1_CD, ALT0, HVE | PU_22K | DSEMAX | SRE),
+
+	/* SD2 */
+	IOMUX_MP(SD2_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD2_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD2_D0, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD2_D1, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD2_D2, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD2_D3, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD2_CD, ALT0, HVE | PU_22K | DSEMAX | SRE),
+
+	IOMUX_DATA(IOMUXC_ESDHC2_IPP_CARD_DET_SELECT_INPUT, INPUT_DAISY_1),
+
+	/* SD3 */
+	IOMUX_MP(SD3_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD3_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD3_D0, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD3_D1, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD3_D2, ALT0, HVE | PU_22K | DSEMAX | SRE),
+	IOMUX_MP(SD3_D3, ALT0, HVE | PU_22K | DSEMAX | SRE),
+//	IOMUX_MP(SD3_CD, ALT0, HVE | PU_22K | DSEMAX | SRE),
+
+	/* OTG */
+	IOMUX_M(PWM2, ALT2),
+//	IOMUX_MP(PWM1, ALT2, HYS | KEEPER | DSEHIGH),
+
+	/* EPDC */
+	IOMUX_M(EPDC_D0, ALT0),
+	IOMUX_M(EPDC_D1, ALT0),
+	IOMUX_M(EPDC_D2, ALT0),
+	IOMUX_M(EPDC_D3, ALT0),
+	IOMUX_M(EPDC_D4, ALT0),
+	IOMUX_M(EPDC_D5, ALT0),
+	IOMUX_M(EPDC_D6, ALT0),
+	IOMUX_M(EPDC_D7, ALT0),
+	IOMUX_M(EPDC_GDCLK, ALT0),
+	IOMUX_M(EPDC_GDSP, ALT0),
+	IOMUX_M(EPDC_GDOE, ALT0),
+	IOMUX_M(EPDC_GDRL, ALT0),
+	IOMUX_M(EPDC_SDCLK, ALT0),
+	IOMUX_M(EPDC_SDOE, ALT0),
+	IOMUX_M(EPDC_SDLE, ALT0),
+	IOMUX_M(EPDC_BDR0, ALT0),
+	IOMUX_M(EPDC_BDR1, ALT0),
+	IOMUX_M(EPDC_SDCE0, ALT0),
+
+	IOMUX_M(EPDC_PWRSTAT, ALT1),	/* GPIO3[28] */
+	IOMUX_M(EPDC_PWRCTRL0, ALT1),	/* GPIO3[29] */
+	IOMUX_M(EPDC_VCOM0, ALT1),	/* GPIO4[21] */
+	IOMUX_M(UART4_TXD, ALT1),	/* GPIO6[16] */
+	IOMUX_M(UART4_RXD, ALT1),	/* GPIO6[17] */
+
+//	IOMUX_M(PWM2, ALT1),		/* GPIO6[25] */
+
+#undef	ODE
+#undef	HYS
+#undef	SRE
+#undef	PULL
+#undef	KEEPER
+#undef	PU_22K
+#undef	PU_47K
+#undef	PU_100K
+#undef	PD_100K
+#undef	HVE
+#undef	DSEMAX
+#undef	DSEHIGH
+#undef	DSEMID
+#undef	DSELOW
+
+#undef	ALT0
+#undef	ALT1
+#undef	ALT2
+#undef	ALT3
+#undef	ALT4
+#undef	ALT5
+#undef	ALT6
+#undef	ALT7
+#undef	SION
+};
+
+static void
+setup_ioports(void)
+{
+	int i;
+	const struct iomux_setup *p;
+
+	for (i=0; i < __arraycount(iomux_setup_data); ++i) {
+		p = iomux_setup_data + i;
+
+		ioreg_write(KOBO_IOMUXC_VBASE + p->reg,
+			    p->val);
+	}
+}
+
+#ifdef	CONSDEVNAME
+const char consdevname[] = CONSDEVNAME;
+
+#ifndef	CONMODE
+#define	CONMODE	((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
+#endif
+#ifndef	CONSPEED
+#define	CONSPEED	115200
+#endif
+
+int consmode = CONMODE;
+int consrate = CONSPEED;
+
+#endif	/* CONSDEVNAME */
+
+#ifndef	IMXUART_FREQ
+#define	IMXUART_FREQ	24000000
+#endif
+
+/*
+ * u_int initarm(...)
+ *
+ * Initial entry point on startup. This gets called before main() is
+ * entered.
+ * It should be responsible for setting up everything that must be
+ * in place when main is called.
+ * This includes
+ *   Taking a copy of the boot configuration structure.
+ *   Initialising the physical console so characters can be printed.
+ *   Setting up page tables for the kernel
+ */
+u_int
+initarm(void *arg)
+{
+	/*
+	 * Heads up ... Setup the CPU / MMU / TLB functions
+	 */
+	if (set_cpufuncs())		// starts PMC counter
+		panic("cpu not recognized!");
+
+	/* map some peripheral registers */
+	pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE,
+	    kobo_devmap);
+
+	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
+
+	/* Register devmap for devices we mapped in start */
+	pmap_devmap_register(kobo_devmap);
+	setup_ioports();
+
+	consinit();
+
+	init_clocks();
+
+#ifdef KGDB
+	kgdb_port_init();
+#endif
+
+	/* Talk to the user */
+	printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
+
+#ifdef BOOT_ARGS
+	char mi_bootargs[] = BOOT_ARGS;
+	parse_mi_bootargs(mi_bootargs);
+#endif
+	bootargs[0] = '\0';
+
+#ifdef VERBOSE_INIT_ARM
+	printf("initarm: Configuring system");
+	printf(", CLIDR=%010o CTR=%#x",
+	    armreg_clidr_read(), armreg_ctr_read());
+	printf("\n");
+#endif
+
+#ifdef VERBOSE_INIT_ARM
+	printf("initarm: Configuring system ...\n");
+#endif
+	/*
+	 * Set up the variables that define the availability of physical
+	 * memory.
+	 */
+
+	/* Fake bootconfig structure for the benefit of pmap.c. */
+	bootconfig.dramblocks = 1;
+	bootconfig.dram[0].address = MEMSTART;
+	bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE;
+
+	psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE;
+
+#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
+	const bool mapallmem_p = true;
+	if (ram_size > (KERNEL_VM_BASE - KERNEL_BASE)) {
+		printf("%s: dropping RAM size from %luMB to %uMB\n",
+		    __func__, (unsigned long) (ram_size >> 20),
+		    (KERNEL_VM_BASE - KERNEL_BASE) >> 20);
+		ram_size = KERNEL_VM_BASE - KERNEL_BASE;
+	}
+	KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
+#else
+	const bool mapallmem_p = false;
+#endif
+
+	arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
+	    KERNEL_BASE_PHYS);
+	arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0,
+	    kobo_devmap, mapallmem_p);
+
+#ifdef BOOTHOWTO
+	boothowto |= BOOTHOWTO;
+#endif
+
+	return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
+}
+
+void
+consinit(void)
+{
+	static int consinit_called = 0;
+
+	if (consinit_called)
+		return;
+
+	consinit_called = 1;
+
+#ifdef	CONSDEVNAME
+
+#if NIMXUART > 0
+	imxuart_set_frequency(IMXUART_FREQ, 2);
+#endif
+
+#if (NIMXUART > 0) && defined(IMXUARTCONSOLE)
+	if (strcmp(consdevname, "imxuart") == 0) {
+		paddr_t consaddr;
+#ifdef	CONADDR
+		consaddr = CONADDR;
+#else
+		consaddr = IMX51_UART2_BASE;
+#endif
+		imxuart_cons_attach(&imx_bs_tag, consaddr, consrate, consmode);
+		return;
+	}
+#endif
+
+#endif
+
+#if (NWSDISPLAY > 0) && defined(IMXEPDCCONSOLE)
+#if NUKBD > 0
+	ukbd_cnattach();
+#endif
+	{
+		extern void kobo_cnattach(void);
+		kobo_cnattach();
+	}
+#endif
+}
+
+#ifdef KGDB
+#ifndef KGDB_DEVNAME
+#define KGDB_DEVNAME "imxuart"
+#endif
+#ifndef KGDB_DEVMODE
+#define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
+#endif
+
+const char kgdb_devname[20] = KGDB_DEVNAME;
+int kgdb_mode = KGDB_DEVMODE;
+int kgdb_addr = KGDB_DEVADDR;
+extern int kgdb_rate;	/* defined in kgdb_stub.c */
+
+void
+kgdb_port_init(void)
+{
+#if (NIMXUART > 0)
+	if (strcmp(kgdb_devname, "imxuart") == 0) {
+		imxuart_kgdb_attach(&imx_bs_tag, kgdb_addr,
+		kgdb_rate, kgdb_mode);
+	    return;
+	}
+
+#endif
+}
+#endif
--- a/sys/arch/evbarm/kobo/kobo_reg.h
+++ b/sys/arch/evbarm/kobo/kobo_reg.h
@ -0,0 +1,69 @@
+/*	$NetBSD: kobo_reg.h,v 1.1 2014/07/25 11:22:50 hkenken Exp $	*/
+
+/*
+ * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef _EVBARM_KOBO_REG_H
+#define _EVBARM_KOBO_REG_H
+
+#include "opt_imx.h"
+
+#include <arm/imx/imx51reg.h>
+
+#define DDRSDRAM_BASE	CSD0DDR_BASE
+
+/* map UART2 and IOMUXC for bootstrap */
+#define	KOBO_PRIVATE_VBASE	0xf0000000
+#define	KOBO_IO_VBASE0		0xfd000000
+#define	KOBO_IO_PBASE0		0x53f00000	/* GPIO, IOMUXC, UART */
+
+#define	KOBO_UART2_VBASE	\
+	(IMX51_UART2_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0)
+#define	KOBO_IOMUXC_VBASE	\
+	(IOMUXC_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0)
+
+/* GPIO[1..4] */
+#define	KOBO_GPIO1_VBASE	\
+	(GPIO1_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0)
+#define	KOBO_GPIO_VBASE(n)	\
+	(KOBO_GPIO1_VBASE+((n)-1)*0x4000)
+#define	KOBO_WDOG_VBASE	\
+	(WDOG1_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0)
+
+#define ioreg_read(a)		(*(volatile uint32_t *)(a))
+#define ioreg_write(a,v)	(*(volatile uint32_t *)(a)=(v))
+
+#define	ioreg32_read	ioreg_read
+#define	ioreg32_write	ioreg_write
+
+#define	ioreg16_read(a) 	(*(volatile uint16_t *)(a))
+#define	ioreg16_write(a,v)	(*(volatile uint16_t *)(a) = (v))
+
+#define	ioreg8_read(a)  	(*(volatile uint8_t *)(a))
+#define	ioreg8_write(a,v)	(*(volatile uint8_t *)(a) = (v))
+
+#endif /* _EVBARM_KOBO_REG_H */
--- a/sys/arch/evbarm/kobo/kobo_start.S
+++ b/sys/arch/evbarm/kobo/kobo_start.S
@ -0,0 +1,332 @@
+/*	$NetBSD: kobo_start.S,v 1.1 2014/07/25 11:22:50 hkenken Exp $	*/
+
+/*-
+ * Copyright (c) 2009 SHIMIZU Ryo <ryo@nerv.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2002, 2003, 2010  Genetec Corporation.  All rights reserved.
+ * Written by Kenichi Hashimoto and Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "opt_imx.h"
+#include "opt_com.h"
+#include "opt_cpuoptions.h"
+#include "opt_cputypes.h"
+#include "opt_arm_debug.h"
+
+#include <arm/asm.h>
+#include <arm/armreg.h>
+#include "assym.h"
+
+#include <arm/imx/imx51reg.h>
+#include <arm/imx/imxuartreg.h>
+#include <evbarm/kobo/kobo_reg.h>
+
+RCSID("$NetBSD: kobo_start.S,v 1.1 2014/07/25 11:22:50 hkenken Exp $")
+
+#if defined(VERBOSE_INIT_ARM)
+#define DEBUG_STARTUP
+#define	XPUTC(n) 	mov r0, n; bl _C_LABEL(debugputc)
+#else
+#define	XPUTC(n)
+#endif
+
+#ifndef SDRAM_START
+#define SDRAM_START CSD0DDR_BASE
+#endif
+#define KERNEL_TEXT_ADDR	(SDRAM_START+0x00100000)
+
+#define INIT_MEMSIZE	128
+#define TEMP_L1_TABLE	(SDRAM_START + INIT_MEMSIZE * 0x100000 - L1_TABLE_SIZE)
+
+#ifdef	DEBUG_STARTUP
+#define	CHECKPOINT(n)	CHECKPOINT2(n,r0,r1)
+#define	CHECKPOINT2(n,ra,rb)		\
+	mov	ra, #0x30+(n); 		\
+	ldr	rb, =UART2_BASE;	\
+	str	ra, [rb, #IMX_UTXD];
+#else
+#define	CHECKPOINT(n)		/* nothing to do */
+#define	CHECKPOINT2(n,ra,rb)	/* nothing to do */
+#endif
+
+	.section .start,"ax",%progbits
+
+	.text
+
+	.global _C_LABEL(kobo_start)
+_C_LABEL(kobo_start):
+	CHECKPOINT(0)
+
+#ifdef	DEBUG_STARTUP
+	ldr	sp,=SDRAM_START+0x4000
+
+	bl	newline
+	ldr	r0, =0xdeadb01f
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+
+	mov	r0, pc
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+
+	mrc	p15, 0, r0, c0, c0, 3	/* read TLB type register */
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+
+	mrc	p15, 0, r0, c1, c0, 0	/* read control register */
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+
+	mrc	p15, 0, r0, c2, c0, 0	/* read TTB0 */
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+
+	mrc	p15, 0, r0, c2, c0, 1	/* read TTB1 */
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+
+	ldr	r0, =0xbabeface
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+
+	/* dump some of UART2 registers to know clock frequency */
+	ldr	r4,=UART2_BASE
+	ldr	r0,[r4,#IMX_UBMR]
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+	ldr	r0,[r4,#IMX_UBIR]
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+	ldr	r0,[r4,#IMX_UFCR]
+	bl	_C_LABEL(debugprintx)
+	bl	newline
+#endif	/* DEBUG_STARTUP */
+
+	/* Are we running on right place ? */
+	ldr	r2, =KERNEL_TEXT_ADDR
+	adr	r0, _C_LABEL(kobo_start)
+	cmp	r0, r2
+	beq	relocated
+
+	/*
+	 * move me to RAM
+	 */
+	ldr	r1, .Lcopy_size
+	add	r1, r1, #3
+	mov	r1, r1, LSR #2
+	mov	r4, r2
+
+	bhs	5f
+
+	/* src < dest. copy from top */
+	add r0,r0,r1,LSL #2
+	add r2,r2,r1,LSL #2
+
+3:	ldr r3,[r0,#-4]!
+	str r3,[r2,#-4]!
+	subs r1,r1,#1
+	bhi 3b
+	b 7f
+
+	/* src >= dest. copy from bottom */
+5:	ldr r3,[r0],#4
+	str r3,[r2],#4
+	subs r1,r1,#1
+	bhi 5b
+7:
+	/*
+	 * Okay, we are finished relocating the text segment.  Now
+	 * we need to leap to the next instruction.
+	 */
+	ldr	r0, .Lrelocate_address
+	ldr	r1, .Lrelocate_offset
+	add	pc, r0, r1
+
+.Lrelocate_offset:	.word relocated-_C_LABEL(kobo_start)
+
+relocated:
+	CHECKPOINT(1)
+
+	/* Move into supervisor mode and disable IRQs/FIQs. */
+	cpsid   if, #PSR_SVC32_MODE
+
+	bl	cortex_init
+
+	movw	r0, #:lower16:TEMP_L1_TABLE
+	movt	r0, #:upper16:TEMP_L1_TABLE
+	adr	r1, .Lmmu_init_table
+	bl	arm_boot_l1pt_init
+
+	CHECKPOINT(2)
+
+	/*
+	 * Turn on the MMU, Caches, etc.
+	 */
+	movw	r0, #:lower16:TEMP_L1_TABLE
+	movt	r0, #:upper16:TEMP_L1_TABLE
+	movw	lr, #:lower16:1f
+	movt	lr, #:upper16:1f
+	bl	arm_cpuinit
+
+	CHECKPOINT(3)
+
+	movw	ip, #:lower16:start
+	movt	ip, #:upper16:start
+	bx	ip		/* Jump to start (flushes pipeline). */
+
+	/* NOTREACHED */
+
+/*
+ * Calculate size of kernel to copy.  Don't bother to copy bss,
+ * although I guess the CPU could use the warmup exercise ...
+ */
+.Lcopy_size:
+        .word	_edata - _C_LABEL(kobo_start)
+
+.Lrelocate_address:
+	.word	KERNEL_BASE_phys
+
+#include <arm/cortex/a9_mpsubr.S>
+
+.Lmmu_init_table:
+	/* fill all table VA==PA */
+	MMU_INIT(0x00000000, 0x00000000, 1 << (32 - L1_S_SHIFT),
+		L1_S_PROTO_armv7 | L1_S_APv7_KRW)
+
+	/* Map memory 1:1 VA to PA, write-back cacheable, shareable */
+	MMU_INIT(SDRAM_START, SDRAM_START, MEMSIZE,
+		L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_CACHEABLE)
+
+	/* Map KERNEL_BASE VA to SDRAM PA, write-back cacheable, shareable */
+	MMU_INIT(KERNEL_BASE, SDRAM_START, INIT_MEMSIZE,
+		L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_CACHEABLE)
+
+	/* Map KERNEL_BASE VA to SDRAM PA, write-back cacheable, shareable */
+	MMU_INIT(KERNEL_BASE, DDRSDRAM_BASE, INIT_MEMSIZE,
+		L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_CACHEABLE)
+
+	/* Map all 256KB of L4 WAKEUP (so console will work) */
+	MMU_INIT(KOBO_IO_VBASE0, KOBO_IO_PBASE0, 4,
+		L1_S_PROTO | L1_S_APv7_KRW | L1_S_V6_XN)
+
+	/* end of table */
+	MMU_INIT(0, 0, 0, 0)
+
+#ifdef	DEBUG_STARTUP
+.Luart0adr:
+	.word	UART2_BASE
+
+	.global _C_LABEL(debugprintx)
+_C_LABEL(debugprintx):
+	stmfd	sp!, {r0, r3, lr}
+
+	mov	r3, r0
+
+	mov	r0, #'0'
+	bl	debugputc
+	mov	r0, #'x'
+	bl	debugputc
+
+	bl	print_r3
+
+	ldmfd	sp!, {r0, r3, pc}
+
+	.global	_C_LABEL(debugprint)
+_C_LABEL(debugprint):
+	stmfd	sp!, {r0, r1, lr}
+	mov	r1, r0
+1:
+	ldrb	r0, [r1], #1
+	cmp	r0, #0
+	beq	9f
+	bl	debugputc
+	b	1b
+9:
+	ldmfd	sp!, {r0, r1, pc}
+
+print_r3:
+	stmfd	sp!, {r0, r3-r6, lr}
+	mov	r4, #28
+	mov	r5, #0xf
+1:
+	and	r6, r5, r3, ROR r4
+	cmp	r6, #10
+	addlt	r0, r6, #'0'
+	addge	r0, r6, #('a' - 0x0a)
+	bl	debugputc
+	subs	r4, r4, #4
+	bge	1b
+	ldmfd	sp!, {r0, r3-r6, pc}
+
+	.global	_C_LABEL(debugputc)
+_C_LABEL(debugputc):
+	stmfd	sp!, {r0, r1, r2, lr}
+
+	ldr	r1, .Luart0adr
+
+1:	/* wait */
+	ldr	r2, [r1, #0x98]
+	tst	r2, #0x4000
+	beq	1b
+
+	/* output */
+	strb	r0, [r1, #0x40]
+
+	ldmfd	sp!, {r0, r1, r2, pc}
+
+newline:
+	mov	r1, lr
+	mov	r0, #0x0d
+	bl	_C_LABEL(debugputc)
+	mov	lr, r1
+	mov	r0, #0x0a
+	b	_C_LABEL(debugputc)
+
+#endif	/* DEBUG_STARTUP */
+
+END(_C_LABEL(kobo_start))
--- a/sys/arch/evbarm/kobo/kobo_usb.c
+++ b/sys/arch/evbarm/kobo/kobo_usb.c
@ -0,0 +1,189 @@
+/*	$NetBSD: kobo_usb.c,v 1.1 2014/07/25 11:22:50 hkenken Exp $	*/
+
+/*
+ * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: kobo_usb.c,v 1.1 2014/07/25 11:22:50 hkenken Exp $");
+
+#include "opt_imx.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/conf.h>
+#include <sys/kernel.h>
+#include <sys/kthread.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/bus.h>
+#include <sys/gpio.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usbdivar.h>
+#include <dev/usb/usb_mem.h>
+
+#include <dev/usb/ehcireg.h>
+#include <dev/usb/ehcivar.h>
+
+#include <arm/imx/imx51reg.h>
+#include <arm/imx/imx51var.h>
+#include <arm/imx/imxusbreg.h>
+#include <arm/imx/imxusbvar.h>
+#include <arm/imx/imx50_iomuxreg.h>
+#include <arm/imx/imxgpiovar.h>
+#include <arm/imx/imx51_ccmreg.h>
+#include <arm/imx/imx51_ccmvar.h>
+
+#include "locators.h"
+
+struct kobo_usbc_softc {
+	struct imxusbc_softc sc_imxusbc;
+};
+
+static int	imxusbc_match(device_t, cfdata_t, void *);
+static void	imxusbc_attach(device_t, device_t, void *);
+static void	kobo_usb_init(struct imxehci_softc *);
+
+static void	init_otg(struct imxehci_softc *);
+static void	init_h1(struct imxehci_softc *);
+
+extern const struct iomux_conf iomux_usb1_config[];
+
+/* attach structures */
+CFATTACH_DECL_NEW(imxusbc_axi, sizeof(struct kobo_usbc_softc),
+    imxusbc_match, imxusbc_attach, NULL, NULL);
+
+static int
+imxusbc_match(device_t parent, cfdata_t cf, void *aux)
+{
+	struct axi_attach_args *aa = aux;
+
+	if (aa->aa_addr == USBOH3_BASE)
+		return 1;
+	return 0;
+}
+
+static void
+imxusbc_attach(device_t parent, device_t self, void *aux)
+{
+	struct axi_attach_args *aa = aux;
+	struct kobo_usbc_softc *sc = device_private(self);
+
+	aprint_normal("\n");
+	aprint_naive("\n");
+
+	sc->sc_imxusbc.sc_init_md_hook = kobo_usb_init;
+	sc->sc_imxusbc.sc_setup_md_hook = NULL;
+
+	imxusbc_attach_common(parent, self, aa->aa_iot);
+}
+
+static void
+kobo_usb_init(struct imxehci_softc *sc)
+{
+	switch (sc->sc_unit) {
+	case 0:	/* OTG controller */
+		init_otg(sc);
+		break;
+	case 1:	/* EHCI Host 1 */
+		init_h1(sc);
+		break;
+	default:
+		aprint_error_dev(sc->sc_hsc.sc_dev, "unit %d not supprted\n",
+		    sc->sc_unit);
+	}
+}
+
+static void
+init_otg(struct imxehci_softc *sc)
+{
+	struct imxusbc_softc *usbc = sc->sc_usbc;
+	uint32_t reg;
+
+	reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USB_CLKONOFF_CTRL);
+	reg &= ~USB_CLKONOFF_CTRL_OTG_AHBCLK_OFF;
+	bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USB_CLKONOFF_CTRL, reg);
+
+	sc->sc_iftype = IMXUSBC_IF_UTMI_WIDE;
+
+	imxehci_reset(sc);
+
+	reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL0);
+	reg |= PHYCTRL0_OTG_OVER_CUR_DIS | PHYCTRL0_SUSPENDM;
+	bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL0, reg);
+
+	reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USBCTRL);
+	reg &= ~USBCTRL_OWIR;
+	bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USBCTRL, reg);
+
+	reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL1);
+	reg = (reg & ~PHYCTRL1_PLLDIVVALUE_MASK) | PHYCTRL1_PLLDIVVALUE_24MHZ;
+	bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL1, reg);
+}
+
+static void
+init_h1(struct imxehci_softc *sc)
+{
+	struct imxusbc_softc *usbc = sc->sc_usbc;
+	uint32_t reg;
+
+	reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USB_CLKONOFF_CTRL);
+	reg &= ~USB_CLKONOFF_CTRL_H1_AHBCLK_OFF;
+	bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USB_CLKONOFF_CTRL, reg);
+
+	imxehci_reset(sc);
+
+	/* select INTERNAL PHY interface for Host 1 */
+	sc->sc_iftype = IMXUSBC_IF_UTMI;
+
+	reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh,
+	    USBOH3_USBCTRL);
+	reg |= USBCTRL_H1PM;
+	reg &= ~(USBCTRL_H1WIE);
+	reg &= ~(USBCTRL_H1UIE);
+	bus_space_write_4(usbc->sc_iot, usbc->sc_ioh,
+	    USBOH3_USBCTRL, reg);
+
+	reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL0);
+	reg &= ~PHYCTRL0_H1_OVER_CUR_DIS;
+	reg |= PHYCTRL0_H1_OVER_CUR_POL;
+	bus_space_write_4(usbc->sc_iot, usbc->sc_ioh,USBOH3_PHYCTRL0 , reg);
+
+	delay(1000);
+
+	reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_UH1_PHY_CTRL_1);
+	reg &= ~PHYCTRL1_PLLDIVVALUE_MASK;
+	reg |= PHYCTRL1_PLLDIVVALUE_24MHZ;
+	bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_UH1_PHY_CTRL_1, reg);
+
+	reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_UH1_PHY_CTRL_0);
+	reg &= ~PHYCTRL0_CHGRDETON;
+	reg &= ~PHYCTRL0_CHGRDETEN;
+	bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_UH1_PHY_CTRL_0, reg);
+}
+
+