2a8a21a021
- always enable options MIPS3_ENABLE_CLOCK_INTR and just clear the compare register in cpu_intr() to make CLKF_BASE() works properly - prepare only possible number of cpu_inttab - use macro for interrupt priority number passed to arc_set_intr() to avoid confusion - merge arc_hardware_intr() into cpu_intr() - check independent timer interrupt first in cpu_intr() - tweak MIPS_SR_INT_IE before calling hardclock timer handlers so that spllowersoftclock(9) will be invoked properly in hardclock(9) - reenable interrupt for timer in cpu_intr() rather than each timer handlers okay'ed by soda. Note the real fix is to make CLKF_BASE() check all independent interrupt sources including jazz and isa devices. |
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| .. | ||
| arcsisabr.c | ||
| btl.c | ||
| btlreg.h | ||
| btlvar.h | ||
| desktech.h | ||
| tyneisabr.c | ||