50c16ab16f
From the PR: The cache is flushed using the bus address where the phys address is required. Errors would be seen only on ports where address translation is done between the bus and physical memory. |
||
---|---|---|
.. | ||
conf | ||
fpu | ||
ibm4xx | ||
include | ||
isa | ||
marvell | ||
oea | ||
powerpc | ||
tools/chrpicon | ||
Makefile |