382 lines
10 KiB
C
382 lines
10 KiB
C
/* $NetBSD: if_wi_pci.c,v 1.45 2008/04/28 20:23:55 martin Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Hideaki Imaizumi <hiddy@sfc.wide.ad.jp>
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* and Ichiro FUKUHARA (ichiro@ichiro.org).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI bus front-end for the Intersil PCI WaveLan.
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* Works with Prism2.5 Mini-PCI wavelan.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_wi_pci.c,v 1.45 2008/04/28 20:23:55 martin Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/syslog.h>
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#include <sys/socket.h>
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#include <sys/device.h>
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#include <sys/callout.h>
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#include <net/if.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#include <net80211/ieee80211_netbsd.h>
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#include <net80211/ieee80211_var.h>
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#include <net80211/ieee80211_radiotap.h>
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#include <net80211/ieee80211_rssadapt.h>
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#include <sys/bus.h>
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#include <sys/intr.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/ic/wi_ieee.h>
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#include <dev/ic/wireg.h>
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#include <dev/ic/wivar.h>
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#define WI_PCI_CBMA 0x10 /* Configuration Base Memory Address */
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#define WI_PCI_PLX_LOMEM 0x10 /* PLX chip membase */
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#define WI_PCI_PLX_LOIO 0x14 /* PLX chip iobase */
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#define WI_PCI_LOMEM 0x18 /* ISA membase */
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#define WI_PCI_LOIO 0x1C /* ISA iobase */
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#define CHIP_PLX_OTHER 0x01
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#define CHIP_PLX_9052 0x02
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#define CHIP_TMD_7160 0x03
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#define WI_PLX_COR_OFFSET 0x3E0
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#define WI_PLX_COR_VALUE 0x41
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struct wi_pci_softc {
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struct wi_softc psc_wi; /* real "wi" softc */
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/* PCI-specific goo */
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pci_intr_handle_t psc_ih;
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pci_chipset_tag_t psc_pc;
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pcitag_t psc_pcitag;
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};
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static int wi_pci_match(struct device *, struct cfdata *, void *);
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static void wi_pci_attach(struct device *, struct device *, void *);
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static int wi_pci_enable(struct wi_softc *);
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static void wi_pci_disable(struct wi_softc *);
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static void wi_pci_reset(struct wi_softc *);
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static const struct wi_pci_product
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*wi_pci_lookup(struct pci_attach_args *);
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CFATTACH_DECL(wi_pci, sizeof(struct wi_pci_softc),
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wi_pci_match, wi_pci_attach, NULL, NULL);
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static const struct wi_pci_product {
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pci_vendor_id_t wpp_vendor; /* vendor ID */
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pci_product_id_t wpp_product; /* product ID */
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int wpp_chip; /* uses other chip */
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} wi_pci_products[] = {
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{ PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P,
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CHIP_PLX_OTHER },
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{ PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02,
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CHIP_PLX_OTHER },
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{ PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P,
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CHIP_PLX_OTHER },
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{ PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRWE777A,
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CHIP_PLX_OTHER },
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{ PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_MA301,
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CHIP_PLX_OTHER },
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{ PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN,
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0 },
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{ PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130,
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CHIP_PLX_9052 },
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{ PCI_VENDOR_USR2, PCI_PRODUCT_USR2_2415,
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CHIP_PLX_OTHER },
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{ PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130A2,
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CHIP_TMD_7160 },
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{ 0, 0,
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0},
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};
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static int
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wi_pci_enable(struct wi_softc *sc)
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{
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struct wi_pci_softc *psc = (struct wi_pci_softc *)sc;
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/* establish the interrupt. */
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sc->sc_ih = pci_intr_establish(psc->psc_pc,
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psc->psc_ih, IPL_NET, wi_intr, sc);
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if (sc->sc_ih == NULL) {
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aprint_error_dev(&sc->sc_dev, "couldn't establish interrupt\n");
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return (EIO);
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}
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/* reset HFA3842 MAC core */
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if (sc->sc_reset != NULL)
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wi_pci_reset(sc);
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return (0);
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}
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static void
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wi_pci_disable(struct wi_softc *sc)
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{
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struct wi_pci_softc *psc = (struct wi_pci_softc *)sc;
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pci_intr_disestablish(psc->psc_pc, sc->sc_ih);
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}
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static void
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wi_pci_reset(struct wi_softc *sc)
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{
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int i, secs, usecs;
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bus_space_write_2(sc->sc_iot, sc->sc_ioh,
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WI_PCI_COR, WI_COR_SOFT_RESET);
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DELAY(250*1000); /* 1/4 second */
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bus_space_write_2(sc->sc_iot, sc->sc_ioh,
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WI_PCI_COR, WI_COR_CLEAR);
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DELAY(500*1000); /* 1/2 second */
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/* wait 2 seconds for firmware to complete initialization. */
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for (i = 200000; i--; DELAY(10))
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if (!(CSR_READ_2(sc, WI_COMMAND) & WI_CMD_BUSY))
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break;
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if (i < 0) {
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printf("%s: PCI reset timed out\n", device_xname(&sc->sc_dev));
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} else if (sc->sc_if.if_flags & IFF_DEBUG) {
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usecs = (200000 - i) * 10;
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secs = usecs / 1000000;
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usecs %= 1000000;
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printf("%s: PCI reset in %d.%06d seconds\n",
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device_xname(&sc->sc_dev), secs, usecs);
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}
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return;
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}
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static const struct wi_pci_product *
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wi_pci_lookup(struct pci_attach_args *pa)
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{
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const struct wi_pci_product *wpp;
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for (wpp = wi_pci_products; wpp->wpp_vendor != 0; wpp++) {
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if (PCI_VENDOR(pa->pa_id) == wpp->wpp_vendor &&
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PCI_PRODUCT(pa->pa_id) == wpp->wpp_product)
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return (wpp);
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}
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return (NULL);
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}
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static int
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wi_pci_match(struct device *parent, struct cfdata *match,
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void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (wi_pci_lookup(pa) != NULL)
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return (1);
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return (0);
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}
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static void
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wi_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct wi_pci_softc *psc = (struct wi_pci_softc *)self;
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struct wi_softc *sc = &psc->psc_wi;
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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const char *intrstr;
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const struct wi_pci_product *wpp;
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pci_intr_handle_t ih;
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bus_space_tag_t memt, iot, plxt, tmdt;
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bus_space_handle_t memh, ioh, plxh, tmdh;
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psc->psc_pc = pc;
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psc->psc_pcitag = pa->pa_tag;
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wpp = wi_pci_lookup(pa);
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#ifdef DIAGNOSTIC
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if (wpp == NULL) {
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printf("\n");
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panic("wi_pci_attach: impossible");
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}
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#endif
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switch (wpp->wpp_chip) {
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case CHIP_PLX_OTHER:
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case CHIP_PLX_9052:
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/* Map memory and I/O registers. */
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if (pci_mapreg_map(pa, WI_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
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&memt, &memh, NULL, NULL) != 0) {
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printf(": can't map mem space\n");
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return;
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}
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if (pci_mapreg_map(pa, WI_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
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&iot, &ioh, NULL, NULL) != 0) {
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printf(": can't map I/O space\n");
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return;
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}
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if (wpp->wpp_chip == CHIP_PLX_OTHER) {
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/* The PLX 9052 doesn't have IO at 0x14. Perhaps
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other chips have, so we'll make this conditional. */
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if (pci_mapreg_map(pa, WI_PCI_PLX_LOIO,
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PCI_MAPREG_TYPE_IO, 0, &plxt,
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&plxh, NULL, NULL) != 0) {
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printf(": can't map PLX\n");
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return;
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}
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}
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break;
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case CHIP_TMD_7160:
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/* Used instead of PLX on at least one revision of
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* the National Datacomm Corporation NCP130. Values
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* for registers acquired from OpenBSD, which in
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* turn got them from a Linux driver.
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*/
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/* Map COR and I/O registers. */
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if (pci_mapreg_map(pa, WI_TMD_COR, PCI_MAPREG_TYPE_IO, 0,
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&tmdt, &tmdh, NULL, NULL) != 0) {
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printf(": can't map TMD\n");
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return;
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}
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if (pci_mapreg_map(pa, WI_TMD_IO, PCI_MAPREG_TYPE_IO, 0,
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&iot, &ioh, NULL, NULL) != 0) {
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printf(": can't map I/O space\n");
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return;
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}
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break;
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default:
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if (pci_mapreg_map(pa, WI_PCI_CBMA,
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PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
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0, &iot, &ioh, NULL, NULL) != 0) {
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printf(": can't map mem space\n");
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return;
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}
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memt = iot;
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memh = ioh;
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sc->sc_pci = 1;
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break;
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}
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{
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char devinfo[256];
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
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printf(": %s (rev. 0x%02x)\n", devinfo,
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PCI_REVISION(pa->pa_class));
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}
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sc->sc_enabled = 1;
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sc->sc_enable = wi_pci_enable;
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sc->sc_disable = wi_pci_disable;
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sc->sc_iot = iot;
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sc->sc_ioh = ioh;
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/* Make sure interrupts are disabled. */
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CSR_WRITE_2(sc, WI_INT_EN, 0);
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CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF);
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if (wpp->wpp_chip == CHIP_PLX_OTHER) {
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uint32_t command;
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#define WI_LOCAL_INTCSR 0x4c
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#define WI_LOCAL_INTEN 0x40 /* poke this into INTCSR */
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command = bus_space_read_4(plxt, plxh, WI_LOCAL_INTCSR);
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command |= WI_LOCAL_INTEN;
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bus_space_write_4(plxt, plxh, WI_LOCAL_INTCSR, command);
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}
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/* Map and establish the interrupt. */
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if (pci_intr_map(pa, &ih)) {
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aprint_error_dev(self, "couldn't map interrupt\n");
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return;
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}
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intrstr = pci_intr_string(pc, ih);
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psc->psc_ih = ih;
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sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc);
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if (sc->sc_ih == NULL) {
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aprint_error_dev(self, "couldn't establish interrupt");
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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return;
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}
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printf("%s: interrupting at %s\n", device_xname(self), intrstr);
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switch (wpp->wpp_chip) {
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case CHIP_PLX_OTHER:
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case CHIP_PLX_9052:
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/*
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* Setup the PLX chip for level interrupts and config index 1
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* XXX - should really reset the PLX chip too.
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*/
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bus_space_write_1(memt, memh,
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WI_PLX_COR_OFFSET, WI_PLX_COR_VALUE);
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break;
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case CHIP_TMD_7160:
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/* Enable I/O mode and level interrupts on the embedded
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* card. The card's COR is the first byte of BAR 0.
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*/
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bus_space_write_1(tmdt, tmdh, 0, WI_COR_IOMODE);
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break;
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default:
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/* reset HFA3842 MAC core */
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wi_pci_reset(sc);
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break;
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}
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printf("%s:", device_xname(self));
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if (wi_attach(sc, 0) != 0) {
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aprint_error_dev(self, "failed to attach controller\n");
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pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
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return;
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}
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if (!wpp->wpp_chip)
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sc->sc_reset = wi_pci_reset;
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if (!pmf_device_register(self, NULL, NULL))
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aprint_error_dev(self, "couldn't establish power handler\n");
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else
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pmf_class_network_register(self, &sc->sc_if);
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}
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