NetBSD/sys/arch/sgimips/dev
rafal c21021e6fb Improve the interrupt code somewhat by having callers of xxx_intr_establish
pass in an interrupt handle (which is currently to the CRIME interrupt the
device is attached to) so the interrupt handlers know which device was the
one looking for attention.

While here, fix up PCI interrupt routing for both the on-board devices and
the PCI slots -- even though there is only one PCI slot in the chasis, the
hardware can accomodate up to three and provides an interrupt mapping for
all the PCI interrupt pins for both the internal SCSI & PCI slot and the
two "extra" slots.
2003-01-06 06:19:40 +00:00
..
com_mace.c Improve the interrupt code somewhat by having callers of xxx_intr_establish 2003-01-06 06:19:40 +00:00
crime.c Improve the interrupt code somewhat by having callers of xxx_intr_establish 2003-01-06 06:19:40 +00:00
crimereg.h add timer calibration 2002-12-28 16:40:48 +00:00
if_mec.c sync with mecreg change, ie. make this compile 2002-12-26 22:25:12 +00:00
if_mecreg.h brush up situation with mec register definitions 2002-12-26 22:24:46 +00:00
imc.c Use aprint_normal() for cfprint routines. 2003-01-01 02:10:08 +00:00
imcreg.h Replace lots of 8x<space> with <tabs> and other miscellaneous indentation 2002-03-13 13:12:25 +00:00
lpt_mace.c Add trailing ; to CFATTACH_DECL. 2002-10-02 15:52:22 +00:00
macaureg.h Replace lots of 8x<space> with <tabs> and other miscellaneous indentation 2002-03-13 13:12:25 +00:00
mace.c Improve the interrupt code somewhat by having callers of xxx_intr_establish 2003-01-06 06:19:40 +00:00
macereg.h MACE register definitions 2002-12-23 20:05:06 +00:00
macevar.h Checkpoint of O2 work by Chris Sekiya and myself. This is the sgimips bit; 2003-01-03 09:09:21 +00:00
mcclock_mace.c Add trailing ; to CFATTACH_DECL. 2002-10-02 15:52:22 +00:00
pckbc_mace.c Add trailing ; to CFATTACH_DECL. 2002-10-02 15:52:22 +00:00
zs_kgdb.c Merge the gehenna-devsw branch into the trunk. 2002-09-06 13:18:43 +00:00
zs.c Use aprint_normal() for cfprint routines. 2003-01-01 02:10:08 +00:00