142 lines
5.1 KiB
C
142 lines
5.1 KiB
C
/* $NetBSD: ti_iicreg.h,v 1.1 2013/04/17 14:33:06 bouyer Exp $ */
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/*
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* Copyright (c) 2013 Manuel Bouyer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* register definitions for the i2c controller found in the
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* Texas Instrument AM335x SOC
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*/
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#ifndef _OMAP2IICREG_H
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#define _OMAP2IICREG_H
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#define OMAP2_I2C_REVNB_LO 0x00
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#define I2C_REVNB_LO_RTL(x) (((x) >> 11) & 0x01f)
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#define I2C_REVNB_LO_MAJOR(x) (((x) >> 8) & 0x007)
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#define I2C_REVNB_LO_CUSTOM(x) (((x) >> 6) & 0x003)
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#define I2C_REVNB_LO_MINOR(x) (((x) >> 0) & 0x01f)
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#define OMAP2_I2C_REVNB_HI 0x04
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#define I2C_REVNB_HI_SCHEME(x) (((x) >> 14) & 0x003)
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#define I2C_REVNB_HI_FUNC(x) (((x) >> 0) & 0xfff)
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#define OMAP2_I2C_SYSC 0x10
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#define I2C_SYSC_CLKACTIVITY_OCP 0x0010
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#define I2C_SYSC_CLKACTIVITY_SYSTEM 0x0020
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#define I2C_SYSC_IDLE_MASK 0x0018
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#define I2C_SYSC_IDLE_FORCE 0x0000
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#define I2C_SYSC_IDLE_SMART 0x0010
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#define I2C_SYSC_IDLE_NONE 0x0008
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#define I2C_SYSC_ENAWAKEUP 0x0004
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#define I2C_SYSC_SRST 0x0002
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#define I2C_SYSC_AUTOIDLE 0x0001
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#define OMAP2_I2C_IRQSTATUS_RAW 0x24
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#define OMAP2_I2C_IRQSTATUS 0x28
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#define OMAP2_I2C_IRQENABLE_SET 0x2C
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#define OMAP2_I2C_IRQENABLE_CLR 0x30
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#define OMAP2_I2C_WE 0x34
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#define I2C_IRQSTATUS_XDR 0x4000
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#define I2C_IRQSTATUS_RDR 0x2000
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#define I2C_IRQSTATUS_BB 0x1000
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#define I2C_IRQSTATUS_ROVR 0x0800
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#define I2C_IRQSTATUS_XUDF 0x0400
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#define I2C_IRQSTATUS_AAS 0x0200
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#define I2C_IRQSTATUS_BF 0x0100
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#define I2C_IRQSTATUS_AERR 0x0080
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#define I2C_IRQSTATUS_STC 0x0040
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#define I2C_IRQSTATUS_GC 0x0020
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#define I2C_IRQSTATUS_XRDY 0x0010
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#define I2C_IRQSTATUS_RRDY 0x0008
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#define I2C_IRQSTATUS_ARDY 0x0004
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#define I2C_IRQSTATUS_NACK 0x0002
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#define I2C_IRQSTATUS_AL 0x0001
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#define OMAP2_I2C_DMARXENABLE_SET 0x38
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#define OMAP2_I2C_DMATXENABLE_SET 0x3C
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#define OMAP2_I2C_DMARXENABLE_CLR 0x40
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#define I2C_DMARXENABLE 0x0001
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#define OMAP2_I2C_DMATXENABLE_CLR 0x44
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#define I2C_DMATXENABLE 0x0001
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#define OMAP2_I2C_DMARXWAKE_EN 0x48
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/* use same bits as IRQ */
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#define OMAP2_I2C_DMATXWAKE_EN 0x4C
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/* use same bits as IRQ */
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#define OMAP2_I2C_SYSS 0x90
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#define I2C_SYSS_RDONE 0x0001
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#define OMAP2_I2C_BUF 0x94
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#define I2C_BUF_RDMA_EN 0x8000
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#define I2C_BUF_RXFIFO_CLR 0x4000
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#define I2C_BUF_RXTRSH_MASK 0x3f00
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#define I2C_BUF_RXTRSH(x) ((x) << 8)
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#define I2C_BUF_XDMA_EN 0x0080
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#define I2C_BUF_TXFIFO_CLR 0x0040
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#define I2C_BUF_TXTRSH_MASK 0x003f
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#define I2C_BUF_TXTRSH(x) ((x) << 0)
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#define OMAP2_I2C_CNT 0x98
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#define I2C_CNT_MASK 0xffff
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#define OMAP2_I2C_DATA 0x9C
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#define I2C_DATA_MASK 0x00ff
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#define OMAP2_I2C_CON 0xA4
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#define I2C_CON_EN 0x8000
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#define I2C_CON_STB 0x0800
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#define I2C_CON_MST 0x0400
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#define I2C_CON_TRX 0x0200
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#define I2C_CON_XSA 0x0100
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#define I2C_CON_XOA0 0x0080
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#define I2C_CON_XOA1 0x0040
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#define I2C_CON_XOA2 0x0020
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#define I2C_CON_XOA3 0x0010
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#define I2C_CON_STP 0x0002
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#define I2C_CON_STT 0x0001
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#define OMAP2_I2C_OA 0xA8
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#define I2C_OA_MASK 0x03ff
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#define OMAP2_I2C_SA 0xAC
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#define I2C_SA_MASK 0x03ff
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#define OMAP2_I2C_PSC 0xB0
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#define I2C_PSC_MASK 0x000f
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#define OMAP2_I2C_SCLL 0xB4
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#define I2C_SCLL_MASK 0x000f
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#define OMAP2_I2C_SCLH 0xB8
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#define I2C_SCLH_MASK 0x000f
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#define OMAP2_I2C_SYSTEST 0xBC
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#define OMAP2_I2C_BUFSTAT 0xC0
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#define I2C_BUFSTAT_FIFODEPTH(x) (((x) >> 14) & 0x03)
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#define I2C_BUFSTAT_RXSTAT(x) (((x) >> 8) & 0x3f)
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#define I2C_BUFSTAT_TXSTAT(x) (((x) >> 0) & 0x3f)
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#define OMAP2_I2C_OA1 0xC4
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#define OMAP2_I2C_OA2 0xC8
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#define OMAP2_I2C_OA3 0xCC
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/* same bits as I2C_OA */
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#define OMAP2_I2C_ACTOA 0xD0
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#define OMAP2_I2C_SBLOCK 0xD4
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#define I2C_ACTOA_OA3_ACT 0x0008
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#define I2C_ACTOA_OA2_ACT 0x0004
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#define I2C_ACTOA_OA1_ACT 0x0002
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#define I2C_ACTOA_OA0_ACT 0x0001
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#if defined(TI_AM335X)
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#define OMAP2_I2C0_BASE 0x44E0B000
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#define OMAP2_I2C1_BASE 0x4802A000
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#define OMAP2_I2C2_BASE 0x4819C000
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#endif /* TI_AM335X */
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#endif /* _OMAP2IICREG_H */
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