481 lines
12 KiB
Plaintext
481 lines
12 KiB
Plaintext
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
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* M68000 Hi-Performance Microprocessor Division
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* M68040 Software Package
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*
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* M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
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* All rights reserved.
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*
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* THE SOFTWARE is provided on an "AS IS" basis and without warranty.
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* To the maximum extent permitted by applicable law,
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* MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
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* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
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* PARTICULAR PURPOSE and any warranty against infringement with
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* regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
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* and any accompanying written materials.
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*
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* To the maximum extent permitted by applicable law,
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* IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
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* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
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* PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
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* OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
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* SOFTWARE. Motorola assumes no responsibility for the maintenance
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* and support of the SOFTWARE.
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*
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* You are hereby granted a copyright license to use, modify, and
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* distribute the SOFTWARE so long as this entire notice is retained
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* without alteration in any modified and/or redistributed versions,
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* and that such modified versions are clearly identified as such.
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* No licenses are granted by implication, estoppel or otherwise
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* under any patents or trademarks of Motorola, Inc.
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*
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* skeleton.sa 3.2 4/26/91
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*
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* This file contains code that is system dependent and will
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* need to be modified to install the FPSP.
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*
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* Each entry point for exception 'xxxx' begins with a 'jmp fpsp_xxxx'.
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* Put any target system specific handling that must be done immediately
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* before the jump instruction. If there no handling necessary, then
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* the 'fpsp_xxxx' handler entry point should be placed in the exception
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* table so that the 'jmp' can be eliminated. If the FPSP determines that the
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* exception is one that must be reported then there will be a
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* return from the package by a 'jmp real_xxxx'. At that point
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* the machine state will be identical to the state before
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* the FPSP was entered. In particular, whatever condition
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* that caused the exception will still be pending when the FPSP
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* package returns. Thus, there will be system specific code
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* to handle the exception.
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*
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* If the exception was completely handled by the package, then
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* the return will be via a 'jmp fpsp_done'. Unless there is
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* OS specific work to be done (such as handling a context switch or
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* interrupt) the user program can be resumed via 'rte'.
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*
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* In the following skeleton code, some typical 'real_xxxx' handling
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* code is shown. This code may need to be moved to an appropriate
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* place in the target system, or rewritten.
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*
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SKELETON IDNT 2,1 Motorola 040 Floating Point Software Package
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section 15
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*
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* The following counters are used for standalone testing
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*
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sigunimp dc.l 0
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sigbsun dc.l 0
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siginex dc.l 0
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sigdz dc.l 0
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sigunfl dc.l 0
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sigovfl dc.l 0
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sigoperr dc.l 0
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sigsnan dc.l 0
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sigunsupp dc.l 0
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section 8
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include fpsp.h
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xref b1238_fix
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*
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* Divide by Zero exception
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*
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* All dz exceptions are 'real', hence no fpsp_dz entry point.
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*
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xdef dz
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xdef real_dz
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dz:
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real_dz:
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link a6,#-LOCAL_SIZE
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fsave -(sp)
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bclr.b #E1,E_BYTE(a6)
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frestore (sp)+
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unlk a6
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add.l #1,sigdz ;for standalone testing
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rte
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*
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* Inexact exception
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*
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* All inexact exceptions are real, but the 'real' handler
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* will probably want to clear the pending exception.
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* The provided code will clear the E3 exception (if pending),
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* otherwise clear the E1 exception. The frestore is not really
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* necessary for E1 exceptions.
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*
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* Code following the 'inex' label is to handle bug #1232. In this
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* bug, if an E1 snan, ovfl, or unfl occured, and the process was
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* swapped out before taking the exception, the exception taken on
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* return was inex, rather than the correct exception. The snan, ovfl,
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* and unfl exception to be taken must not have been enabled. The
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* fix is to check for E1, and the existence of one of snan, ovfl,
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* or unfl bits set in the fpsr. If any of these are set, branch
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* to the appropriate handler for the exception in the fpsr. Note
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* that this fix is only for d43b parts, and is skipped if the
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* version number is not $40.
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*
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*
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xdef real_inex
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xdef inex
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inex:
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link a6,#-LOCAL_SIZE
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fsave -(sp)
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cmpi.b #VER_40,(sp) ;test version number
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bne.b not_fmt40
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fmove.l fpsr,-(sp)
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btst.b #E1,E_BYTE(a6) ;test for E1 set
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beq.b not_b1232
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btst.b #snan_bit,2(sp) ;test for snan
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beq inex_ckofl
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add.l #4,sp
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frestore (sp)+
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unlk a6
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bra snan
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inex_ckofl:
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btst.b #ovfl_bit,2(sp) ;test for ovfl
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beq inex_ckufl
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add.l #4,sp
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frestore (sp)+
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unlk a6
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bra ovfl
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inex_ckufl:
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btst.b #unfl_bit,2(sp) ;test for unfl
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beq not_b1232
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add.l #4,sp
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frestore (sp)+
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unlk a6
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bra unfl
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*
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* We do not have the bug 1232 case. Clean up the stack and call
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* real_inex.
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*
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not_b1232:
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add.l #4,sp
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frestore (sp)+
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unlk a6
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real_inex:
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add.l #1,siginex ;for standalone testing
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link a6,#-LOCAL_SIZE
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fsave -(sp)
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not_fmt40:
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bclr.b #E3,E_BYTE(a6) ;clear and test E3 flag
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beq.b inex_cke1
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*
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* Clear dirty bit on dest resister in the frame before branching
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* to b1238_fix.
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*
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movem.l d0/d1,USER_DA(a6)
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bfextu CMDREG1B(a6){6:3},d0 ;get dest reg no
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bclr.b d0,FPR_DIRTY_BITS(a6) ;clr dest dirty bit
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bsr.l b1238_fix ;test for bug1238 case
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movem.l USER_DA(a6),d0/d1
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bra.b inex_done
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inex_cke1:
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bclr.b #E1,E_BYTE(a6)
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inex_done:
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frestore (sp)+
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unlk a6
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rte
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*
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* Overflow exception
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*
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xref fpsp_ovfl
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xdef real_ovfl
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xdef ovfl
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ovfl:
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jmp fpsp_ovfl
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real_ovfl:
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add.l #1,sigovfl ;for standalone testing
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link a6,#-LOCAL_SIZE
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fsave -(sp)
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bclr.b #E3,E_BYTE(a6) ;clear and test E3 flag
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bne.b ovfl_done
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bclr.b #E1,E_BYTE(a6)
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ovfl_done:
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frestore (sp)+
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unlk a6
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rte
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*
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* Underflow exception
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*
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xref fpsp_unfl
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xdef real_unfl
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xdef unfl
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unfl:
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jmp fpsp_unfl
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real_unfl:
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add.l #1,sigunfl ;for standalone testing
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link a6,#-LOCAL_SIZE
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fsave -(sp)
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bclr.b #E3,E_BYTE(a6) ;clear and test E3 flag
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bne.b unfl_done
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bclr.b #E1,E_BYTE(a6)
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unfl_done:
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frestore (sp)+
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unlk a6
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rte
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*
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* Signalling NAN exception
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*
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xref fpsp_snan
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xdef real_snan
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xdef snan
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snan:
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jmp fpsp_snan
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real_snan:
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link a6,#-LOCAL_SIZE
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fsave -(sp)
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bclr.b #E1,E_BYTE(a6) ;snan is always an E1 exception
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frestore (sp)+
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unlk a6
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add.l #1,sigsnan ;for standalone testing
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rte
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*
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* Operand Error exception
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*
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xref fpsp_operr
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xdef real_operr
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xdef operr
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operr:
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jmp fpsp_operr
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real_operr:
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link a6,#-LOCAL_SIZE
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fsave -(sp)
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bclr.b #E1,E_BYTE(a6) ;operr is always an E1 exception
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frestore (sp)+
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unlk a6
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add.l #1,sigoperr ;for standalone testing
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rte
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*
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* BSUN exception
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*
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* This sample handler simply clears the nan bit in the FPSR.
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*
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xref fpsp_bsun
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xdef real_bsun
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xdef bsun
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bsun:
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jmp fpsp_bsun
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real_bsun:
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link a6,#-LOCAL_SIZE
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fsave -(sp)
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bclr.b #E1,E_BYTE(a6) ;bsun is always an E1 exception
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fmove.l FPSR,-(sp)
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bclr.b #nan_bit,(sp)
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fmove.l (sp)+,FPSR
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frestore (sp)+
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unlk a6
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add.l #1,sigbsun ;for standalone testing
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rte
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*
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* F-line exception
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*
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* A 'real' F-line exception is one that the FPSP isn't supposed to
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* handle. E.g. an instruction with a co-processor ID that is not 1.
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*
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*
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xref fpsp_fline
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xdef real_fline
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xdef fline
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fline:
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jmp fpsp_fline
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real_fline:
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add.l #1,sigunimp ;for standalone testing
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rte
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*
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* Unsupported data type exception
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*
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xref fpsp_unsupp
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xdef real_unsupp
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xdef unsupp
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unsupp:
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jmp fpsp_unsupp
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real_unsupp:
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link a6,#-LOCAL_SIZE
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fsave -(sp)
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bclr.b #E1,E_BYTE(a6) ;unsupp is always an E1 exception
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frestore (sp)+
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unlk a6
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add.l #1,sigunsupp ;for standalone testing
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rte
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*
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* Trace exception
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*
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xdef real_trace
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real_trace:
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rte
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*
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* fpsp_fmt_error --- exit point for frame format error
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*
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* The fpu stack frame does not match the frames existing
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* or planned at the time of this writing. The fpsp is
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* unable to handle frame sizes not in the following
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* version:size pairs:
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*
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* {4060, 4160} - busy frame
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* {4028, 4130} - unimp frame
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* {4000, 4100} - idle frame
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*
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* This entry point simply holds an f-line illegal value.
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* Replace this with a call to your kernel panic code or
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* code to handle future revisions of the fpu.
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*
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xdef fpsp_fmt_error
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fpsp_fmt_error:
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dc.l $f27f0000 ;f-line illegal
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*
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* fpsp_done --- FPSP exit point
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*
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* The exception has been handled by the package and we are ready
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* to return to user mode, but there may be OS specific code
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* to execute before we do. If there is, do it now.
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*
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*
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xdef fpsp_done
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fpsp_done:
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rte
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*
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* mem_write --- write to user or supervisor address space
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*
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* Writes to memory while in supervisor mode. copyout accomplishes
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* this via a 'moves' instruction. copyout is a UNIX SVR3 (and later) function.
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* If you don't have copyout, use the local copy of the function below.
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*
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* a0 - supervisor source address
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* a1 - user destination address
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* d0 - number of bytes to write (maximum count is 12)
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*
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* The supervisor source address is guaranteed to point into the supervisor
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* stack. The result is that a UNIX
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* process is allowed to sleep as a consequence of a page fault during
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* copyout. The probability of a page fault is exceedingly small because
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* the 68040 always reads the destination address and thus the page
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* faults should have already been handled.
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*
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* If the EXC_SR shows that the exception was from supervisor space,
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* then just do a dumb (and slow) memory move. In a UNIX environment
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* there shouldn't be any supervisor mode floating point exceptions.
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*
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xdef mem_write
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mem_write:
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btst.b #5,EXC_SR(a6) ;check for supervisor state
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beq.b user_write
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super_write:
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move.b (a0)+,(a1)+
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subq.l #1,d0
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bne.b super_write
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rts
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user_write:
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move.l d1,-(sp) ;preserve d1 just in case
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move.l d0,-(sp)
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move.l a1,-(sp)
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move.l a0,-(sp)
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jsr copyout
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add.l #12,sp
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move.l (sp)+,d1
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rts
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*
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* mem_read --- read from user or supervisor address space
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*
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* Reads from memory while in supervisor mode. copyin accomplishes
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* this via a 'moves' instruction. copyin is a UNIX SVR3 (and later) function.
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* If you don't have copyin, use the local copy of the function below.
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*
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* The FPSP calls mem_read to read the original F-line instruction in order
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* to extract the data register number when the 'Dn' addressing mode is
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* used.
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*
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*Input:
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* a0 - user source address
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* a1 - supervisor destination address
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* d0 - number of bytes to read (maximum count is 12)
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*
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* Like mem_write, mem_read always reads with a supervisor
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* destination address on the supervisor stack. Also like mem_write,
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* the EXC_SR is checked and a simple memory copy is done if reading
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* from supervisor space is indicated.
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*
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xdef mem_read
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mem_read:
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btst.b #5,EXC_SR(a6) ;check for supervisor state
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beq.b user_read
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super_read:
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move.b (a0)+,(a1)+
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subq.l #1,d0
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bne.b super_read
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rts
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user_read:
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move.l d1,-(sp) ;preserve d1 just in case
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move.l d0,-(sp)
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move.l a1,-(sp)
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move.l a0,-(sp)
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jsr copyin
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add.l #12,sp
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move.l (sp)+,d1
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rts
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*
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* Use these routines if your kernel doesn't have copyout/copyin equivalents.
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* Assumes that D0/D1/A0/A1 are scratch registers. copyout overwrites DFC,
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* and copyin overwrites SFC.
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*
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copyout:
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move.l 4(sp),a0 ; source
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move.l 8(sp),a1 ; destination
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move.l 12(sp),d0 ; count
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sub.l #1,d0 ; dec count by 1 for dbra
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move.l #1,d1
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movec d1,DFC ; set dfc for user data space
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moreout:
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move.b (a0)+,d1 ; fetch supervisor byte
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moves.b d1,(a1)+ ; write user byte
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dbf.w d0,moreout
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rts
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copyin:
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move.l 4(sp),a0 ; source
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move.l 8(sp),a1 ; destination
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move.l 12(sp),d0 ; count
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sub.l #1,d0 ; dec count by 1 for dbra
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move.l #1,d1
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movec d1,SFC ; set sfc for user space
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morein:
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moves.b (a0)+,d1 ; fetch user byte
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move.b d1,(a1)+ ; write supervisor byte
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dbf.w d0,morein
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rts
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end
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