Port to NetBSD, with some bug fixes and minor performance tweaks.

This commit is contained in:
mycroft 1994-07-05 17:56:52 +00:00
parent 716b96f660
commit eddb30ab43
34 changed files with 1428 additions and 335 deletions

188
sys/arch/m68k/060sp/asm2gas Normal file
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@ -0,0 +1,188 @@
#!/bin/sh
#
# Copyright (c) 1994 Charles Hannum. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. All advertising materials mentioning features or use of this software
# must display the following acknowledgement:
# This product includes software developed by Charles Hannum.
# 4. The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# $Id: asm2gas,v 1.1 1994/07/05 17:57:04 mycroft Exp $
#
# This ugly script converts assembler code from Motorola's format to a
# form that gas (MIT syntax) can digest.
cat $1 | sed -e '
/[ ]IDNT[ ]/{s/^/|/;p;d;}
/^\*/{p;d;}
s/;/|/
/[ ]equ[ ]/{
s/\([A-Za-z_][A-Za-z0-9_]*\)[ ]*equ[ ]*/\1,/
s/[ ][ ]*\(.*\)$/ |\1/
s/ ||/ |/
s/^/ .set /
p;d
}
s/^\([A-Za-z_][A-Za-z0-9_]*\)[ ][ ]*/\1: /
s/^\([A-Za-z_][A-Za-z0-9_]*\)$/\1:/
/^[A-Za-z_][A-Za-z0-9_]*:/{
h
s/:.*$/:/
p
g
s/^.*:[ ]*/ /
/^ $/d
}
/^[ ][ ]*[.a-zA-Z][.a-zA-Z0-9]*/{
h
s/[ ]*[.a-zA-Z][.a-zA-Z0-9]*[ ]*//
s/[ ][ ]*\(.*\)$/ |\1/
s/ ||/ |/
x
s/^[ ]*\([.a-zA-Z][.a-zA-Z0-9]*\)/\1/
s/[ ][ ]*.*$/ /
y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/
s/^/ /
G
s/\n//
}
' | sed -e '
s/^\*/|/
s/\$/0x/g
s/#:/#0x/g
s/ dc\.l/ .long/
s/ dc\.w/ .short/
s/ dc\.b/ .byte/
' | sed -e '
s/\([^_a-zA-Z0-9]\)A\([0-7]\)\([^_a-zA-Z0-9:.]\)/\1a\2\3/g
s/\([^_a-zA-Z0-9]\)A\([0-7]\)\([^_a-zA-Z0-9:.]\)/\1a\2\3/g
s/\([^_a-zA-Z0-9]\)A\([0-7]\)$/\1a\2/g
s/\([^_a-zA-Z0-9]\)D\([0-7]\)\([^_a-zA-Z0-9]\)/\1d\2\3/g
s/\([^_a-zA-Z0-9]\)D\([0-7]\)\([^_a-zA-Z0-9]\)/\1d\2\3/g
s/\([^_a-zA-Z0-9]\)D\([0-7]\)$/\1d\2/g
s/\([^_a-zA-Z0-9]\)FP\([0-7]\)\([^_a-zA-Z0-9]\)/\1fp\2\3/g
s/\([^_a-zA-Z0-9]\)FP\([0-7]\)\([^_a-zA-Z0-9]\)/\1fp\2\3/g
s/\([^_a-zA-Z0-9]\)FP\([0-7]\)$/\1fp\2/g
s/\([^_a-zA-Z0-9]\)FPCR\([^_a-zA-Z0-9]\)/\1fpcr\2/g
s/\([^_a-zA-Z0-9]\)FPCR\([^_a-zA-Z0-9]\)/\1fpcr\2/g
s/\([^_a-zA-Z0-9]\)FPCR$/\1fpcr/g
s/\([^_a-zA-Z0-9]\)FPSR\([^_a-zA-Z0-9]\)/\1fpsr\2/g
s/\([^_a-zA-Z0-9]\)FPSR\([^_a-zA-Z0-9]\)/\1fpsr\2/g
s/\([^_a-zA-Z0-9]\)FPSR$/\1fpsr/g
s/\([^_a-zA-Z0-9]\)FPIAR\([^_a-zA-Z0-9]\)/\1fpi\2/g
s/\([^_a-zA-Z0-9]\)FPIAR\([^_a-zA-Z0-9]\)/\1fpi\2/g
s/\([^_a-zA-Z0-9]\)FPIAR$/\1fpi/g
s/\([^_a-zA-Z0-9]\)fpiar\([^_a-zA-Z0-9]\)/\1fpi\2/g
s/\([^_a-zA-Z0-9]\)fpiar\([^_a-zA-Z0-9]\)/\1fpi\2/g
s/\([^_a-zA-Z0-9]\)fpiar$/\1fpi/g
s/\([^_a-zA-Z0-9]\)a7\([^_a-zA-Z0-9:.]\)/\1sp\2/g
s/\([^_a-zA-Z0-9]\)a7\([^_a-zA-Z0-9:.]\)/\1sp\2/g
s/\([^_a-zA-Z0-9]\)a7$/\1sp/g
' | sed -e '
s/-(\(a.\))/\1@-/g
s/(\(a.\))+/\1@+/g
s/\([-+A-Za-z0-9_]*\)(\(a.\))/\2@(\1)/g
s/\([-+A-Za-z0-9_]*\)(\(a.\),\([ad].[^)]*\))/\2@(\1,\3)/g
s/-(sp)/sp@-/g
s/(sp)+/sp@+/g
s/\([-+A-Za-z0-9_]*\)(sp)/sp@(\1)/g
s/\([-+A-Za-z0-9_]*\)(sp,\([ad].[^)]*\))/sp@(\1,\2)/g
s/-(pc)/pc@-/g
s/(pc)+/pc@+/g
s/\([-+A-Za-z0-9_]*\)(pc)/pc@(\1)/g
s/\([-+A-Za-z0-9_]*\)(pc,\([ad].[^)]*\))/pc@(\1,\2)/g
s/\.\([bBwWlL])\)/:\1/g
s/\.\([bBwWlL]\)\*\([0-9][0-9]*)\)/:\1:\2/g
s/\*\([0-9][0-9]*\))/:l:\1)/g
s/{\([0-9][0-9]*\):\([0-9][0-9]*\)}/{#\1:#\2}/g
s/{\(d[0-7]\):\([0-9][0-9]*\)}/{\1:#\2}/g
s/@()/@/g;s/@(0)/@/g
s/(,/(/g;s/:)/)/g
s/^ section 7/ .text/
s/^ section 8/ .text/
s/^ section 15/ .data/
/^ include/{s/include[ ]/.include "/;s/\.h[ ]*$/.defs"/;p;d;}
s/^ xref/| xref/
s/^ end/| end/
s/^ xdef/ .global/
s/^ lea\.l / lea /
s/^ swap\.w / swap /
s/^ adda\.l / addal /
s/^ suba\.l / subal /
s/^ movea\.l / moveal /
s/^ btst\.[bl] / btst /
s/^ bclr\.[bl] / bclr /
s/^ bset\.[bl] / bset /
s/^ bchg\.[bl] / bchg /
s/^ clr\.\([lbw]\) / clr\1 /
s/^ tst\.\([lbw]\) / tst\1 /
s/^ neg\.\([lbw]\) / neg\1 /
s/^ or\(i*\)\.\([lbw]\) / or\1\2 /
s/^ eor\(i*\)\.\([lbw]\) / eor\1\2 /
s/^ and\(i*\)\.\([lbw]\) / and\1\2 /
s/^ mul\([su]\)\.\([lw]\) / mul\1\2 /
s/^ div\([sul]*\)\.\([lw]\) / div\1\2 /
s/^ cmp\([i2]*\)\.\([lbw]\) / cmp\1\2 /
s/^ ro\([xlr]*\)\.\([lbw]\) / ro\1\2 /
s/^ \([al]\)s\([lr]\)\.\([lbw]\) / \1s\2\3 /
s/^ add\([xiq]*\)\.\([lbw]\) / add\1\2 /
s/^ sub\([xiq]*\)\.\([lbw]\) / sub\1\2 /
s/^ move\([scmq]*\)\.\([lbw]\) / move\1\2 /
s/^ fabs\.\([sdx]\) / fabs\1 /
s/^ fneg\.\([sdx]\) / fneg\1 /
s/^ ftst\.\([sdx]\) / ftst\1 /
s/^ fmul\.\([sdx]\) / fmul\1 /
s/^ fdiv\.\([sdx]\) / fdiv\1 /
s/^ fsqrt\.\([sdx]\) / fsqrt\1 /
s/^ fadd\.\([sdxbwl]\) / fadd\1 /
s/^ fsub\.\([sdxbwl]\) / fsub\1 /
s/^ fcmp\.\([sdxbwl]\) / fcmp\1 /
s/^ fmove\([mx]*\)\.\([sdxbwl]\) / fmove\1\2 /
# fix an odd instruction
s/^ bhs\.w / bcc /
# set and branch instructions; questionable
s/^ s\([a-z][a-z]*\)\.b / s\1 /
s/^ db\([a-z][a-z]*\)\.w / db\1 /
s/^ b\([a-eg-z][a-z]*\)\.b / b\1s /
s/^ b\([a-eg-z][a-z]*\)\.w / b\1 /
s/^ b\([a-eg-z][a-z]*\)\.l / b\1l /
s/^ fb\([a-eg-z][a-z]*\)\.w / fb\1 /
s/^ fb\([a-eg-z][a-z]*\)\.l / fb\1l /
# make up for a gas bug
/^ fmovemx /{
s/ fp\([0-7]\),/ fp\1-fp\1,/
s/,fp\([0-7]\) /,fp\1-fp\1 /
s/,fp\([0-7]\)$/,fp\1-fp\1/
}
'

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@ -0,0 +1,158 @@
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
* M68000 Hi-Performance Microprocessor Division
* M68040 Software Package
*
* M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
* All rights reserved.
*
* THE SOFTWARE is provided on an "AS IS" basis and without warranty.
* To the maximum extent permitted by applicable law,
* MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
* PARTICULAR PURPOSE and any warranty against infringement with
* regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
* and any accompanying written materials.
*
* To the maximum extent permitted by applicable law,
* IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
* PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
* OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
* SOFTWARE. Motorola assumes no responsibility for the maintenance
* and support of the SOFTWARE.
*
* You are hereby granted a copyright license to use, modify, and
* distribute the SOFTWARE so long as this entire notice is retained
* without alteration in any modified and/or redistributed versions,
* and that such modified versions are clearly identified as such.
* No licenses are granted by implication, estoppel or otherwise
* under any patents or trademarks of Motorola, Inc.
*
* DYADIC.GCC --- DYADIC template for GCC compiler
*
* This is based on the generic template. The only difference is that
* GCC does not need the d0-d1/a0-a1 registers saved.
*
* Customizations:
* 2. Likewise, don't save FP0/FP1 if they are scratch
* registers.
* 3. Delete updating of the fpsr if you only care about
* the result.
* 5. Move the result to d0/d1 if the compiler is that old.
*
xref _OPa_
xref tag
xdef _OPs_
_OPs_:
link a6,#-LOCAL_SIZE
fmovem.x fp0-fp3,USER_FP0(a6)
fmove.l fpsr,USER_FPSR(a6)
fmove.l fpcr,USER_FPCR(a6) ; user's rounding mode/precision
fmove.l #0,fpcr ; force rounding mode/prec to extended,rn
*
* copy, convert and tag input arguments
*
fmove.s 8(a6),fp0
fmove.x fp0,FPTEMP(a6)
lea FPTEMP(a6),a0
bsr tag
move.b d0,DTAG(a6)
fmove.s 12(a6),fp0
fmove.x fp0,ETEMP(a6)
lea ETEMP(a6),a0
bsr tag
move.b d0,STAG(a6)
bsr _OPa_
fmove.l fpsr,d0 ; update status register
or.b FPSR_AEXCEPT(a6),d0 ;add previously accrued exceptions
swap.w d0
or.b FPSR_QBYTE(a6),d0 ; pickup sign of quotient byte
swap.w d0
fmove.l d0,fpsr
*
* Result is now in FP0
*
fmovem.x USER_FP1(a6),fp1-fp3 ; note: FP0 not restored
unlk a6
rts
xdef _OPd_
_OPd_:
link a6,#-LOCAL_SIZE
fmovem.x fp0-fp3,USER_FP0(a6)
fmove.l fpsr,USER_FPSR(a6)
fmove.l fpcr,USER_FPCR(a6) ; user's rounding mode/precision
fmove.l #0,fpcr ; force rounding mode/prec to extended,rn
*
* copy, convert and tag input arguments
*
fmove.d 8(a6),fp0
fmove.x fp0,FPTEMP(a6)
lea FPTEMP(a6),a0
bsr tag
move.b d0,DTAG(a6)
fmove.d 16(a6),fp0
fmove.x fp0,ETEMP(a6)
lea ETEMP(a6),a0
bsr tag
move.b d0,STAG(a6)
bsr _OPa_
fmove.l fpsr,d0 ; update status register
or.b FPSR_AEXCEPT(a6),d0 ;add previously accrued exceptions
swap.w d0
or.b FPSR_QBYTE(a6),d0 ; pickup sign of quotient byte
swap.w d0
fmove.l d0,fpsr
*
* Result is now in FP0
*
fmovem.x USER_FP1(a6),fp1-fp3 ; note: FP0 not restored
unlk a6
rts
xdef _OPx_
_OPx_:
link a6,#-LOCAL_SIZE
fmovem.x fp0-fp3,USER_FP0(a6)
fmove.l fpsr,USER_FPSR(a6)
fmove.l fpcr,USER_FPCR(a6) ; user's rounding mode/precision
fmove.l #0,fpcr ; force rounding mode/prec to extended,rn
*
* copy, convert and tag input arguments
*
fmove.x 8(a6),fp0
fmove.x fp0,FPTEMP(a6)
lea FPTEMP(a6),a0
bsr tag
move.b d0,DTAG(a6)
fmove.x 20(a6),fp0
fmove.x fp0,ETEMP(a6)
lea ETEMP(a6),a0
bsr tag
move.b d0,STAG(a6)
bsr _OPa_
fmove.l fpsr,d0 ; update status register
or.b FPSR_AEXCEPT(a6),d0 ;add previously accrued exceptions
swap.w d0
or.b FPSR_QBYTE(a6),d0 ; pickup sign of quotient byte
swap.w d0
fmove.l d0,fpsr
*
* Result is now in FP0
*
fmovem.x USER_FP1(a6),fp1-fp3 ; note: FP0 not restored
unlk a6
rts

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@ -0,0 +1,201 @@
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
* M68000 Hi-Performance Microprocessor Division
* M68040 Software Package
*
* M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
* All rights reserved.
*
* THE SOFTWARE is provided on an "AS IS" basis and without warranty.
* To the maximum extent permitted by applicable law,
* MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
* PARTICULAR PURPOSE and any warranty against infringement with
* regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
* and any accompanying written materials.
*
* To the maximum extent permitted by applicable law,
* IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
* PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
* OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
* SOFTWARE. Motorola assumes no responsibility for the maintenance
* and support of the SOFTWARE.
*
* You are hereby granted a copyright license to use, modify, and
* distribute the SOFTWARE so long as this entire notice is retained
* without alteration in any modified and/or redistributed versions,
* and that such modified versions are clearly identified as such.
* No licenses are granted by implication, estoppel or otherwise
* under any patents or trademarks of Motorola, Inc.
*
* MONADIC.GCC --- MONADIC template for GCC compiler
*
* This is based on the generic template. The only difference is that
* GCC does not need the d0-d1/a0-a1 registers saved.
*
* Customizations:
* 2. Likewise, don't save FP0/FP1 if they are scratch
* registers.
* 3. Delete handling of the fpsr if you only care about
* the result.
* 5. Move the result to d0/d1 if the compiler is that old.
*
xref tag
xref _OPr_
xref _OPz_
xref _OPi_
xref _OPn_
xref _OPm_
xdef _OPs_
_OPs_:
link a6,#-LOCAL_SIZE
fmovem.x fp0-fp3,USER_FP0(a6)
fmove.l fpsr,USER_FPSR(a6)
fmove.l fpcr,USER_FPCR(a6)
fmove.l fpcr,d1 ; user's rounding mode/precision
fmove.l #0,fpcr ; force rounding mode/prec to extended,rn
*
* copy, convert and tag input argument
*
fmove.s 8(a6),fp0
fmove.x fp0,ETEMP(a6)
lea ETEMP(a6),a0
bsr tag
move.b d0,STAG(a6)
tst.b d0
bne.b _TMP_2
bsr _OPr_ ; normalized (regular) number
bra.b _TMP_6
_TMP_2:
cmp.b #$20,d0 ; zero?
bne.b _TMP_3
bsr _OPz_
bra.b _TMP_6
_TMP_3:
cmp.b #$40,d0 ; infinity?
bne.b _TMP_4
bsr _OPi_
bra.b _TMP_6
_TMP_4:
cmp.b #$60,d0 ; NaN?
bne.b _TMP_5
bsr _OPn_
bra.b _TMP_6
_TMP_5:
bsr _OPm_ ; assuming a denorm...
_TMP_6:
fmove.l fpsr,d0 ; update status register
or.b FPSR_AEXCEPT(a6),d0 ;add previously accrued exceptions
fmove.l d0,fpsr
*
* Result is now in FP0
*
fmovem.x USER_FP1(a6),fp1-fp3 ; note: FP0 not restored
fmove.l USER_FPCR(a6),fpcr ; fpcr restored
unlk a6
rts
xdef _OPd_
_OPd_:
link a6,#-LOCAL_SIZE
fmovem.x fp0-fp3,USER_FP0(a6)
fmove.l fpsr,USER_FPSR(a6)
fmove.l fpcr,USER_FPCR(a6)
fmove.l fpcr,d1 ; user's rounding mode/precision
fmove.l #0,fpcr ; force rounding mode/prec to extended,rn
*
* copy, convert and tag input argument
*
fmove.d 8(a6),fp0
fmove.x fp0,ETEMP(a6)
lea ETEMP(a6),a0
bsr tag
move.b d0,STAG(a6)
tst.b d0
bne.b _TMP_7
bsr _OPr_ ; normalized (regular) number
bra.b _TMP_B
_TMP_7:
cmp.b #$20,d0 ; zero?
bne.b _TMP_8
bsr _OPz_
bra.b _TMP_B
_TMP_8:
cmp.b #$40,d0 ; infinity?
bne.b _TMP_9
bsr _OPi_
bra.b _TMP_B
_TMP_9:
cmp.b #$60,d0 ; NaN?
bne.b _TMP_A
bsr _OPn_
bra.b _TMP_B
_TMP_A:
bsr _OPm_ ; assuming a denorm...
_TMP_B:
fmove.l fpsr,d0 ; update status register
or.b FPSR_AEXCEPT(a6),d0 ;add previously accrued exceptions
fmove.l d0,fpsr
*
* Result is now in FP0
*
fmovem.x USER_FP1(a6),fp1-fp3 ; note: FP0 not restored
fmove.l USER_FPCR(a6),fpcr ; fpcr restored
unlk a6
rts
xdef _OPx_
_OPx_:
link a6,#-LOCAL_SIZE
fmovem.x fp0-fp3,USER_FP0(a6)
fmove.l fpsr,USER_FPSR(a6)
fmove.l fpcr,USER_FPCR(a6)
fmove.l fpcr,d1 ; user's rounding mode/precision
fmove.l #0,fpcr ; force rounding mode/prec to extended,rn
*
* copy, convert and tag input argument
*
fmove.x 8(a6),fp0
fmove.x fp0,ETEMP(a6)
lea ETEMP(a6),a0
bsr tag
move.b d0,STAG(a6)
tst.b d0
bne.b _TMP_C
bsr _OPr_ ; normalized (regular) number
bra.b _TMP_G
_TMP_C:
cmp.b #$20,d0 ; zero?
bne.b _TMP_D
bsr _OPz_
bra.b _TMP_G
_TMP_D:
cmp.b #$40,d0 ; infinity?
bne.b _TMP_E
bsr _OPi_
bra.b _TMP_G
_TMP_E:
cmp.b #$60,d0 ; NaN?
bne.b _TMP_F
bsr _OPn_
bra.b _TMP_G
_TMP_F:
bsr _OPm_ ; assuming a denorm...
_TMP_G:
fmove.l fpsr,d0 ; update status register
or.b FPSR_AEXCEPT(a6),d0 ;add previously accrued exceptions
fmove.l d0,fpsr
*
* Result is now in FP0
*
fmovem.x USER_FP1(a6),fp1-fp3 ; note: FP0 not restored
fmove.l USER_FPCR(a6),fpcr ; fpcr restored
unlk a6
rts

View File

@ -111,13 +111,14 @@ _TMP_5:
_TMP_6:
fmove.l fpsr,d0 ; update status register
or.b USER_FPSR+3(a6),d0 ;add previously accrued exceptions
or.b FPSR_AEXCEPT(a6),d0 ;add previously accrued exceptions
fmove.l d0,fpsr
*
* Result is now in FP0
*
movem.l USER_DA(a6),d0-d1/a0-a1
fmovem.x USER_FP1(a6),fp1-fp3 ; note: FP0 not restored
fmove.l USER_FPCR(a6),fpcr ; fpcr restored
unlk a6
rts
@ -162,13 +163,14 @@ _TMP_A:
_TMP_B:
fmove.l fpsr,d0 ; update status register
or.b USER_FPSR+3(a6),d0 ;add previously accrued exceptions
or.b FPSR_AEXCEPT(a6),d0 ;add previously accrued exceptions
fmove.l d0,fpsr
*
* Result is now in FP0
*
movem.l USER_DA(a6),d0-d1/a0-a1
fmovem.x USER_FP1(a6),fp1-fp3 ; note: FP0 not restored
fmove.l USER_FPCR(a6),fpcr ; fpcr restored
unlk a6
rts
@ -213,13 +215,14 @@ _TMP_F:
_TMP_G:
fmove.l fpsr,d0 ; update status register
or.b USER_FPSR+3(a6),d0 ;add previously accrued exceptions
or.b FPSR_AEXCEPT(a6),d0 ;add previously accrued exceptions
fmove.l d0,fpsr
*
* Result is now in FP0
*
movem.l USER_DA(a6),d0-d1/a0-a1
fmovem.x USER_FP1(a6),fp1-fp3 ; note: FP0 not restored
fmove.l USER_FPCR(a6),fpcr ; fpcr restored
unlk a6
rts

View File

@ -34,19 +34,17 @@
# Makefile for 68040 Floating Point Software Package
#
TARGET = FPSP
TARGET = fpsp
ASM = ./pasm
ASMOPTS = +p=68020/68881 +l +C +M
PLINK = ./plink
PLINKOPTS = dummy +q$(TARGET) +w32 +x +i +m$(TARGET).linkmap
AS = as -m68040
LD = ld
#
# For the Library Version:
#
AR = ar
LIB_FILTER = sed 's/fpsp.h/l_fpsp.h/'
LIB_TARGET = libFPSP.a
LIB_FILTER = sed 's/fpsp.defs/l_fpsp.defs/'
LIB_TARGET = lib$(TARGET).a
#
# SYS selects the template set to use
# templates are supplied for R3V6, CI5 and GEN(generic)
@ -59,170 +57,93 @@ LIB_TARGET = libFPSP.a
#SYS = CI5
#PREFIX = .L
#
SYS = GEN
#SYS = GEN
#PREFIX = L_
#
SYS = GCC
PREFIX = L_
.SUFFIXES: .s .s~ .sa .sa~ .ro .h .h~
.sa.ro:
$(ASM) $(ASMOPTS) $*.sa
.sa~.ro:
sccs get SCCS/s.$*.sa
$(ASM) $(ASMOPTS) $*.sa
rm -f $*.sa
.SUFFIXES: .o .s .sa .defs .h
.sa.s:
asm2as $*.sa >$*.s
.sa~.sa:
sccs get SCCS/s.$*.sa
.s~.s:
sccs get SCCS/s.$*.s
.h~.h:
sccs get SCCS/s.$*.h
RO_FILES = \
skeleton.ro \
bindec.ro \
binstr.ro \
decbin.ro \
do_func.ro \
gen_except.ro \
get_op.ro \
kernel_ex.ro \
res_func.ro \
round.ro \
sacos.ro \
sasin.ro \
satan.ro \
satanh.ro \
scosh.ro \
setox.ro \
sgetem.ro \
sint.ro \
slogn.ro \
slog2.ro \
smovecr.ro \
srem_mod.ro \
scale.ro \
ssin.ro \
ssinh.ro \
stan.ro \
stanh.ro \
sto_res.ro \
stwotox.ro \
tbldo.ro \
util.ro \
x_bsun.ro \
x_fline.ro \
x_operr.ro \
x_ovfl.ro \
x_snan.ro \
x_store.ro \
x_unfl.ro \
x_unimp.ro \
x_unsupp.ro \
bugfix.ro \
FPSP.ro
LIB_RO_FILES = \
l_entry.ro \
l_do_func.ro \
l_round.ro \
l_sacos.ro \
l_sasin.ro \
l_satan.ro \
l_satanh.ro \
l_scale.ro \
l_scosh.ro \
l_setox.ro \
l_sgetem.ro \
l_sint.ro \
l_slog2.ro \
l_slogn.ro \
l_srem_mod.ro \
l_ssin.ro \
l_ssinh.ro \
l_stan.ro \
l_stanh.ro \
l_stwotox.ro \
l_support.ro
SA_FILES = \
skeleton.sa \
bindec.sa \
binstr.sa \
decbin.sa \
do_func.sa \
get_op.sa \
gen_except.sa \
kernel_ex.sa \
res_func.sa \
round.sa \
sacos.sa \
sasin.sa \
satan.sa \
satanh.sa \
scosh.sa \
setox.sa \
sgetem.sa \
sint.sa \
slogn.sa \
slog2.sa \
smovecr.sa \
srem_mod.sa \
scale.sa \
ssin.sa \
ssinh.sa \
stan.sa \
stanh.sa \
sto_res.sa \
stwotox.sa \
tbldo.sa \
util.sa \
x_bsun.sa \
x_fline.sa \
x_operr.sa \
x_ovfl.sa \
x_snan.sa \
x_store.sa \
x_unfl.sa \
x_unimp.sa \
x_unsupp.sa \
bugfix.sa \
FPSP.sa
LIB_SA_FILES = \
l_entry.sa \
l_do_func.sa \
l_round.sa \
l_sacos.sa \
l_sasin.sa \
l_satan.sa \
l_satanh.sa \
l_scale.sa \
l_scosh.sa \
l_setox.sa \
l_sgetem.sa \
l_sint.sa \
l_slog2.sa \
l_slogn.sa \
l_srem_mod.sa \
l_ssin.sa \
l_ssinh.sa \
l_stan.sa \
l_stanh.sa \
l_stwotox.sa
sh ${.CURDIR}/asm2gas ${.CURDIR}/$*.sa >$*.s
.h.defs:
sh ${.CURDIR}/asm2gas ${.CURDIR}/$*.h >$*.defs
.s.o:
$(AS) -o $*.o $*.s
H_FILES = \
fpsp.h \
l_fpsp.h
fpsp.defs \
l_fpsp.defs
U_FILES = \
unix.s \
O_FILES = \
netbsd.o \
bindec.o \
binstr.o \
decbin.o \
do_func.o \
gen_except.o \
get_op.o \
kernel_ex.o \
res_func.o \
round.o \
sacos.o \
sasin.o \
satan.o \
satanh.o \
scosh.o \
setox.o \
sgetem.o \
sint.o \
slogn.o \
slog2.o \
smovecr.o \
srem_mod.o \
scale.o \
ssin.o \
ssinh.o \
stan.o \
stanh.o \
sto_res.o \
stwotox.o \
tbldo.o \
util.o \
x_bsun.o \
x_fline.o \
x_operr.o \
x_ovfl.o \
x_snan.o \
x_store.o \
x_unfl.o \
x_unimp.o \
x_unsupp.o \
bugfix.o
LIB_O_FILES = \
l_entry.o \
l_do_func.o \
l_round.o \
l_sacos.o \
l_sasin.o \
l_satan.o \
l_satanh.o \
l_scale.o \
l_scosh.o \
l_setox.o \
l_sgetem.o \
l_sint.o \
l_slog2.o \
l_slogn.o \
l_srem_mod.o \
l_ssin.o \
l_ssinh.o \
l_stan.o \
l_stanh.o \
l_stwotox.o \
l_support.o
S_FILES = \
netbsd.s \
bindec.s \
binstr.s \
decbin.s \
@ -262,10 +183,10 @@ U_FILES = \
x_unfl.s \
x_unimp.s \
x_unsupp.s \
bugfix.s \
fpsp.mk \
fpsp.defs \
l_entry.s \
bugfix.s
LIB_S_FILES = \
l_entry.sa l_entry.s \
l_do_func.s \
l_round.s \
l_sacos.s \
@ -285,36 +206,19 @@ U_FILES = \
l_stan.s \
l_stanh.s \
l_stwotox.s \
l_support.s \
l_fpsp.defs
l_support.s
#
# Build the target object. The linkfile is created on the fly.
# Change the SEG directives to suit your system.
#
$(TARGET).mx: $(RO_FILES)
rm -f linkfile
echo 'IDENT FPSP,2,1,68040 Floating Point Software Package'>linkfile
echo 'SEG SEG0(G):7 $$00004000' >>linkfile
echo 'SEG SEG1(G):8 $$000D0000' >>linkfile
echo 'SEG SEG2(G):15 $$000E0000' >>linkfile
echo $(RO_FILES) | tr ' ' '\012' | sed 's/^/INPUT /' >>linkfile
echo 'END' >>linkfile
$(PLINK) $(PLINKOPTS) <linkfile
$(TARGET).o: $(O_FILES)
$(LD) -r -o $(TARGET).o $(O_FILES)
#
# Just about every file needs fpsp.h so:
#
$(RO_FILES): fpsp.h
fpsp.defs: fpsp.h
asm2as fpsp.h >fpsp.defs
unix.s:
sccs get unix.s
fpsp.mk:
sccs get fpsp.mk
$(O_FILES): fpsp.defs
#
#-----------------------------------------------------------------------
@ -323,14 +227,11 @@ fpsp.mk:
#
library: $(LIB_TARGET)
$(LIB_TARGET): $(LIB_RO_FILES)
$(LIB_TARGET): $(LIB_O_FILES)
rm -f $(LIB_TARGET)
$(AR) crv $(LIB_TARGET) $(LIB_RO_FILES)
$(AR) crv $(LIB_TARGET) $(LIB_O_FILES)
$(LIB_RO_FILES): l_fpsp.h
l_fpsp.defs: l_fpsp.h
asm2as l_fpsp.h >l_fpsp.defs
$(LIB_O_FILES): l_fpsp.defs
#
# The entry points to the library version are created here
@ -345,90 +246,86 @@ l_entry.sa: L_ENTRY.AWK L_LIST MONADIC.$(SYS) DYADIC.$(SYS) l_fpsp.h
# aren't needed in the library version. Beware that changes in
# the source code may cause this editing to break....
#
l_do_func.sa: do_func.sa
$(LIB_FILTER) do_func.sa >l_do_func.sa
echo '/xdef.*do_func/,/^ rts/d' >.SCRIPT
l_do_func.s: do_func.s
$(LIB_FILTER) do_func.s >l_do_func.s
echo '/global.*do_func/,/^ rts/d' >.SCRIPT
echo 'g/smovcr/d' >>.SCRIPT
echo 'g/tblpre/d' >>.SCRIPT
echo 'w' >>.SCRIPT
echo 'q' >>.SCRIPT
ed - l_do_func.sa <.SCRIPT
ed - l_do_func.s <.SCRIPT
rm .SCRIPT
l_round.sa: round.sa
$(LIB_FILTER) round.sa >l_round.sa
l_round.s: round.s
$(LIB_FILTER) round.s >l_round.s
echo '/^not_E3:/-6,/^not_E3:/d' >.SCRIPT
echo 'w' >>.SCRIPT
echo 'q' >>.SCRIPT
ed - l_round.sa <.SCRIPT
ed - l_round.s <.SCRIPT
rm .SCRIPT
l_sacos.sa: sacos.sa
$(LIB_FILTER) sacos.sa >l_sacos.sa
l_sacos.s: sacos.s
$(LIB_FILTER) sacos.s >l_sacos.s
l_sasin.sa: sasin.sa
$(LIB_FILTER) sasin.sa >l_sasin.sa
l_sasin.s: sasin.s
$(LIB_FILTER) sasin.s >l_sasin.s
l_satan.sa: satan.sa
$(LIB_FILTER) satan.sa >l_satan.sa
l_satan.s: satan.s
$(LIB_FILTER) satan.s >l_satan.s
l_satanh.sa: satanh.sa
$(LIB_FILTER) satanh.sa >l_satanh.sa
l_satanh.s: satanh.s
$(LIB_FILTER) satanh.s >l_satanh.s
l_scale.sa: scale.sa
$(LIB_FILTER) scale.sa >l_scale.sa
l_scale.s: scale.s
$(LIB_FILTER) scale.s >l_scale.s
l_scosh.sa: scosh.sa
$(LIB_FILTER) scosh.sa >l_scosh.sa
l_scosh.s: scosh.s
$(LIB_FILTER) scosh.s >l_scosh.s
l_setox.sa: setox.sa
$(LIB_FILTER) setox.sa >l_setox.sa
l_setox.s: setox.s
$(LIB_FILTER) setox.s >l_setox.s
l_sgetem.sa: sgetem.sa
$(LIB_FILTER) sgetem.sa >l_sgetem.sa
l_sgetem.s: sgetem.s
$(LIB_FILTER) sgetem.s >l_sgetem.s
l_sint.sa: sint.sa
$(LIB_FILTER) sint.sa >l_sint.sa
l_sint.s: sint.s
$(LIB_FILTER) sint.s >l_sint.s
l_slog2.sa: slog2.sa
$(LIB_FILTER) slog2.sa >l_slog2.sa
l_slog2.s: slog2.s
$(LIB_FILTER) slog2.s >l_slog2.s
l_slogn.sa: slogn.sa
$(LIB_FILTER) slogn.sa >l_slogn.sa
l_slogn.s: slogn.s
$(LIB_FILTER) slogn.s >l_slogn.s
l_srem_mod.sa: srem_mod.sa
$(LIB_FILTER) srem_mod.sa >l_srem_mod.sa
l_srem_mod.s: srem_mod.s
$(LIB_FILTER) srem_mod.s >l_srem_mod.s
l_ssin.sa: ssin.sa
$(LIB_FILTER) ssin.sa >l_ssin.sa
l_ssin.s: ssin.s
$(LIB_FILTER) ssin.s >l_ssin.s
l_ssinh.sa: ssinh.sa
$(LIB_FILTER) ssinh.sa >l_ssinh.sa
l_ssinh.s: ssinh.s
$(LIB_FILTER) ssinh.s >l_ssinh.s
l_stan.sa: stan.sa
$(LIB_FILTER) stan.sa >l_stan.sa
l_stan.s: stan.s
$(LIB_FILTER) stan.s >l_stan.s
l_stanh.sa: stanh.sa
$(LIB_FILTER) stanh.sa >l_stanh.sa
l_stanh.s: stanh.s
$(LIB_FILTER) stanh.s >l_stanh.s
l_stwotox.sa: stwotox.sa
$(LIB_FILTER) stwotox.sa >l_stwotox.sa
l_stwotox.s: stwotox.s
$(LIB_FILTER) stwotox.s >l_stwotox.s
#
# Extract all files from SCCS directory
#
getall: $(SA_FILES) $(H_FILES)
convert: $(U_FILES)
clean:
rm -f $(RO_FILES)
rm -f $(U_FILES)
rm -f *.ls linkfile $(TARGET).linkmap
rm -f FPSP.mx
rm -f $(LIB_TARGET) .SCRIPT
rm -f $(LIB_RO_FILES)
rm -f $(LIB_SA_FILES)
rm -f $(H_FILES)
rm -f $(S_FILES)
rm -f $(O_FILES)
rm -f $(TARGET).o
rm -f $(LIB_S_FILES)
rm -f $(LIB_O_FILES)
rm -f $(LIB_TARGET)
clobber: clean

View File

@ -0,0 +1,18 @@
# $Id: Makefile.inc,v 1.1 1994/07/05 17:57:02 mycroft Exp $
#
# NOTE: $S must correspond to the top of the `sys' tree
FPSPSRCDIR= $S/arch/m68k/fpsp
FPSPOBJDIR!= cd $(FPSPSRCDIR); \
printf "xxx:\n\techo \$${.OBJDIR}\n" | $(MAKE) -r -s -f - xxx
FPSPOBJ= $(FPSPOBJDIR)/fpsp.o
$(FPSPOBJ): .NOTMAIN __always_make_fpsp
@echo making sure the fpsp is up to date...
@(cd $(FPSPSRCDIR) ; $(MAKE))
FPSP!= printf "\#ifdef FPSP\n${FPSPOBJ}\n\#endif\n" | cpp -P -undef ${COPTS:M-DFPSP}
__always_make_fpsp: .NOTMAIN

188
sys/arch/m68k/fpsp/asm2gas Normal file
View File

@ -0,0 +1,188 @@
#!/bin/sh
#
# Copyright (c) 1994 Charles Hannum. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. All advertising materials mentioning features or use of this software
# must display the following acknowledgement:
# This product includes software developed by Charles Hannum.
# 4. The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# $Id: asm2gas,v 1.1 1994/07/05 17:57:04 mycroft Exp $
#
# This ugly script converts assembler code from Motorola's format to a
# form that gas (MIT syntax) can digest.
cat $1 | sed -e '
/[ ]IDNT[ ]/{s/^/|/;p;d;}
/^\*/{p;d;}
s/;/|/
/[ ]equ[ ]/{
s/\([A-Za-z_][A-Za-z0-9_]*\)[ ]*equ[ ]*/\1,/
s/[ ][ ]*\(.*\)$/ |\1/
s/ ||/ |/
s/^/ .set /
p;d
}
s/^\([A-Za-z_][A-Za-z0-9_]*\)[ ][ ]*/\1: /
s/^\([A-Za-z_][A-Za-z0-9_]*\)$/\1:/
/^[A-Za-z_][A-Za-z0-9_]*:/{
h
s/:.*$/:/
p
g
s/^.*:[ ]*/ /
/^ $/d
}
/^[ ][ ]*[.a-zA-Z][.a-zA-Z0-9]*/{
h
s/[ ]*[.a-zA-Z][.a-zA-Z0-9]*[ ]*//
s/[ ][ ]*\(.*\)$/ |\1/
s/ ||/ |/
x
s/^[ ]*\([.a-zA-Z][.a-zA-Z0-9]*\)/\1/
s/[ ][ ]*.*$/ /
y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/
s/^/ /
G
s/\n//
}
' | sed -e '
s/^\*/|/
s/\$/0x/g
s/#:/#0x/g
s/ dc\.l/ .long/
s/ dc\.w/ .short/
s/ dc\.b/ .byte/
' | sed -e '
s/\([^_a-zA-Z0-9]\)A\([0-7]\)\([^_a-zA-Z0-9:.]\)/\1a\2\3/g
s/\([^_a-zA-Z0-9]\)A\([0-7]\)\([^_a-zA-Z0-9:.]\)/\1a\2\3/g
s/\([^_a-zA-Z0-9]\)A\([0-7]\)$/\1a\2/g
s/\([^_a-zA-Z0-9]\)D\([0-7]\)\([^_a-zA-Z0-9]\)/\1d\2\3/g
s/\([^_a-zA-Z0-9]\)D\([0-7]\)\([^_a-zA-Z0-9]\)/\1d\2\3/g
s/\([^_a-zA-Z0-9]\)D\([0-7]\)$/\1d\2/g
s/\([^_a-zA-Z0-9]\)FP\([0-7]\)\([^_a-zA-Z0-9]\)/\1fp\2\3/g
s/\([^_a-zA-Z0-9]\)FP\([0-7]\)\([^_a-zA-Z0-9]\)/\1fp\2\3/g
s/\([^_a-zA-Z0-9]\)FP\([0-7]\)$/\1fp\2/g
s/\([^_a-zA-Z0-9]\)FPCR\([^_a-zA-Z0-9]\)/\1fpcr\2/g
s/\([^_a-zA-Z0-9]\)FPCR\([^_a-zA-Z0-9]\)/\1fpcr\2/g
s/\([^_a-zA-Z0-9]\)FPCR$/\1fpcr/g
s/\([^_a-zA-Z0-9]\)FPSR\([^_a-zA-Z0-9]\)/\1fpsr\2/g
s/\([^_a-zA-Z0-9]\)FPSR\([^_a-zA-Z0-9]\)/\1fpsr\2/g
s/\([^_a-zA-Z0-9]\)FPSR$/\1fpsr/g
s/\([^_a-zA-Z0-9]\)FPIAR\([^_a-zA-Z0-9]\)/\1fpi\2/g
s/\([^_a-zA-Z0-9]\)FPIAR\([^_a-zA-Z0-9]\)/\1fpi\2/g
s/\([^_a-zA-Z0-9]\)FPIAR$/\1fpi/g
s/\([^_a-zA-Z0-9]\)fpiar\([^_a-zA-Z0-9]\)/\1fpi\2/g
s/\([^_a-zA-Z0-9]\)fpiar\([^_a-zA-Z0-9]\)/\1fpi\2/g
s/\([^_a-zA-Z0-9]\)fpiar$/\1fpi/g
s/\([^_a-zA-Z0-9]\)a7\([^_a-zA-Z0-9:.]\)/\1sp\2/g
s/\([^_a-zA-Z0-9]\)a7\([^_a-zA-Z0-9:.]\)/\1sp\2/g
s/\([^_a-zA-Z0-9]\)a7$/\1sp/g
' | sed -e '
s/-(\(a.\))/\1@-/g
s/(\(a.\))+/\1@+/g
s/\([-+A-Za-z0-9_]*\)(\(a.\))/\2@(\1)/g
s/\([-+A-Za-z0-9_]*\)(\(a.\),\([ad].[^)]*\))/\2@(\1,\3)/g
s/-(sp)/sp@-/g
s/(sp)+/sp@+/g
s/\([-+A-Za-z0-9_]*\)(sp)/sp@(\1)/g
s/\([-+A-Za-z0-9_]*\)(sp,\([ad].[^)]*\))/sp@(\1,\2)/g
s/-(pc)/pc@-/g
s/(pc)+/pc@+/g
s/\([-+A-Za-z0-9_]*\)(pc)/pc@(\1)/g
s/\([-+A-Za-z0-9_]*\)(pc,\([ad].[^)]*\))/pc@(\1,\2)/g
s/\.\([bBwWlL])\)/:\1/g
s/\.\([bBwWlL]\)\*\([0-9][0-9]*)\)/:\1:\2/g
s/\*\([0-9][0-9]*\))/:l:\1)/g
s/{\([0-9][0-9]*\):\([0-9][0-9]*\)}/{#\1:#\2}/g
s/{\(d[0-7]\):\([0-9][0-9]*\)}/{\1:#\2}/g
s/@()/@/g;s/@(0)/@/g
s/(,/(/g;s/:)/)/g
s/^ section 7/ .text/
s/^ section 8/ .text/
s/^ section 15/ .data/
/^ include/{s/include[ ]/.include "/;s/\.h[ ]*$/.defs"/;p;d;}
s/^ xref/| xref/
s/^ end/| end/
s/^ xdef/ .global/
s/^ lea\.l / lea /
s/^ swap\.w / swap /
s/^ adda\.l / addal /
s/^ suba\.l / subal /
s/^ movea\.l / moveal /
s/^ btst\.[bl] / btst /
s/^ bclr\.[bl] / bclr /
s/^ bset\.[bl] / bset /
s/^ bchg\.[bl] / bchg /
s/^ clr\.\([lbw]\) / clr\1 /
s/^ tst\.\([lbw]\) / tst\1 /
s/^ neg\.\([lbw]\) / neg\1 /
s/^ or\(i*\)\.\([lbw]\) / or\1\2 /
s/^ eor\(i*\)\.\([lbw]\) / eor\1\2 /
s/^ and\(i*\)\.\([lbw]\) / and\1\2 /
s/^ mul\([su]\)\.\([lw]\) / mul\1\2 /
s/^ div\([sul]*\)\.\([lw]\) / div\1\2 /
s/^ cmp\([i2]*\)\.\([lbw]\) / cmp\1\2 /
s/^ ro\([xlr]*\)\.\([lbw]\) / ro\1\2 /
s/^ \([al]\)s\([lr]\)\.\([lbw]\) / \1s\2\3 /
s/^ add\([xiq]*\)\.\([lbw]\) / add\1\2 /
s/^ sub\([xiq]*\)\.\([lbw]\) / sub\1\2 /
s/^ move\([scmq]*\)\.\([lbw]\) / move\1\2 /
s/^ fabs\.\([sdx]\) / fabs\1 /
s/^ fneg\.\([sdx]\) / fneg\1 /
s/^ ftst\.\([sdx]\) / ftst\1 /
s/^ fmul\.\([sdx]\) / fmul\1 /
s/^ fdiv\.\([sdx]\) / fdiv\1 /
s/^ fsqrt\.\([sdx]\) / fsqrt\1 /
s/^ fadd\.\([sdxbwl]\) / fadd\1 /
s/^ fsub\.\([sdxbwl]\) / fsub\1 /
s/^ fcmp\.\([sdxbwl]\) / fcmp\1 /
s/^ fmove\([mx]*\)\.\([sdxbwl]\) / fmove\1\2 /
# fix an odd instruction
s/^ bhs\.w / bcc /
# set and branch instructions; questionable
s/^ s\([a-z][a-z]*\)\.b / s\1 /
s/^ db\([a-z][a-z]*\)\.w / db\1 /
s/^ b\([a-eg-z][a-z]*\)\.b / b\1s /
s/^ b\([a-eg-z][a-z]*\)\.w / b\1 /
s/^ b\([a-eg-z][a-z]*\)\.l / b\1l /
s/^ fb\([a-eg-z][a-z]*\)\.w / fb\1 /
s/^ fb\([a-eg-z][a-z]*\)\.l / fb\1l /
# make up for a gas bug
/^ fmovemx /{
s/ fp\([0-7]\),/ fp\1-fp\1,/
s/,fp\([0-7]\) /,fp\1-fp\1 /
s/,fp\([0-7]\)$/,fp\1-fp\1/
}
'

View File

@ -214,8 +214,8 @@ un_de_norm:
move.l 8(a0),d2
norm_loop:
sub.w #1,d0
lsl.l #1,d2
roxl.l #1,d1
add.l d2,d2
addx.l d1,d1
tst.l d1
bge.b norm_loop
*
@ -424,9 +424,9 @@ no_inf:
iscale:
fmove.s FONE,fp1 ;init fp1 to 1
bfextu USER_FPCR(a6){26:2},d1 ;get initial rmode bits
lsl.w #1,d1 ;put them in bits 2:1
add.w d1,d1 ;put them in bits 2:1
add.w d5,d1 ;add in LAMBDA
lsl.w #1,d1 ;put them in bits 3:1
add.w d1,d1 ;put them in bits 3:1
tst.l L_SCR2(a6) ;test sign of original x
bge.b x_pos ;if pos, don't set bit 0
addq.l #1,d1 ;if neg, set bit 0

View File

@ -118,8 +118,8 @@ loop:
*
* A4. Multiply d4:d5 by 2; add carry out to d1.
*
asl.l #1,d5 ;mul d5 by 2
roxl.l #1,d4 ;mul d4 by 2
add.l d5,d5 ;mul d5 by 2
addx.l d4,d4 ;mul d4 by 2
swap d6 ;put 0 in d6 lower word
addx.w d6,d1 ;add in extend from mul by 2
*

View File

@ -290,7 +290,7 @@ op0_xu:
move.l CMDREG1B(a6),L_SCR2(a6)
move.l DTAG(a6),L_SCR3(a6)
andi.l #$e0000000,L_SCR3(a6)
move.b #0,CU_SAVEPC(a6)
clr.b CU_SAVEPC(a6)
move.l (a7)+,d1 ;save return address from bsr
frestore (a7)+
fsave -(a7)
@ -413,7 +413,7 @@ op2_xu:
move.l CMDREG1B(a6),L_SCR2(a6)
move.l DTAG(a6),L_SCR3(a6)
andi.l #$e0000000,L_SCR3(a6)
move.b #0,CU_SAVEPC(a6)
clr.b CU_SAVEPC(a6)
move.l ETEMP(a6),FP_SCR2(a6)
move.l ETEMP_HI(a6),FP_SCR2+4(a6)
move.l ETEMP_LO(a6),FP_SCR2+8(a6)

View File

@ -86,7 +86,7 @@ gen_except:
cmpi.b #UNIMP_41_SIZE-4,1(a7) ;test for rev unimp frame
beq.b unimp_x ;go handle unimp frame
cmpi.b #BUSY_SIZE-4,1(a7) ;if size <> $60, fmt error
bne fpsp_fmt_error
bne.l fpsp_fmt_error
lea.l BUSY_SIZE+LOCAL_SIZE(a7),a1 ;init a1 so fpsp.h
* ;equates will work
* Fix up the new busy frame with entries from the unimp frame
@ -129,7 +129,7 @@ unimp_x:
bra.b unimp_con
test_rev:
cmpi.b #UNIMP_41_SIZE-4,1(a7) ;test for rev unimp frame
bne fpsp_fmt_error ;if not $28 or $30
bne.l fpsp_fmt_error ;if not $28 or $30
lea.l UNIMP_41_SIZE+LOCAL_SIZE(a7),a1
unimp_con:
@ -307,7 +307,7 @@ ofuf_con:
bra.b ofuf_fin
try_41:
cmpi.b #VER_41,(a7) ;test for rev unimp frame
bne fpsp_fmt_error ;if neither, exit with error
bne.l fpsp_fmt_error ;if neither, exit with error
moveq.l #11,d0 ;need to zero 12 lwords
ofuf_fin:
@ -408,7 +408,7 @@ finish_up:
bne.b g_trace
btst.b #6,(a7) ;test T0 in SR
bne.b g_trace
bra fpsp_done
bra.l fpsp_done
*
* Change integer stack to look like trace stack
* The address of the instruction that caused the
@ -425,18 +425,18 @@ g_trace:
bftst EXC_VEC-4(sp){0:4}
bne g_easy
sub.w #4,sp make room
subq.l #4,sp make room
move.l 4(sp),(sp)
move.l 8(sp),4(sp)
sub.w #BUSY_SIZE,sp
sub.l #BUSY_SIZE,sp
fsave (sp)
fmove fpiar,BUSY_SIZE+EXC_EA-4(sp)
fmove.l fpiar,BUSY_SIZE+EXC_EA-4(sp)
frestore (sp)
add.w #BUSY_SIZE,sp
add.l #BUSY_SIZE,sp
g_easy:
move.w #TRACE_VEC,EXC_VEC-4(a7)
bra real_trace
bra.l real_trace
*
* This is a work-around for hardware bug 1384.
*

View File

@ -469,7 +469,7 @@ uns_op3:
btst.b #7,LOCAL_HI(a0) ;if msb = 1
bne.b no_unfl ;then branch
set_unfl:
or.w #dnrm_tag,L_SCR1(a6) ;set denorm tag
or.b #dnrm_tag,L_SCR1(a6) ;set denorm tag
bset.b #unfl_bit,FPSR_EXCEPT(a6) ;set unfl exception bit
no_unfl:
rts
@ -685,12 +685,12 @@ is_nrm:
* For a norm, check if the exp <= $3fff; if so, set etemp_15
cmpi.w #$3fff,d1
ble.b set_bit15
move.b #0,STAG(a6)
clr.b STAG(a6)
bra.b end_is_nrm
set_bit15:
move.b #$10,STAG(a6)
end_is_nrm:
move.l #0,d0
clr.l d0
end_fix:
rts

View File

@ -327,21 +327,21 @@ sdiv:
sabs:
fmovem.x ETEMP(a6),fp0
fmove.l d1,fpcr
fabs fp0
fabs.x fp0
rts
xdef sneg
sneg:
fmovem.x ETEMP(a6),fp0
fmove.l d1,fpcr
fneg fp0
fneg.x fp0
rts
xdef ssqrt
ssqrt:
fmovem.x ETEMP(a6),fp0
fmove.l d1,fpcr
fsqrt fp0
fsqrt.x fp0
rts
*

View File

@ -0,0 +1,440 @@
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
* M68000 Hi-Performance Microprocessor Division
* M68040 Software Package
*
* M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
* All rights reserved.
*
* THE SOFTWARE is provided on an "AS IS" basis and without warranty.
* To the maximum extent permitted by applicable law,
* MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
* PARTICULAR PURPOSE and any warranty against infringement with
* regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
* and any accompanying written materials.
*
* To the maximum extent permitted by applicable law,
* IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
* PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
* OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
* SOFTWARE. Motorola assumes no responsibility for the maintenance
* and support of the SOFTWARE.
*
* You are hereby granted a copyright license to use, modify, and
* distribute the SOFTWARE so long as this entire notice is retained
* without alteration in any modified and/or redistributed versions,
* and that such modified versions are clearly identified as such.
* No licenses are granted by implication, estoppel or otherwise
* under any patents or trademarks of Motorola, Inc.
*
* skeleton.sa 3.2 4/26/91
*
* This file contains code that is system dependent and will
* need to be modified to install the FPSP.
*
* Each entry point for exception 'xxxx' begins with a 'jmp fpsp_xxxx'.
* Put any target system specific handling that must be done immediately
* before the jump instruction. If there no handling necessary, then
* the 'fpsp_xxxx' handler entry point should be placed in the exception
* table so that the 'jmp' can be eliminated. If the FPSP determines that the
* exception is one that must be reported then there will be a
* return from the package by a 'jmp real_xxxx'. At that point
* the machine state will be identical to the state before
* the FPSP was entered. In particular, whatever condition
* that caused the exception will still be pending when the FPSP
* package returns. Thus, there will be system specific code
* to handle the exception.
*
* If the exception was completely handled by the package, then
* the return will be via a 'jmp fpsp_done'. Unless there is
* OS specific work to be done (such as handling a context switch or
* interrupt) the user program can be resumed via 'rte'.
*
* In the following skeleton code, some typical 'real_xxxx' handling
* code is shown. This code may need to be moved to an appropriate
* place in the target system, or rewritten.
*
SKELETON IDNT 2,1 Motorola 040 Floating Point Software Package
section 15
*
* The following counters are used for standalone testing
*
section 8
include fpsp.h
xref b1238_fix
xref _mmutype
*
* Divide by Zero exception
*
* All dz exceptions are 'real', hence no fpsp_dz entry point.
*
xdef dz
xdef real_dz
dz:
cmp.l #-2,_mmutype
bne.l _fpfault
real_dz:
link a6,#-LOCAL_SIZE
fsave -(sp)
bclr.b #E1,E_BYTE(a6)
frestore (sp)+
unlk a6
jmp _fpfault
*
* Inexact exception
*
* All inexact exceptions are real, but the 'real' handler
* will probably want to clear the pending exception.
* The provided code will clear the E3 exception (if pending),
* otherwise clear the E1 exception. The frestore is not really
* necessary for E1 exceptions.
*
* Code following the 'inex' label is to handle bug #1232. In this
* bug, if an E1 snan, ovfl, or unfl occured, and the process was
* swapped out before taking the exception, the exception taken on
* return was inex, rather than the correct exception. The snan, ovfl,
* and unfl exception to be taken must not have been enabled. The
* fix is to check for E1, and the existence of one of snan, ovfl,
* or unfl bits set in the fpsr. If any of these are set, branch
* to the appropriate handler for the exception in the fpsr. Note
* that this fix is only for d43b parts, and is skipped if the
* version number is not $40.
*
*
xdef real_inex
xdef inex
inex:
cmp.l #-2,_mmutype
bne.l _fpfault
link a6,#-LOCAL_SIZE
fsave -(sp)
cmpi.b #VER_40,(sp) ;test version number
bne.b not_fmt40
fmove.l fpsr,-(sp)
btst.b #E1,E_BYTE(a6) ;test for E1 set
beq.b not_b1232
btst.b #snan_bit,2(sp) ;test for snan
beq inex_ckofl
addq.l #4,sp
frestore (sp)+
unlk a6
bra snan
inex_ckofl:
btst.b #ovfl_bit,2(sp) ;test for ovfl
beq inex_ckufl
addq.l #4,sp
frestore (sp)+
unlk a6
bra ovfl
inex_ckufl:
btst.b #unfl_bit,2(sp) ;test for unfl
beq not_b1232
addq.l #4,sp
frestore (sp)+
unlk a6
bra unfl
*
* We do not have the bug 1232 case. Clean up the stack and call
* real_inex.
*
not_b1232:
addq.l #4,sp
frestore (sp)+
unlk a6
real_inex:
link a6,#-LOCAL_SIZE
fsave -(sp)
not_fmt40:
bclr.b #E3,E_BYTE(a6) ;clear and test E3 flag
beq.b inex_cke1
*
* Clear dirty bit on dest resister in the frame before branching
* to b1238_fix.
*
movem.l d0/d1,USER_DA(a6)
bfextu CMDREG1B(a6){6:3},d0 ;get dest reg no
bclr.b d0,FPR_DIRTY_BITS(a6) ;clr dest dirty bit
bsr.l b1238_fix ;test for bug1238 case
movem.l USER_DA(a6),d0/d1
bra.b inex_done
inex_cke1:
bclr.b #E1,E_BYTE(a6)
inex_done:
frestore (sp)+
unlk a6
jmp _fpfault
*
* Overflow exception
*
xref fpsp_ovfl
xdef real_ovfl
xdef ovfl
ovfl:
cmp.l #-2,_mmutype
beq.l fpsp_ovfl
jmp _fpfault
real_ovfl:
link a6,#-LOCAL_SIZE
fsave -(sp)
bclr.b #E3,E_BYTE(a6) ;clear and test E3 flag
bne.b ovfl_done
bclr.b #E1,E_BYTE(a6)
ovfl_done:
frestore (sp)+
unlk a6
jmp _fpfault
*
* Underflow exception
*
xref fpsp_unfl
xdef real_unfl
xdef unfl
unfl:
cmp.l #-2,_mmutype
beq.l fpsp_unfl
jmp _fpfault
real_unfl:
link a6,#-LOCAL_SIZE
fsave -(sp)
bclr.b #E3,E_BYTE(a6) ;clear and test E3 flag
bne.b unfl_done
bclr.b #E1,E_BYTE(a6)
unfl_done:
frestore (sp)+
unlk a6
jmp _fpfault
*
* Signalling NAN exception
*
xref fpsp_snan
xdef real_snan
xdef snan
snan:
cmp.l #-2,_mmutype
beq.l fpsp_snan
jmp _fpfault
real_snan:
link a6,#-LOCAL_SIZE
fsave -(sp)
bclr.b #E1,E_BYTE(a6) ;snan is always an E1 exception
frestore (sp)+
unlk a6
jmp _fpfault
*
* Operand Error exception
*
xref fpsp_operr
xdef real_operr
xdef operr
operr:
cmp.l #-2,_mmutype
beq.l fpsp_operr
jmp _fpfault
real_operr:
link a6,#-LOCAL_SIZE
fsave -(sp)
bclr.b #E1,E_BYTE(a6) ;operr is always an E1 exception
frestore (sp)+
unlk a6
jmp _fpfault
*
* BSUN exception
*
* This sample handler simply clears the nan bit in the FPSR.
*
xref fpsp_bsun
xdef real_bsun
xdef bsun
bsun:
cmp.l #-2,_mmutype
beq.l fpsp_bsun
jmp _fpfault
real_bsun:
link a6,#-LOCAL_SIZE
fsave -(sp)
bclr.b #E1,E_BYTE(a6) ;bsun is always an E1 exception
fmove.l FPSR,-(sp)
bclr.b #nan_bit,(sp)
fmove.l (sp)+,FPSR
frestore (sp)+
unlk a6
jmp _fpfault
*
* F-line exception
*
* A 'real' F-line exception is one that the FPSP isn't supposed to
* handle. E.g. an instruction with a co-processor ID that is not 1.
*
*
xref fpsp_fline
xdef real_fline
xdef fline
fline:
cmp.l #-2,_mmutype
beq.l fpsp_fline
jmp _fpfault
real_fline:
jmp _fpfault
*
* Unsupported data type exception
*
xref fpsp_unsupp
xdef real_unsupp
xdef unsupp
unsupp:
cmp.l #-2,_mmutype
beq.l fpsp_unsupp
jmp _fpfault
real_unsupp:
link a6,#-LOCAL_SIZE
fsave -(sp)
bclr.b #E1,E_BYTE(a6) ;unsupp is always an E1 exception
frestore (sp)+
unlk a6
jmp _fpfault
*
* Trace exception
*
xdef real_trace
real_trace:
rte
*
* fpsp_fmt_error --- exit point for frame format error
*
* The fpu stack frame does not match the frames existing
* or planned at the time of this writing. The fpsp is
* unable to handle frame sizes not in the following
* version:size pairs:
*
* {4060, 4160} - busy frame
* {4028, 4130} - unimp frame
* {4000, 4100} - idle frame
*
* This entry point simply holds an f-line illegal value.
* Replace this with a call to your kernel panic code or
* code to handle future revisions of the fpu.
*
xdef fpsp_fmt_error
fpsp_fmt_error:
pea 1f
jsr _panic
dc.l $f27f0000 ;f-line illegal
1:
.asciz "bad floating point stack frame"
.even
*
* fpsp_done --- FPSP exit point
*
* The exception has been handled by the package and we are ready
* to return to user mode, but there may be OS specific code
* to execute before we do. If there is, do it now.
*
*
xref rei
xdef fpsp_done
fpsp_done:
jmp rei
*
* mem_write --- write to user or supervisor address space
*
* Writes to memory while in supervisor mode. copyout accomplishes
* this via a 'moves' instruction. copyout is a UNIX SVR3 (and later) function.
* If you don't have copyout, use the local copy of the function below.
*
* a0 - supervisor source address
* a1 - user destination address
* d0 - number of bytes to write (maximum count is 12)
*
* The supervisor source address is guaranteed to point into the supervisor
* stack. The result is that a UNIX
* process is allowed to sleep as a consequence of a page fault during
* copyout. The probability of a page fault is exceedingly small because
* the 68040 always reads the destination address and thus the page
* faults should have already been handled.
*
* If the EXC_SR shows that the exception was from supervisor space,
* then just do a dumb (and slow) memory move. In a UNIX environment
* there shouldn't be any supervisor mode floating point exceptions.
*
xdef mem_write
mem_write:
btst.b #5,EXC_SR(a6) ;check for supervisor state
beq.b user_write
super_write:
move.b (a0)+,(a1)+
subq.l #1,d0
bne.b super_write
rts
user_write:
move.l d1,-(sp) ;preserve d1 just in case
move.l d0,-(sp)
move.l a1,-(sp)
move.l a0,-(sp)
jsr _copyout
add.l #12,sp
move.l (sp)+,d1
rts
*
* mem_read --- read from user or supervisor address space
*
* Reads from memory while in supervisor mode. copyin accomplishes
* this via a 'moves' instruction. copyin is a UNIX SVR3 (and later) function.
* If you don't have copyin, use the local copy of the function below.
*
* The FPSP calls mem_read to read the original F-line instruction in order
* to extract the data register number when the 'Dn' addressing mode is
* used.
*
*Input:
* a0 - user source address
* a1 - supervisor destination address
* d0 - number of bytes to read (maximum count is 12)
*
* Like mem_write, mem_read always reads with a supervisor
* destination address on the supervisor stack. Also like mem_write,
* the EXC_SR is checked and a simple memory copy is done if reading
* from supervisor space is indicated.
*
xdef mem_read
mem_read:
btst.b #5,EXC_SR(a6) ;check for supervisor state
beq.b user_read
super_read:
move.b (a0)+,(a1)+
subq.l #1,d0
bne.b super_read
rts
user_read:
move.l d1,-(sp) ;preserve d1 just in case
move.l d0,-(sp)
move.l a1,-(sp)
move.l a0,-(sp)
jsr _copyin
add.l #12,sp
move.l (sp)+,d1
rts
end

View File

@ -1321,7 +1321,7 @@ frcfpn:
fmovem.x WBTEMP(a6),d0
rts
frc0123:
cmpi.b #0,d0
tst.b d0
beq.b frc0_dst
cmpi.b #1,d0
beq.b frc1_dst
@ -1409,7 +1409,7 @@ fminc_con:
rts
fp0123:
cmpi.b #0,d0
tst.b d0
beq.b fp0_dst
cmpi.b #1,d0
beq.b fp1_dst
@ -1650,7 +1650,7 @@ by_nlrg:
* -1 in L_SCR1(a6) will cover all contingencies (FMOVE.B/W/L out).
int_dnrm:
move.l #0,L_SCR1(a6) ; initialize result to 0
clr.l L_SCR1(a6) ; initialize result to 0
bfextu FPCR_MODE(a6){2:2},d1 ; d1 is the rounding mode
cmp.b #2,d1
bmi.b int_inx ; if RN or RZ, done
@ -1939,7 +1939,7 @@ dpspdnrm:
move.l a0,a1 ;a1 has the operand input
move.l EXC_EA(a6),a0 ;a0 has the destination pointer
add.w #4,a7 ;pop stack
addq.l #4,a7 ;pop stack
rts
*
* SET_XOP initialized WBTEMP with the value pointed to by a0
@ -1985,7 +1985,7 @@ p_write:
move.l #$0c,d0 ;get byte count
move.l EXC_EA(a6),a1 ;get the destination address
bsr mem_write ;write the user's destination
move.b #0,CU_SAVEPC(a6) ;set the cu save pc to all 0's
clr.b CU_SAVEPC(a6) ;set the cu save pc to all 0's
*
* Also note that the dtag must be set to norm here - this is because

View File

@ -137,7 +137,7 @@ rnd_zero:
*
rnd_near:
swap d1 ;set up d1 for round prec.
asl.l #1,d0 ;shift g-bit to c-bit
add.l d0,d0 ;shift g-bit to c-bit
bcc.w truncate ;if (g=1) then
lea add_to_l,a1
move.l (a1,d1.w*4),a1
@ -159,7 +159,7 @@ rnd_near:
*
ext_grs:
swap d1 ;have d1.w point to round precision
cmpi.w #0,d1
tst.w d1
bne.b sgl_or_dbl
bra.b end_ext_grs
@ -353,7 +353,7 @@ greater:
lsr.l d5,d6 ;by the number in the exp, then
* ;set exp = 0.
or.l d6,d1 ;shift the ls mant bits into the ms mant
move.l #0,d0 ;same as if decremented exp to 0
clr.l d0 ;same as if decremented exp to 0
* ;while shifting
move.w d0,LOCAL_EX(a0)
move.l d1,LOCAL_HI(a0)
@ -370,7 +370,7 @@ ms_clr:
movem.l (a7)+,d2/d3/d5/d6
rts
all_clr:
move.w #0,LOCAL_EX(a0) ;no mantissa bits set. Set exp = 0.
clr.w LOCAL_EX(a0) ;no mantissa bits set. Set exp = 0.
movem.l (a7)+,d2/d3/d5/d6
rts
*
@ -445,7 +445,7 @@ denorm:
bset.b #7,LOCAL_EX(a0) ;sign extend if it is so
no_sgn_ext:
cmpi.b #0,d0 ;if 0 then extended precision
tst.b d0 ;if 0 then extended precision
bne.b not_ext ;else branch
clr.l d1 ;load d1 with ext threshold
@ -496,8 +496,8 @@ set_stky:
move.l #$20000000,d0 ;set sticky bit in return value
clr_mant:
move.w d1,LOCAL_EX(a0) ;load exp with threshold
move.l #0,LOCAL_HI(a0) ;set d1 = 0 (ms mantissa)
move.l #0,LOCAL_LO(a0) ;set d2 = 0 (ms mantissa)
clr.l LOCAL_HI(a0) ;set d1 = 0 (ms mantissa)
clr.l LOCAL_LO(a0) ;set d2 = 0 (ms mantissa)
rts
dnrm_inex:
or.l #inx2a_mask,USER_FPSR(a6) ;set inex2/ainex

View File

@ -118,7 +118,7 @@ ACOSBIG:
*--|X| = 1, ACOS(X) = 0 OR PI
move.l (a0),d0 ...pack exponent with upper 16 fraction
move.w 4(a0),d0
CMP.L #0,D0 ;D0 has original exponent+fraction
TST.L D0 ;D0 has original exponent+fraction
BGT.B ACOSP1
*--X = -1

View File

@ -301,10 +301,10 @@ ATANOK1:
ATANMAIN:
MOVE.W #$0000,XDCARE(a6) ...CLEAN UP X JUST IN CASE
CLR.W XDCARE(a6) ...CLEAN UP X JUST IN CASE
ANDI.L #$F8000000,XFRAC(a6) ...FIRST 5 BITS
ORI.L #$04000000,XFRAC(a6) ...SET 6-TH BIT TO 1
MOVE.L #$00000000,XFRACLO(a6) ...LOCATION OF X IS NOW F
CLR.L XFRACLO(a6) ...LOCATION OF X IS NOW F
FMOVE.X FP0,FP1 ...FP1 IS X
FMUL.X X(a6),FP1 ...FP1 IS X*F, NOTE THAT X*F > 0
@ -380,7 +380,7 @@ ATANSM:
FMUL.X FP0,FP0 ...FP0 IS Y = X*X
MOVE.W #$0000,XDCARE(a6)
CLR.W XDCARE(a6)
FMOVE.X FP0,FP1
FMUL.X FP1,FP1 ...FP1 IS Z = Y*Y
@ -415,7 +415,7 @@ ATANSM:
ATANTINY:
*--|X| < 2^(-40), ATAN(X) = X
MOVE.W #$0000,XDCARE(a6)
CLR.W XDCARE(a6)
FMOVE.L d1,FPCR ;restore users exceptions
FMOVE.X X(a6),FP0 ;last inst - possible exception set

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@ -332,9 +332,9 @@ dst_loop:
blt.b dst_norm ;exit loop if so
tst.l d0 ;otherwise, test shift count
beq.b dst_fin ;if zero, shifting is done
subi.l #1,d0 ;dec src
lsl.l #1,d3
roxl.l #1,d2
subq.l #1,d0 ;dec src
add.l d3,d3
addx.l d2,d2
bra.b dst_loop
*
* Destination became normalized. Simply add the remaining
@ -344,7 +344,7 @@ dst_norm:
add.w d0,d1 ;dst is normalized; add src
tst.b L_SCR1(a6)
beq.b dnrm_pos
or.l #$8000,d1
or.w #$8000,d1
dnrm_pos:
movem.w d1,FPTEMP_EX(a6)
movem.l d2,FPTEMP_HI(a6)
@ -362,7 +362,7 @@ dst_fin:
tst.b L_SCR1(a6) ;check for sign
beq.b dst_exit
or.l #neg_mask,USER_FPSR(a6) ;set N
or.l #$8000,d1
or.w #$8000,d1
dst_exit:
movem.w d1,ETEMP_EX(a6)
movem.l d2,ETEMP_HI(a6)
@ -379,7 +379,7 @@ dst_exit:
src_out:
tst.b L_SCR1(a6)
beq.b scro_pos
or.l #$8000,d1
or.w #$8000,d1
scro_pos:
move.l FPTEMP_HI(a6),ETEMP_HI(a6)
move.l FPTEMP_LO(a6),ETEMP_LO(a6)

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@ -506,7 +506,7 @@ EXPMAIN:
FMOVE.X fp0,fp1
FMUL.S #:42B8AA3B,fp0 ...64/log2 * X
fmovem.x fp2/fp3,-(a7) ...save fp2
MOVE.L #0,ADJFLAG(a6)
CLR.L ADJFLAG(a6)
FMOVE.L fp0,d0 ...N = int( X * 64/log2 )
LEA EXPTBL,a1
FMOVE.L d0,fp0 ...convert to floating-format
@ -541,7 +541,7 @@ EXPCONT1:
FMUL.X fp1,fp1 ...fp1 IS S = R*R
FMOVE.S #:3AB60B70,fp2 ...fp2 IS A5
* MOVE.W #0,2(a1) ...load 2^(J/64) in cache
* CLR.W 2(a1) ...load 2^(J/64) in cache
FMUL.X fp1,fp2 ...fp2 IS S*A5
FMOVE.X fp1,fp3
@ -634,7 +634,7 @@ EXP2BIG:
FMOVE.L d1,FPCR
MOVE.L (a0),d0
bclr.b #sign_bit,(a0) ...setox always returns positive
CMPI.L #0,d0
TST.L d0
BLT t_unfl
BRA t_ovfl
@ -708,7 +708,7 @@ EM1MAIN:
FMUL.X fp1,fp1 ...fp1 IS S = R*R
FMOVE.S #:3950097B,fp2 ...fp2 IS a6
* MOVE.W #0,2(a1) ...load 2^(J/64) in cache
* CLR.W 2(a1) ...load 2^(J/64) in cache
FMUL.X fp1,fp2 ...fp2 IS S*A6
FMOVE.X fp1,fp3
@ -875,7 +875,7 @@ EM1POLY:
EM1BIG:
*--Step 10 |X| > 70 log2
MOVE.L (a0),d0
CMPI.L #0,d0
TST.L d0
BGT.W EXPC1
*--Step 10.2
FMOVE.S #:BF800000,fp0 ...fp0 is -1

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@ -403,7 +403,7 @@ user_write:
move.l a1,-(sp)
move.l a0,-(sp)
jsr copyout
add.w #12,sp
add.l #12,sp
move.l (sp)+,d1
rts
*
@ -442,7 +442,7 @@ user_read:
move.l a1,-(sp)
move.l a0,-(sp)
jsr copyin
add.w #12,sp
add.l #12,sp
move.l (sp)+,d1
rts

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@ -286,7 +286,7 @@ slognd:
*----Note that this code assumes the denormalized input is NON-ZERO.
MoveM.L D2-D7,-(A7) ...save some registers
Move.L #$00000000,D3 ...D3 is exponent of smallest norm. #
Clr.L D3 ...D3 is exponent of smallest norm. #
Move.L 4(A0),D4
Move.L 8(A0),D5 ...(D4,D5) is (Hi_X,Lo_X)
Clr.L D2 ...D2 used for holding K
@ -342,7 +342,7 @@ slogn:
*--ENTRY POINT FOR LOG(X) FOR X FINITE, NON-ZERO, NOT NAN'S
FMOVE.X (A0),FP0 ...LOAD INPUT
MOVE.L #$00000000,ADJK(a6)
CLR.L ADJK(a6)
LOGBGN:
*--FPCR SAVED AND CLEARED, INPUT IS 2^(ADJK)*FP0, FP0 CONTAINS
@ -355,7 +355,7 @@ LOGBGN:
move.l 4(a0),X+4(a6)
move.l 8(a0),X+8(a6)
CMPI.L #0,D0 ...CHECK IF X IS NEGATIVE
TST.L D0 ...CHECK IF X IS NEGATIVE
BLT.W LOGNEG ...LOG OF NEGATIVE ARGUMENT IS INVALID
CMP2.L BOUNDS1,D0 ...X IS POSITIVE, CHECK IF X IS NEAR 1
BCC.W LOGNEAR1 ...BOUNDS IS ROUGHLY [15/16, 17/16]
@ -518,13 +518,13 @@ slognp1:
LP1REAL:
FMOVE.X (A0),FP0 ...LOAD INPUT
MOVE.L #$00000000,ADJK(a6)
CLR.L ADJK(a6)
FMOVE.X FP0,FP1 ...FP1 IS INPUT Z
FADD.S one,FP0 ...X := ROUND(1+Z)
FMOVE.X FP0,X(a6)
MOVE.W XFRAC(a6),XDCARE(a6)
MOVE.L X(a6),D0
CMPI.L #0,D0
TST.L D0
BLE.W LP1NEG0 ...LOG OF ZERO OR -VE
CMP2.L BOUNDS2,D0
BCS.W LOGMAIN ...BOUNDS2 IS [1/2,3/2]
@ -598,7 +598,7 @@ KISZERO:
LP1NEG0:
*--FPCR SAVED. D0 IS X IN COMPACT FORM.
CMPI.L #0,D0
TST.L D0
BLT.B LP1NEG
LP1ZERO:
FMOVE.S negone,FP0

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@ -120,7 +120,7 @@ Scale DC.L $00010000,$80000000,$00000000,$00000000
xdef smod
smod:
Move.L #0,Mod_Flag(a6)
Clr.L Mod_Flag(a6)
BRA.B Mod_Rem
xdef srem
@ -274,7 +274,7 @@ R_LT_Y:
Add.L D3,D3 ...Q := 2Q
Add.L D2,D2 ...lo(R) = 2lo(R)
RoXL.L #1,D1 ...hi(R) = 2hi(R) + carry
AddX.L D1,D1 ...hi(R) = 2hi(R) + carry
SCS D6 ...set Carry if 2(R) overflows
AddQ.L #1,A1 ...k := k+1
SubQ.L #1,D0 ...j := j - 1
@ -344,7 +344,7 @@ No_Scale:
Move.W D6,Y(a6)
Move.L D4,Y_Hi(a6)
Move.L D5,Y_Lo(a6)
Move.L #0,Sc_Flag(a6)
Clr.L Sc_Flag(a6)
*
@ -424,7 +424,7 @@ Q_Big:
Set_R_0:
FMove.S #:00000000,fp0
Move.L #0,Sc_Flag(a6)
Clr.L Sc_Flag(a6)
BRA.W Fix_Sign
Tie_Case:

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@ -192,7 +192,7 @@ scosd:
xdef ssin
ssin:
*--SET ADJN TO 0
MOVE.L #0,ADJN(a6)
CLR.L ADJN(a6)
BRA.B SINBGN
xdef scos
@ -248,7 +248,7 @@ SINCONT:
MOVE.L N(a6),D0
ADD.L ADJN(a6),D0 ...SEE IF D0 IS ODD OR EVEN
ROR.L #1,D0 ...D0 WAS ODD IFF D0 IS NEGATIVE
CMPI.L #0,D0
TST.L D0
BLT.W COSPOLY
SINPOLY:
@ -379,11 +379,11 @@ SINBORS:
SINSM:
MOVE.L ADJN(a6),D0
CMPI.L #0,D0
TST.L D0
BGT.B COSTINY
SINTINY:
MOVE.W #$0000,XDCARE(a6) ...JUST IN CASE
CLR.W XDCARE(a6) ...JUST IN CASE
FMOVE.L d1,FPCR ;restore users exceptions
FMOVE.X X(a6),FP0 ;last inst - possible exception set
bra t_frcinx
@ -444,7 +444,7 @@ LOOP:
BLE.B LASTLOOP
CONTLOOP:
SUBI.L #27,D0 ...D0 IS L := K-27
MOVE.L #0,ENDFLAG(a6)
CLR.L ENDFLAG(a6)
BRA.B WORK
LASTLOOP:
CLR.L D0 ...D0 IS L := 0
@ -524,7 +524,7 @@ WORK:
*--|r| <= half ulp of R.
FAdd.X FP1,FP0 ...FP0 is R := A+a
*--No need to calculate r if this is the last loop
CMPI.L #0,D0
TST.L D0
BGT.W RESTORE
*--Need to calculate r
@ -601,7 +601,7 @@ SCCONT:
MOVE.L N(a6),D0
ROR.L #1,D0
CMPI.L #0,D0 ...D0 < 0 IFF N IS ODD
TST.L D0 ...D0 < 0 IFF N IS ODD
BGE.W NEVEN
NODD:
@ -754,7 +754,7 @@ SCBORS:
SCSM:
MOVE.W #$0000,XDCARE(a6)
CLR.W XDCARE(a6)
FMOVE.S #:3F800000,FP1
move.l d1,-(sp) ;save users mode & precision

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@ -138,7 +138,7 @@ SINHBIG:
bgt t_ovfl
FABS.X FP0
FSUB.D T1(pc),FP0 ...(|X|-16381LOG2_LEAD)
move.l #0,-(sp)
clr.l -(sp)
move.l #$80000000,-(sp)
move.l a1,d0
AND.L #$80000000,D0

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@ -232,7 +232,7 @@ TANMAIN:
TANCONT:
CMPI.L #0,D0
TST.L D0
BLT.W NODD
FMOVE.X FP0,FP1
@ -375,7 +375,7 @@ LOOP:
BLE.B LASTLOOP
CONTLOOP:
SUBI.L #27,D0 ...D0 IS L := K-27
MOVE.L #0,ENDFLAG(a6)
CLR.L ENDFLAG(a6)
BRA.B WORK
LASTLOOP:
CLR.L D0 ...D0 IS L := 0
@ -455,7 +455,7 @@ WORK:
*--|r| <= half ulp of R.
FAdd.X FP1,FP0 ...FP0 is R := A+a
*--No need to calculate r if this is the last loop
CMPI.L #0,D0
TST.L D0
BGT.W RESTORE
*--Need to calculate r

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@ -184,7 +184,7 @@ TANHBORS:
bra t_frcinx
TANHSM:
MOVE.W #$0000,XDCARE(a6)
CLR.W XDCARE(a6)
FMOVE.L d1,FPCR ;restore users exceptions
FMOVE.X X(a6),FP0 ;last inst - possible exception set

View File

@ -66,7 +66,7 @@ sto_cos:
fmovem.x (a7)+,d0
rts
c_fp0123:
cmpi.b #0,d0
tst.b d0
beq.b c_is_fp0
cmpi.b #1,d0
beq.b c_is_fp1
@ -99,7 +99,7 @@ sto_res:
fmovem.x (a7)+,d0
rts
fp0123:
cmpi.b #0,d0
tst.b d0
beq.b is_fp0
cmpi.b #1,d0
beq.b is_fp1

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@ -310,7 +310,7 @@ EXPBIG:
*--|X| IS LARGE, GENERATE OVERFLOW IF X > 0; ELSE GENERATE UNDERFLOW
*--REGISTERS SAVE SO FAR ARE FPCR AND D0
MOVE.L X(a6),D0
CMPI.L #0,D0
TST.L D0
BLT.B EXPNEG
bclr.b #7,(a0) ;t_ovfl expects positive value

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@ -328,7 +328,7 @@ error:
*
get_fline:
move.l USER_FPIAR(a6),a0 ;opcode address
move.l #0,-(a7) ;reserve a word on the stack
clr.l -(a7) ;reserve a word on the stack
lea.l 2(a7),a1 ;point to low word of temporary
move.l #2,d0 ;count
bsr.l mem_read
@ -431,7 +431,7 @@ unff_dbl:
* Force extended
*
unf_fsgl:
move.l #0,d0
clr.l d0
rts
*
* Get rounding precision set in FPCR{7:6}.

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@ -105,7 +105,7 @@ fpsp_operr:
*
move.l CMDREG1B(a6),d0
bfextu d0{3:3},d0 ;0=long, 4=word, 6=byte
cmpi.b #0,d0 ;determine size; check long
tst.b d0 ;determine size; check long
beq.w operr_long
cmpi.b #4,d0 ;check word
beq.w operr_word

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@ -168,7 +168,7 @@ move_out:
move.l EXC_EA(a6),a0 ;get <ea> from exc frame
bfextu CMDREG1B(a6){3:3},d0 ;move rx field to d0{2:0}
cmpi.l #0,d0 ;check for long
tst.l d0 ;check for long
beq.b sto_long ;branch if move_out long
cmpi.l #4,d0 ;check for word

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@ -112,7 +112,7 @@ opc011:
* ;ext=00, sgl=01, dbl=10
move.l a0,a1 ;save source addr in a1
move.l EXC_EA(a6),a0 ;get the address
cmpi.l #0,d0 ;if dest format is extended
tst.l d0 ;if dest format is extended
beq.w dest_ext ;then branch
cmpi.l #1,d0 ;if dest format is single
beq.b dest_sgl ;then branch

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@ -168,7 +168,7 @@ unf_res:
* ;1=sgl, 2=dbl
* ;we need the RND_PREC in the
* ;upper word for round
move.w #0,-(a7)
clr.w -(a7)
move.w d0,-(a7) ;copy RND_PREC to stack
*
*