122 lines
3.5 KiB
C
122 lines
3.5 KiB
C
/* $NetBSD: t_atomic_and.c,v 1.1 2019/02/17 12:24:17 isaki Exp $ */
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/*
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* Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__RCSID("$NetBSD: t_atomic_and.c,v 1.1 2019/02/17 12:24:17 isaki Exp $");
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#include <atf-c.h>
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#include <inttypes.h>
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#include <sys/atomic.h>
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/*
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* These tests don't examine the atomicity.
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*/
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#define DST (0x1122334455667788UL)
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#define SRC (0xf0f0f0f0f0f0f0f0UL)
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#define EXPECT (0x1020304050607080UL)
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/*
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* atomic_and_*()
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*/
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#define atf_and(NAME, TYPE, FMT) \
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ATF_TC(NAME); \
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ATF_TC_HEAD(NAME, tc) \
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{ \
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atf_tc_set_md_var(tc, "descr", #NAME); \
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} \
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ATF_TC_BODY(NAME, tc) \
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{ \
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volatile TYPE val; \
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TYPE src; \
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TYPE exp; \
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val = (TYPE)DST; \
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src = (TYPE)SRC; \
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exp = (TYPE)EXPECT; \
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NAME(&val, src); \
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ATF_REQUIRE_MSG(val == exp, \
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"val expects 0x%" FMT " but 0x%" FMT, exp, val); \
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}
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atf_and(atomic_and_32, uint32_t, PRIx32);
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atf_and(atomic_and_uint, unsigned int, "x");
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atf_and(atomic_and_ulong, unsigned long, "lx");
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#if defined(__HAVE_ATOMIC64_OPS)
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atf_and(atomic_and_64, uint64_t, PRIx64);
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#endif
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/*
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* atomic_and_*_nv()
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*/
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#define atf_and_nv(NAME, TYPE, FMT) \
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ATF_TC(NAME); \
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ATF_TC_HEAD(NAME, tc) \
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{ \
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atf_tc_set_md_var(tc, "descr", #NAME); \
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} \
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ATF_TC_BODY(NAME, tc) \
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{ \
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volatile TYPE val; \
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TYPE src; \
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TYPE res; \
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TYPE exp; \
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val = (TYPE)DST; \
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src = (TYPE)SRC; \
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exp = (TYPE)EXPECT; \
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res = NAME(&val, src); \
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ATF_REQUIRE_MSG(val == exp, \
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"val expects 0x%" FMT " but 0x%" FMT, exp, val); \
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ATF_REQUIRE_MSG(res == exp, \
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"res expects 0x%" FMT " but 0x%" FMT, exp, res); \
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}
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atf_and_nv(atomic_and_32_nv, uint32_t, PRIx32);
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atf_and_nv(atomic_and_uint_nv, unsigned int, "x");
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atf_and_nv(atomic_and_ulong_nv, unsigned long, "lx");
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#if defined(__HAVE_ATOMIC64_OPS)
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atf_and_nv(atomic_and_64_nv, uint64_t, PRIx64);
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#endif
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ATF_TP_ADD_TCS(tp)
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{
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ATF_TP_ADD_TC(tp, atomic_and_32);
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ATF_TP_ADD_TC(tp, atomic_and_uint);
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ATF_TP_ADD_TC(tp, atomic_and_ulong);
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#if defined(__HAVE_ATOMIC64_OPS)
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ATF_TP_ADD_TC(tp, atomic_and_64);
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#endif
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ATF_TP_ADD_TC(tp, atomic_and_32_nv);
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ATF_TP_ADD_TC(tp, atomic_and_uint_nv);
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ATF_TP_ADD_TC(tp, atomic_and_ulong_nv);
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#if defined(__HAVE_ATOMIC64_OPS)
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ATF_TP_ADD_TC(tp, atomic_and_64_nv);
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#endif
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return atf_no_error();
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}
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