115 lines
4.1 KiB
C
115 lines
4.1 KiB
C
/* $NetBSD: dmacvar.h,v 1.2 1999/03/16 16:30:17 minoura Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Minoura Makoto.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Hitachi HD63450 (= Motorola MC68450) DMAC driver for x68k.
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*/
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#include <dev/ic/mc68450reg.h>
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typedef int (*dmac_intr_handler_t) __P((void*));
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/*
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* Struct that holds the channel status.
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* Embedded in the device softc for each channel.
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*/
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struct dmac_channel_stat {
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int ch_channel; /* channel number */
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char ch_name[8]; /* user device name */
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bus_space_handle_t ch_bht; /* bus_space handle */
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int ch_dcr; /* device description */
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int ch_ocr; /* operation size, request mode */
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int ch_normalv; /* normal interrupt vector */
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int ch_errorv; /* error interrupt vector */
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dmac_intr_handler_t ch_normal; /* normal interrupt handler */
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dmac_intr_handler_t ch_error; /* error interrupt handler */
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void *ch_normalarg;
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void *ch_errorarg;
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struct dmac_dma_xfer *ch_xfer_in_progress;
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void *ch_map; /* transfer map for arraychain mode */
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struct device *ch_softc; /* device softc link */
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};
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/*
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* DMAC softc
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*/
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struct dmac_softc {
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struct device sc_dev;
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bus_space_tag_t sc_bst;
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bus_space_handle_t sc_bht;
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struct dmac_channel_stat sc_channels[DMAC_NCHAN];
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};
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/*
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* Structure that describes a single transfer.
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*/
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struct dmac_dma_xfer {
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struct dmac_channel_stat *dx_channel; /* channel structure */
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bus_dmamap_t dx_dmamap; /* dmamap tag */
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bus_dma_tag_t dx_tag; /* dma tag for the transfer */
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int dx_ocr; /* direction */
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int dx_scr; /* SCR value */
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void *dx_device; /* (initial) device address */
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int dx_done; /* transfer count */
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};
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#define DMAC_ADDR 0xe84000
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#define DMAC_MAXSEGSZ 0xff00
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#define DMAC_BOUNDARY 0
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struct dmac_channel_stat *dmac_alloc_channel __P((struct device*, int, char*,
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int,
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dmac_intr_handler_t, void*,
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int,
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dmac_intr_handler_t, void*));
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/* ch, name, normalv, normal, errorv, error */
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int dmac_free_channel __P((struct device*, int, void*));
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/* ch, channel */
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struct dmac_dma_xfer *dmac_prepare_xfer __P((struct dmac_channel_stat*,
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bus_dma_tag_t,
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bus_dmamap_t,
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int, int, void*));
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/* chan, dmat, map, dir, sequence, dar */
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#define dmac_finish_xfer(xfer) free(xfer, M_DEVBUF)
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int dmac_start_xfer __P((struct device*, struct dmac_dma_xfer*));
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