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Merged minoura_x68k_bus_h branch.

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This commit is contained in:
minoura 1999-03-16 16:30:16 +00:00
parent a7a759c81e
commit ba80d2c6d7
81 changed files with 6923 additions and 6171 deletions
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68
sys/arch/x68k/conf/ALL
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@ -1,4 +1,4 @@
# $NetBSD: ALL,v 1.26 1999/01/18 07:39:51 itohy Exp $
# $NetBSD: ALL,v 1.27 1999/03/16 16:30:16 minoura Exp $
#
# ALL -- everything that's currently supported
@ -27,7 +27,7 @@ options FPSP # floating point emulation for MC68040
options M060SP # int/fp emulation for MC68060
options JUPITER # support for "Jupiter-X" accelerator
options MAPPEDCOPY # use page mapping for large copyin/copyout
options EIOMAPSIZE=0 # do not map PCI address space
#options ZSCONSOLE,ZSCN_SPEED="9600" # use serial console
#### System options that are the same for all ports
@ -38,6 +38,7 @@ options EIOMAPSIZE=0 # do not map PCI address space
## automagically determined at boot time.
config netbsd root on ? type ?
#config netbsd root on sd0 type ffs
## RTC is offset from GMT; -540 means JST-9
options RTC_OFFSET=-540 # hardware clock is this many mins. west of GMT
@ -48,13 +49,13 @@ options KTRACE
## Collect statistics on kernel malloc's and free's. This does have a
## significant performance hit on slower machines, so it is intended for
## diagnostic use only.
#options KMEMSTATS
options KMEMSTATS
## System V compatible IPC subsystem. (msgctl(2), semctl(2), and shmctl(2))
options SYSVMSG # System V message queues
options SYSVSEM # System V semaphores
options SYSVSHM # System V shared memory
options SHMMAXPGS=1024 # 1024 pages is the default
#options SHMMAXPGS=1024 # 1024 pages is the default
## Loadable kernel module support
options LKM
@ -71,7 +72,7 @@ options LKM
## intercept. DDB_HISTORY_SIZE adds up/down arrow command history.
options DDB # kernel dynamic debugger
options DDB_HISTORY_SIZE=100 # enable history editing in DDB
options DDB_ONPANIC=1 # see also sysctl(8): `ddb.onpanic'
#options DDB_ONPANIC=1 # see also sysctl(8): `ddb.onpanic'
options PANICBUTTON # interrupt switch invokes DDB
## You may also use gdb, on another computer connected to this machine over
@ -156,16 +157,16 @@ options INET # IP (Internet Protocol) v4
options TCP_COMPAT_42 # 4.2BSD IP implementation compatibility
options GATEWAY # packet forwarding ("router switch")
options MROUTING # packet forwarding of multicast packets
options DIRECTED_BROADCAST # allow broadcasts through routers
#options DIRECTED_BROADCAST # allow broadcasts through routers
options NS # Xerox NS networking
#options NSIP # Xerox NS tunneling over IP
#options ISO,TPIP # OSI networking
#options EON # OSI tunneling over IP
options ISO,TPIP # OSI networking
options EON # OSI tunneling over IP
#options CCITT,LLC,HDLC # X.25 packet switched protocol
options NETATALK # AppleTalk (over Ethernet) protocol
options NTP # Network Time Protocol in-kernel support
#options PPS_SYNC # Add serial line synchronization for NTP
#options PFIL_HOOKS # Add pfil(9) hooks, intended for custom LKMs.
options PFIL_HOOKS # Add pfil(9) hooks, intended for custom LKMs.
options IPFILTER_LOG # Add ipmon(8) logging for ipfilter device
options PPP_BSDCOMP # Add BSD compression to ppp device
options PPP_DEFLATE # Add deflate (libz) compression to ppp device
@ -175,27 +176,35 @@ options PPP_FILTER # Add active filters for ppp (via bpf)
#### Device configurations
## Fundamental devices
mainbus0 at root # MANDATORY
## Fundamental devices; see also std.x68k
dmac0 at intio0 addr 0xe84000 # DMA controler
xel0 at intio0
opm0 at intio0 addr 0xe90000 # OPM: required for fdc
## Display devices and console
grfbus0 at mainbus0 # bitmapped displays
grf0 at grfbus0 # multiplane graphics
grf1 at grfbus0 # flexible graphics
kbd0 at mfp0 # standard keyboard
ite0 at grf0 # internal terminal emulator
pseudo-device kbd # standard keyboard
pseudo-device pow 2 # software power switch
#options ITE_KERNEL_ATTR=4 # bold for kernel messages
# see /sys/arch/x68k/dev/itevar.h
#!pow0 at mfp0 flags 0 # power switch status; intr enabled
#!pow1 at mfp0 flags 1 # power switch status; read only
pseudo-device pow 2 #! software power switch
## floppy disks
fdc0 at mainbus0 # floppy controller
fdc0 at intio0 addr 0xe94000 intr 96 dma 0 dmaintr 100 # floppy controler
fd* at fdc0 unit ? # builtin floppy drives
## SCSI devices
spc0 at mainbus0 # builtin scsi
spc1 at mainbus0 # external scsi
scsirom0 at intio0 addr 0xfc0000 # Built-in SCSI BIOS
scsirom1 at intio0 addr 0xea0020 # External SCSI BIOS
spc0 at scsirom0 # genuin SCSI
spc1 at scsirom1 # genuin SCSI
scsibus* at spc?
mha0 at mainbus0 # MK-HA1 mach-2 SCSI
mha0 at scsirom1 # Mankai MK-HA1 (Mach-2)
scsibus* at mha0
sd* at scsibus? target ? lun ? # SCSI disks
@ -206,29 +215,30 @@ ch* at scsibus? target ? lun ? # SCSI changer devices
uk* at scsibus? target ? lun ? # SCSI unknown devices
## Serial ports
zsc0 at mainbus0
zsc0 at intio0 addr 0xe98000 intr 112
zstty0 at zsc0 channel 0 # built-in RS-232C
ms0 at zsc0 channel 1 # standard mouse
zsc1 at mainbus0
zsc1 at intio0 addr 0xeafc00 intr 113
zstty2 at zsc1 channel 0
zstty3 at zsc1 channel 1
zsc2 at mainbus0
zsc2 at intio0 addr 0xeafc10 intr 114
zstty4 at zsc2 channel 0
zstty5 at zsc2 channel 1
pseudo-device sram #! battery-backuped static RAM
pseudo-device bell #! OPM bell
xcom0 at mainbus0 # NS16550 fast serial
xcom1 at mainbus0
pseudo-device sram # battery-backuped static RAM
pseudo-device bell # OPM bell
## Audio device; broken
#okiadpcm0 at mainbus0
## Audio device
#okiadpcm0 at intio0 addr 0xe92000 intr 106 errintr 107 dma 3
#audio* at okiadpcm*
## Network interfaces
ed0 at mainbus0 # Neptune-X
neptune0 at intio0 addr 0xece000 intr 249 # Neptune-X
neptune1 at intio0 addr 0xece400 intr 249 # Neptune-X at alt. addr.
ne0 at neptune? addr 0x300 # NE2000 or clone
#se0 at scsibus? target ? lun ? # Ether+; not supported
@ -251,7 +261,7 @@ pseudo-device raid 4
## Memory disk device, used on boot floppies with compressed
## kernel-plus-root-disk images.
pseudo-device md 1
#pseudo-device md 1
## Loopback network interface; required
pseudo-device loop
@ -286,7 +296,7 @@ pseudo-device ipfilter
## number still requires you to run /dev/MAKEDEV to create the files
## for the ptys.
pseudo-device pty 64 # pseudo-ttys (for network, etc.)
pseudo-device pty 32 # pseudo-ttys (for network, etc.)
## Random device, used to implement /dev/random (a source of random noise),
## and generate randomness for some kernel formulae.

68
sys/arch/x68k/conf/GENERIC
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@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.27 1999/01/18 07:39:51 itohy Exp $
# $NetBSD: GENERIC,v 1.28 1999/03/16 16:30:16 minoura Exp $
#
# GENERIC
@ -27,7 +27,7 @@ options FPSP # floating point emulation for MC68040
options M060SP # int/fp emulation for MC68060
options JUPITER # support for "Jupiter-X" accelerator
options MAPPEDCOPY # use page mapping for large copyin/copyout
options EIOMAPSIZE=0 # do not map PCI address space
#options ZSCONSOLE,ZSCN_SPEED="9600" # use serial console
#### System options that are the same for all ports
@ -38,6 +38,7 @@ options EIOMAPSIZE=0 # do not map PCI address space
## automagically determined at boot time.
config netbsd root on ? type ?
#config netbsd root on sd0 type ffs
## RTC is offset from GMT; -540 means JST-9
options RTC_OFFSET=-540 # hardware clock is this many mins. west of GMT
@ -57,7 +58,7 @@ options SYSVSHM # System V shared memory
#options SHMMAXPGS=1024 # 1024 pages is the default
## Loadable kernel module support
options LKM
#options LKM
## NFS boot options; not supported currently: needs nfsboot program
#options NFS_BOOT_BOOTPARAM
@ -69,10 +70,10 @@ options LKM
## The DDB in-kernel debugger runs at panic (unless DDB_ONPANIC=0), or at
## serial console break or keyboard reset, where the PROM would normally
## intercept. DDB_HISTORY_SIZE adds up/down arrow command history.
options DDB # kernel dynamic debugger
options DDB_HISTORY_SIZE=100 # enable history editing in DDB
options DDB_ONPANIC=1 # see also sysctl(8): `ddb.onpanic'
options PANICBUTTON # interrupt switch invokes DDB
#options DDB # kernel dynamic debugger
#options DDB_HISTORY_SIZE=100 # enable history editing in DDB
#options DDB_ONPANIC=1 # see also sysctl(8): `ddb.onpanic'
#options PANICBUTTON # interrupt switch invokes DDB
## You may also use gdb, on another computer connected to this machine over
## a serial port. Both KGDBDEV and KGDBRATE should be specified; KGDBDEV is
@ -166,7 +167,7 @@ options NETATALK # AppleTalk (over Ethernet) protocol
options NTP # Network Time Protocol in-kernel support
#options PPS_SYNC # Add serial line synchronization for NTP
#options PFIL_HOOKS # Add pfil(9) hooks, intended for custom LKMs.
#options IPFILTER_LOG # Add ipmon(8) logging for ipfilter device
options IPFILTER_LOG # Add ipmon(8) logging for ipfilter device
#options PPP_BSDCOMP # Add BSD compression to ppp device
#options PPP_DEFLATE # Add deflate (libz) compression to ppp device
#options PPP_FILTER # Add active filters for ppp (via bpf)
@ -175,60 +176,69 @@ options NTP # Network Time Protocol in-kernel support
#### Device configurations
## Fundamental devices
mainbus0 at root # MANDATORY
## Fundamental devices; see also std.x68k
dmac0 at intio0 addr 0xe84000 # DMA controler
xel0 at intio0
opm0 at intio0 addr 0xe90000 # OPM: required for fdc
## Display devices and console
grfbus0 at mainbus0 # bitmapped displays
grf0 at grfbus0 # multiplane graphics
grf1 at grfbus0 # flexible graphics
kbd0 at mfp0 # standard keyboard
ite0 at grf0 # internal terminal emulator
pseudo-device kbd # standard keyboard
pseudo-device pow 2 # software power switch
#options ITE_KERNEL_ATTR=4 # bold for kernel messages
# see /sys/arch/x68k/dev/itevar.h
#!pow0 at mfp0 flags 0 # power switch status; intr enabled
#!pow1 at mfp0 flags 1 # power switch status; read only
pseudo-device pow 2 #! software power switch
## floppy disks
fdc0 at mainbus0 # floppy controller
fdc0 at intio0 addr 0xe94000 intr 96 dma 0 dmaintr 100 # floppy controler
fd* at fdc0 unit ? # builtin floppy drives
## SCSI devices
spc0 at mainbus0 # builtin scsi
spc1 at mainbus0 # external scsi
scsirom0 at intio0 addr 0xfc0000 # Built-in SCSI BIOS
scsirom1 at intio0 addr 0xea0020 # External SCSI BIOS
spc0 at scsirom0 # genuin SCSI
spc1 at scsirom1 # genuin SCSI
scsibus* at spc?
mha0 at mainbus0 # MK-HA1 mach-2 SCSI
mha0 at scsirom1 # Mankai MK-HA1 (Mach-2)
scsibus* at mha0
sd* at scsibus? target ? lun ? # SCSI disks
cd* at scsibus? target ? lun ? # SCSI CD-ROMs
st* at scsibus? target ? lun ? # SCSI tapes
#ss* at scsibus? target ? lun ? # SCSI scanners
#ch* at scsibus? target ? lun ? # SCSI changer devices
ch* at scsibus? target ? lun ? # SCSI changer devices
#uk* at scsibus? target ? lun ? # SCSI unknown devices
## Serial ports
zsc0 at mainbus0
zsc0 at intio0 addr 0xe98000 intr 112
zstty0 at zsc0 channel 0 # built-in RS-232C
ms0 at zsc0 channel 1 # standard mouse
#zsc1 at mainbus0
#zsc1 at intio0 addr 0xeafc00 intr 113
#zstty2 at zsc1 channel 0
#zstty3 at zsc1 channel 1
#zsc2 at mainbus0
#zsc2 at intio0 addr 0xeafc10 intr 114
#zstty4 at zsc2 channel 0
#zstty5 at zsc2 channel 1
#xcom0 at mainbus0 # NS16550 fast serial
#xcom1 at mainbus0
pseudo-device sram #! battery-backuped static RAM
pseudo-device bell #! OPM bell
pseudo-device sram # battery-backuped static RAM
pseudo-device bell # OPM bell
xcom0 at mainbus0 # NS16550 fast serial
xcom1 at mainbus0
## Audio device; broken
#okiadpcm0 at mainbus0
## Audio device
#okiadpcm0 at intio0 addr 0xe92000 intr 106 errintr 107 dma 3
#audio* at okiadpcm*
## Network interfaces
ed0 at mainbus0 # Neptune-X
neptune0 at intio0 addr 0xece000 intr 249 # Neptune-X
neptune1 at intio0 addr 0xece400 intr 249 # Neptune-X at alt. addr.
ne0 at neptune? addr 0x300 # NE2000 or clone
#se0 at scsibus? target ? lun ? # Ether+; not supported
@ -242,7 +252,7 @@ pseudo-device vnd 4
## Concatenated and striped disks; with this, you can create a software-based
## disk array similar to a "RAID 0" setup. See ccd(4).
pseudo-device ccd 4
#pseudo-device ccd 4
## RAIDframe disk driver: software RAID driver. See raid(4).

59
sys/arch/x68k/conf/INSTALL
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@ -1,4 +1,4 @@
# $NetBSD: INSTALL,v 1.8 1999/01/18 07:39:51 itohy Exp $
# $NetBSD: INSTALL,v 1.9 1999/03/16 16:30:16 minoura Exp $
#
# INSTALL -- installation kernel.
@ -6,7 +6,7 @@
include "arch/x68k/conf/std.x68k"
maxusers 16
maxusers 8
## Enable the hooks used for initializing the memory-disk.
options MEMORY_DISK_HOOKS
@ -27,14 +27,14 @@ options M68060
#### System options specific to the x68k port
#options UVM # new virtual memory system
options UVM # new virtual memory system
#options MACHINE_NONCONTIG # support for noncontiguous memory
options FPU_EMULATE # software fpu emulation for MC68030
options FPSP # floating point emulation for MC68040
options M060SP # int/fp emulation for MC68060
options JUPITER # support for "Jupiter-X" accelerator
options MAPPEDCOPY # use page mapping for large copyin/copyout
options EIOMAPSIZE=0 # do not map PCI address space
#options ZSCONSOLE,ZSCN_SPEED="9600" # use serial console
#### System options that are the same for all ports
@ -180,27 +180,34 @@ options TCP_COMPAT_42 # 4.2BSD IP implementation compatibility
#### Device configurations
## Fundamental devices
mainbus0 at root # MANDATORY
## Fundamental devices; see also std.x68k
dmac0 at intio0 addr 0xe84000 # DMA controler
xel0 at intio0
opm0 at intio0 addr 0xe90000 # OPM: required for fdc
## Display devices and console
grfbus0 at mainbus0 # bitmapped displays
grf0 at grfbus0 # multiplane graphics
#grf1 at grfbus0 # flexible graphics
kbd0 at mfp0 # standard keyboard
ite0 at grf0 # internal terminal emulator
pseudo-device kbd # standard keyboard
#pseudo-device pow 2 # software power switch
#options ITE_KERNEL_ATTR=4 # bold for kernel messages
# see /sys/arch/x68k/dev/itevar.h
#!pow0 at mfp0 flags 0 # power switch status; intr enabled
#!pow1 at mfp0 flags 1 # power switch status; read only
pseudo-device pow 2 #! software power switch
## floppy disks
fdc0 at mainbus0 # floppy controller
fdc0 at intio0 addr 0xe94000 intr 96 dma 0 dmaintr 100 # floppy controler
fd* at fdc0 unit ? # builtin floppy drives
## SCSI devices
spc0 at mainbus0 # builtin scsi
spc1 at mainbus0 # external scsi
scsirom0 at intio0 # SCSI BIOS
scsirom1 at intio0 # SCSI BIOS
spc* at scsirom? # genuin SCSI
scsibus* at spc?
mha0 at mainbus0 # MK-HA1 mach-2 SCSI
mha0 at scsirom? # Mankai MK-HA1 (Mach-2)
scsibus* at mha0
sd* at scsibus? target ? lun ? # SCSI disks
@ -211,29 +218,30 @@ st* at scsibus? target ? lun ? # SCSI tapes
#uk* at scsibus? target ? lun ? # SCSI unknown devices
## Serial ports
zsc0 at mainbus0
zsc0 at intio0 addr 0xe98000 intr 112
zstty0 at zsc0 channel 0 # built-in RS-232C
#ms0 at zsc0 channel 1 # standard mouse
#zsc1 at mainbus0
#zsc1 at intio0 addr 0xeafc00 intr 113
#zstty2 at zsc1 channel 0
#zstty3 at zsc1 channel 1
#zsc2 at mainbus0
#zsc2 at intio0 addr 0xeafc10 intr 114
#zstty4 at zsc2 channel 0
#zstty5 at zsc2 channel 1
pseudo-device sram #! battery-backuped static RAM
pseudo-device bell #! OPM bell
#xcom0 at mainbus0 # NS16550 fast serial
#xcom1 at mainbus0
#pseudo-device sram # battery-backuped static RAM
#pseudo-device bell # OPM bell
## Audio device; broken
#okiadpcm0 at mainbus0
#okiadpcm0 at intio0 addr 0xe92000 intr 106 errintr 107 dma 3
#audio* at okiadpcm*
## Network interfaces
ed0 at mainbus0 # Neptune-X
neptune0 at intio0 addr 0xece000 intr 249 # Neptune-X
neptune1 at intio0 addr 0xece400 intr 249 # Neptune-X at alt. addr.
ne0 at neptune? addr 0x300 # NE2000 or clone
#se0 at scsibus? target ? lun ? # Ether+; not supported
@ -247,7 +255,11 @@ pseudo-device vnd 4
## Concatenated and striped disks; with this, you can create a software-based
## disk array similar to a "RAID 0" setup. See ccd(4).
pseudo-device ccd 4
#pseudo-device ccd 4
## RAIDframe disk driver: software RAID driver. See raid(4).
#pseudo-device raid 4
## Memory disk device, used on boot floppies with compressed
## kernel-plus-root-disk images.
@ -267,6 +279,9 @@ pseudo-device ppp 1
## This is used by the third-party user-mode "ppp" program, and others.
#pseudo-device tun 4
## Generic L3 over IP tunnel
#pseudo-device gre 2 # generic L3 over IP tunnel
## Berkeley Packet Filter, required to run RARPD. A generic C-language
## interface that allows selective examining of incoming packets.
#pseudo-device bpfilter 8

2
sys/arch/x68k/conf/Makefile.x68k
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@ -1,4 +1,4 @@
# $NetBSD: Makefile.x68k,v 1.32 1999/01/15 23:37:07 thorpej Exp $
# $NetBSD: Makefile.x68k,v 1.33 1999/03/16 16:30:16 minoura Exp $
# Makefile for NetBSD
#

46
sys/arch/x68k/conf/SMALL
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@ -1,4 +1,4 @@
# $NetBSD: SMALL,v 1.13 1999/01/18 07:39:51 itohy Exp $
# $NetBSD: SMALL,v 1.14 1999/03/16 16:30:17 minoura Exp $
#
# SMALL -- works with a small memory, e.g. 4MB
@ -27,8 +27,8 @@ options FPSP # floating point emulation for MC68040
options M060SP # int/fp emulation for MC68060
options JUPITER # support for "Jupiter-X" accelerator
options MAPPEDCOPY # use page mapping for large copyin/copyout
options EIOMAPSIZE=0 # do not map PCI address space
options BUFCACHE=5 # use this % of the memory for buffer cache
#options ZSCONSOLE,ZSCN_SPEED="9600" # use serial console
#### System options that are the same for all ports
@ -176,27 +176,34 @@ options TCP_COMPAT_42 # 4.2BSD IP implementation compatibility
#### Device configurations
## Fundamental devices
mainbus0 at root # MANDATORY
## Fundamental devices; see also std.x68k
dmac0 at intio0 addr 0xe84000 # DMA controler
xel0 at intio0
opm0 at intio0 addr 0xe90000 # OPM: required for fdc
## Display devices and console
grfbus0 at mainbus0 # bitmapped displays
grf0 at grfbus0 # multiplane graphics
grf1 at grfbus0 # flexible graphics
kbd0 at mfp0 # standard keyboard
ite0 at grf0 # internal terminal emulator
pseudo-device kbd # standard keyboard
pseudo-device pow 2 # software power switch
#options ITE_KERNEL_ATTR=4 # bold for kernel messages
# see /sys/arch/x68k/dev/itevar.h
#!pow0 at mfp0 flags 0 # power switch status; intr enabled
#!pow1 at mfp0 flags 1 # power switch status; read only
pseudo-device pow 2 #! software power switch
## floppy disks
fdc0 at mainbus0 # floppy controller
fdc0 at intio0 addr 0xe94000 intr 96 dma 0 dmaintr 100 # floppy controler
fd* at fdc0 unit ? # builtin floppy drives
## SCSI devices
spc0 at mainbus0 # builtin scsi
spc1 at mainbus0 # external scsi
scsirom0 at intio0 # SCSI BIOS
scsirom1 at intio0 # SCSI BIOS
spc* at scsirom? # genuin SCSI
scsibus* at spc?
mha0 at mainbus0 # MK-HA1 mach-2 SCSI
mha0 at scsirom? # Mankai MK-HA1 (Mach-2)
scsibus* at mha0
sd* at scsibus? target ? lun ? # SCSI disks
@ -207,29 +214,28 @@ st* at scsibus? target ? lun ? # SCSI tapes
#uk* at scsibus? target ? lun ? # SCSI unknown devices
## Serial ports
zsc0 at mainbus0
zsc0 at intio0 addr 0xe98000 intr 112
zstty0 at zsc0 channel 0 # built-in RS-232C
#ms0 at zsc0 channel 1 # standard mouse
#zsc1 at mainbus0
#zsc1 at intio0 addr 0xeafc00 intr 113
#zstty2 at zsc1 channel 0
#zstty3 at zsc1 channel 1
#zsc2 at mainbus0
#zsc2 at intio0 addr 0xeafc10 intr 114
#zstty4 at zsc2 channel 0
#zstty5 at zsc2 channel 1
#xcom0 at mainbus0 # NS16550 fast serial
#xcom1 at mainbus0
pseudo-device sram # battery-backuped static RAM
pseudo-device bell # OPM bell
pseudo-device sram #! battery-backuped static RAM
pseudo-device bell #! OPM bell
## Audio device; broken
#okiadpcm0 at mainbus0
#okiadpcm0 at intio0 addr 0xe92000 intr 106 errintr 107 dma 3
#audio* at okiadpcm*
## Network interfaces
ed0 at mainbus0 # Neptune-X
neptune0 at intio0 addr 0xece000 intr 249 # Neptune-X
neptune1 at intio0 addr 0xece400 intr 249 # Neptune-X at alt. addr.
ne0 at neptune? addr 0x300 # NE2000 or clone
#se0 at scsibus? target ? lun ? # Ether+; not supported

307
sys/arch/x68k/conf/TOKOCHAN Normal file
View File

@ -0,0 +1,307 @@
# $NetBSD: TOKOCHAN,v 1.1 1999/03/16 16:30:17 minoura Exp $
#
# TOKOCHAN -- Believe in the BSD power; Toko to issyo-ni make all!
#
include "arch/x68k/conf/std.x68k"
maxusers 10
## System kernel configuration. See options(4) for more detail.
## Options for variants of the m68k MPU
## you must have at least the correct one; REQUIRED
options M68030
options M68040
#options M68060
#### System options specific to the x68k port
options UVM # new virtual memory system
#options MACHINE_NONCONTIG # support for noncontiguous memory
#options FPU_EMULATE # software fpu emulation for MC68030
options FPSP # floating point emulation for MC68040
#options M060SP # int/fp emulation for MC68060
#options JUPITER # support for "Jupiter-X" accelerator
options MAPPEDCOPY # use page mapping for large copyin/copyout
#options ZSCONSOLE,ZSCN_SPEED="9600" # use serial console
#### System options that are the same for all ports
## Root device configuration: change the ?'s if you are going to use a
## nonstandard root partition (other than where the kernel is booted from)
## and/or nonstandard root type (not ffs or nfs). Normally this can be
## automagically determined at boot time.
config netbsd root on ? type ?
#config netbsd root on sd0 type ffs
## RTC is offset from GMT; -540 means JST-9
options RTC_OFFSET=-540 # hardware clock is this many mins. west of GMT
## System call tracing (see ktrace(1)).
options KTRACE
## Collect statistics on kernel malloc's and free's. This does have a
## significant performance hit on slower machines, so it is intended for
## diagnostic use only.
#options KMEMSTATS
## System V compatible IPC subsystem. (msgctl(2), semctl(2), and shmctl(2))
options SYSVMSG # System V message queues
options SYSVSEM # System V semaphores
options SYSVSHM # System V shared memory
options SHMMAXPGS=2048 # 1024 pages is the default
## Loadable kernel module support
#options LKM
## NFS boot options; not supported currently: needs nfsboot program
#options NFS_BOOT_BOOTPARAM
#options NFS_BOOT_BOOTP
#options NFS_BOOT_DHCP
#### Debugging options
## The DDB in-kernel debugger runs at panic (unless DDB_ONPANIC=0), or at
## serial console break or keyboard reset, where the PROM would normally
## intercept. DDB_HISTORY_SIZE adds up/down arrow command history.
options DDB # kernel dynamic debugger
options DDB_HISTORY_SIZE=100 # enable history editing in DDB
options DDB_ONPANIC=0 # see also sysctl(8): `ddb.onpanic'
options PANICBUTTON # interrupt switch invokes DDB
## You may also use gdb, on another computer connected to this machine over
## a serial port. Both KGDBDEV and KGDBRATE should be specified; KGDBDEV is
## a dev_t encoded device number of the serial port to use.
## KGDB is not supported for now.
#options KGDB # support for kernel gdb
#options KGDBDEV=0xc00 # kgdb device number
#options KGDBRATE=9600 # baud rate
## Compile the kernel with debugging symbols (`netbsd.gdb' is the debug file),
## such that gdb(1) can be used on a kernel coredump.
makeoptions DEBUG="-pipe" # path -pipe option to CC
## Adds code to the kernel that does internal consistency checks, and will
## cause the kernel to panic if corruption of internal data structures
## is detected.
#options DIAGNOSTIC # extra kernel sanity checking
## Enable (possibly expensive) debugging code that may also display messages
## on the system console
#options DEBUG
## Make SCSI error messages more verbose when explaining their meanings.
options SCSIVERBOSE
## `INSECURE' turns off the kernel security level (securelevel = 0 always).
## This allows writing to /dev/mem, loading kernel modules while multi-user,
## and other insecurities good only for development work. Do not use this
## option on a production machine.
#options INSECURE
## Allow non-root users to grab /dev/console with programs such as xconsole.
## `xconsole' therefore does not need setuid root with this option enabled.
options UCONSOLE
## `FDSCRIPTS' allows non-readable but executable scripts by providing a
## pre-opened opaque file to the script interpreter. `SETUIDSCRIPTS',
## which implies FDSCRIPTS, allows scripts to be set-user-id using the same
## opaque file mechanism. Perl calls this "secure setuid scripts."
#options FDSCRIPTS
options SETUIDSCRIPTS
## Options for compatibility with previous releases foreign system binaries.
options COMPAT_43 # 4.3BSD system interfaces
#options COMPAT_09 # NetBSD 0.9 binary compatibility
#options COMPAT_10 # NetBSD 1.0 binary compatibility
#options COMPAT_11 # NetBSD 1.1 binary compatibility
#options COMPAT_12 # NetBSD 1.2 binary compatibility
options COMPAT_13 # NetBSD 1.3 binary compatibility
#options COMPAT_M68K4K # NetBSD/m68k4k binaries
#options COMPAT_SUNOS # SunOS 4.x binary compatibility; broken
#options COMPAT_LINUX # Linux/m68k binary compatibility
#options EXEC_ELF32 # 32-bit ELF executables (Linux)
## File systems.
file-system FFS # Berkeley Fast Filesystem
file-system NFS # Sun NFS-compatible filesystem client
file-system KERNFS # kernel data-structure filesystem
#file-system NULLFS # NULL layered filesystem
file-system MFS # memory-based filesystem
#file-system FDESC # user file descriptor filesystem
#file-system UMAPFS # uid/gid remapping filesystem
#file-system LFS # Log-based filesystem (still experimental)
#file-system PORTAL # portal filesystem (still experimental)
file-system PROCFS # /proc
file-system CD9660 # ISO 9660 + Rock Ridge file system
file-system UNION # union file system
file-system MSDOSFS # MS-DOS FAT filesystem(s).
#file-system ADOSFS # AmigaDOS filesystem
## File system options.
options NFSSERVER # Sun NFS-compatible filesystem server
#options QUOTA # FFS quotas
#options FFS_EI # FFS Endian Independent support
## Network protocol support. In most environments, INET is required.
options INET # IP (Internet Protocol) v4
#options TCP_COMPAT_42 # 4.2BSD IP implementation compatibility
#options GATEWAY # packet forwarding ("router switch")
#options MROUTING # packet forwarding of multicast packets
#options DIRECTED_BROADCAST # allow broadcasts through routers
#options NS # Xerox NS networking
#options NSIP # Xerox NS tunneling over IP
#options ISO,TPIP # OSI networking
#options EON # OSI tunneling over IP
#options CCITT,LLC,HDLC # X.25 packet switched protocol
#options NETATALK # AppleTalk (over Ethernet) protocol
options NTP # Network Time Protocol in-kernel support
#options PPS_SYNC # Add serial line synchronization for NTP
#options PFIL_HOOKS # Add pfil(9) hooks, intended for custom LKMs.
options IPFILTER_LOG # Add ipmon(8) logging for ipfilter device
#options PPP_BSDCOMP # Add BSD compression to ppp device
#options PPP_DEFLATE # Add deflate (libz) compression to ppp device
#options PPP_FILTER # Add active filters for ppp (via bpf)
options BUFCACHE=20 # 20% of real memory as buffer cache
options NVNODE=1024 # 'make build' requires huge vnode table
options MSGBUFSIZE=32768 # increase msgbuf to preserve debug messages
#options NKMEMCLUSTERS=1536 # 6MB kernel vm
#options EXPORTMFS # NFS export /tmp
#### Device configurations
## Fundamental devices; see also std.x68k
dmac0 at intio0 # DMA controler
#xel0 at intio0 # Xellent
opm0 at intio0 # OPM: required for fdc
## Display devices and console
grfbus0 at mainbus0 # bitmapped displays
grf0 at grfbus0 # multiplane graphics
grf1 at grfbus0 # flexible graphics
kbd0 at mfp0 # standard keyboard
ite0 at grf0 # internal terminal emulator
options ITE_KERNEL_ATTR=4 # bold for kernel messages
# see /sys/arch/x68k/dev/itevar.h
pseudo-device pow 2 # software power switch
## floppy disks
fdc0 at intio0 # floppy controler
fd* at fdc0 unit ? # builtin floppy drives
## SCSI devices
scsirom0 at intio0
scsirom1 at intio0
spc* at scsirom? # genuin SCSI
scsibus* at spc?
mha0 at scsirom? # Mankai MK-HA1 (Mach-2)
scsibus* at mha0
sd* at scsibus? target ? lun ? # SCSI disks
cd* at scsibus? target ? lun ? # SCSI CD-ROMs
#st* at scsibus? target ? lun ? # SCSI tapes
#ss* at scsibus? target ? lun ? # SCSI scanners
#ch* at scsibus? target ? lun ? # SCSI changer devices
#uk* at scsibus? target ? lun ? # SCSI unknown devices
## Serial ports
zsc0 at intio0 addr 0xe98000 intr 112
zstty0 at zsc0 channel 0 # built-in RS-232C
ms0 at zsc0 channel 1 # standard mouse
#zsc1 at intio0 addr 0xeafc00 intr 113
#zstty2 at zsc1 channel 0
#zstty3 at zsc1 channel 1
#zsc2 at intio0 addr 0xeafc10 intr 114
#zstty4 at zsc2 channel 0
#zstty5 at zsc2 channel 1
pseudo-device sram # battery-backuped static RAM
pseudo-device bell # OPM bell
#xcom0 at mainbus0 # NS16550 fast serial
#xcom1 at mainbus0
## Audio device; broken
#okiadpcm0 at intio0 addr 0xe92000 intr 106 errintr 107 dma 3
#audio* at okiadpcm*
## Network interfaces
neptune0 at intio0 addr 0xece000 intr 249 # Neptune-X
neptune1 at intio0 addr 0xece400 intr 249 # Neptune-X at alt. addr.
ne0 at neptune? addr 0x300 # NE2000 or clone
#se0 at scsibus? target ? lun ? # Ether+; broken
#### Pseudo devices
## A disk-like interface to files. Can be used to create floppy, CD,
## miniroot images, etc.
pseudo-device vnd 4
## Concatenated and striped disks; with this, you can create a software-based
## disk array similar to a "RAID 0" setup. See ccd(4).
#pseudo-device ccd 4
## RAIDframe disk driver: software RAID driver. See raid(4).
#pseudo-device raid 4
## Memory disk device, used on boot floppies with compressed
## kernel-plus-root-disk images.
#pseudo-device md 1
## Loopback network interface; required
pseudo-device loop
## SLIP and CSLIP interfaces, for IP over a serial line.
#pseudo-device sl 1
## PPP, the successor to SLIP. See pppd(8).
#pseudo-device ppp 1
## Network "tunnel" device, allowing protocol stacks to run in the userland.
## This is used by the third-party user-mode "ppp" program, and others.
#pseudo-device tun 4
## Generic L3 over IP tunnel
#pseudo-device gre 2 # generic L3 over IP tunnel
## Berkeley Packet Filter, required to run RARPD. A generic C-language
## interface that allows selective examining of incoming packets.
pseudo-device bpfilter 4
## IP Filter, used in firewall and NAT applications. See ipnat(8) for
## one example of the use of the IP Filter.
pseudo-device ipfilter
#### Other device configuration
## Pseudo ttys, required for network logins and programs like screen.
## 32 is a good number for average systems; you may have as many as you
## like, though 256 is more or less the upper limit. Increasing this
## number still requires you to run /dev/MAKEDEV to create the files
## for the ptys.
pseudo-device pty 16 # pseudo-ttys (for network, etc.)
## Random device, used to implement /dev/random (a source of random noise),
## and generate randomness for some kernel formulae.
## THIS DEVICE IS EXPERIMENTAL; use at your own risk.
#pseudo-device rnd

302
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@ -0,0 +1,302 @@
# $NetBSD: ZSCONS,v 1.2 1999/03/16 16:30:17 minoura Exp $
#
# ZSCONS -- like GENERIC, but use zs console.
#
include "arch/x68k/conf/std.x68k"
maxusers 32
## System kernel configuration. See options(4) for more detail.
## Options for variants of the m68k MPU
## you must have at least the correct one; REQUIRED
options M68030
options M68040
options M68060
#### System options specific to the x68k port
#options UVM # new virtual memory system
options MACHINE_NONCONTIG # support for noncontiguous memory
options MACHINE_NEW_NONCONTIG # new i/f for noncontig memory support
options FPU_EMULATE # software fpu emulation for MC68030
options FPSP # floating point emulation for MC68040
options M060SP # int/fp emulation for MC68060
options JUPITER # support for "Jupiter-X" accelerator
options MAPPEDCOPY # use page mapping for large copyin/copyout
options ZSCONSOLE,ZSCN_SPEED="9600" # use serial console
#### System options that are the same for all ports
## Root device configuration: change the ?'s if you are going to use a
## nonstandard root partition (other than where the kernel is booted from)
## and/or nonstandard root type (not ffs or nfs). Normally this can be
## automagically determined at boot time.
config netbsd root on ? type ?
#config netbsd root on sd0 type ffs
## RTC is offset from GMT; -540 means JST-9
options RTC_OFFSET=-540 # hardware clock is this many mins. west of GMT
## System call tracing (see ktrace(1)).
options KTRACE
## Collect statistics on kernel malloc's and free's. This does have a
## significant performance hit on slower machines, so it is intended for
## diagnostic use only.
#options KMEMSTATS
## System V compatible IPC subsystem. (msgctl(2), semctl(2), and shmctl(2))
options SYSVMSG # System V message queues
options SYSVSEM # System V semaphores
options SYSVSHM # System V shared memory
#options SHMMAXPGS=1024 # 1024 pages is the default
## Loadable kernel module support
#options LKM
## NFS boot options; not supported currently: needs nfsboot program
#options NFS_BOOT_BOOTPARAM
#options NFS_BOOT_BOOTP
#options NFS_BOOT_DHCP
#### Debugging options
## The DDB in-kernel debugger runs at panic (unless DDB_ONPANIC=0), or at
## serial console break or keyboard reset, where the PROM would normally
## intercept. DDB_HISTORY_SIZE adds up/down arrow command history.
#options DDB # kernel dynamic debugger
#options DDB_HISTORY_SIZE=100 # enable history editing in DDB
#options DDB_ONPANIC=1 # see also sysctl(8): `ddb.onpanic'
#options PANICBUTTON # interrupt switch invokes DDB
## You may also use gdb, on another computer connected to this machine over
## a serial port. Both KGDBDEV and KGDBRATE should be specified; KGDBDEV is
## a dev_t encoded device number of the serial port to use.
## KGDB is not supported for now.
#options KGDB # support for kernel gdb
#options KGDBDEV=0xc00 # kgdb device number
#options KGDBRATE=9600 # baud rate
## Compile the kernel with debugging symbols (`netbsd.gdb' is the debug file),
## such that gdb(1) can be used on a kernel coredump.
#makeoptions DEBUG="-g"
## Adds code to the kernel that does internal consistency checks, and will
## cause the kernel to panic if corruption of internal data structures
## is detected.
#options DIAGNOSTIC # extra kernel sanity checking
## Enable (possibly expensive) debugging code that may also display messages
## on the system console
#options DEBUG
## Make SCSI error messages more verbose when explaining their meanings.
options SCSIVERBOSE
## `INSECURE' turns off the kernel security level (securelevel = 0 always).
## This allows writing to /dev/mem, loading kernel modules while multi-user,
## and other insecurities good only for development work. Do not use this
## option on a production machine.
#options INSECURE
## Allow non-root users to grab /dev/console with programs such as xconsole.
## `xconsole' therefore does not need setuid root with this option enabled.
#options UCONSOLE
## `FDSCRIPTS' allows non-readable but executable scripts by providing a
## pre-opened opaque file to the script interpreter. `SETUIDSCRIPTS',
## which implies FDSCRIPTS, allows scripts to be set-user-id using the same
## opaque file mechanism. Perl calls this "secure setuid scripts."
#options FDSCRIPTS
#options SETUIDSCRIPTS
## Options for compatibility with previous releases foreign system binaries.
options COMPAT_43 # 4.3BSD system interfaces
options COMPAT_09 # NetBSD 0.9 binary compatibility
options COMPAT_10 # NetBSD 1.0 binary compatibility
options COMPAT_11 # NetBSD 1.1 binary compatibility
options COMPAT_12 # NetBSD 1.2 binary compatibility
options COMPAT_13 # NetBSD 1.3 binary compatibility
#options COMPAT_M68K4K # NetBSD/m68k4k binaries
#options COMPAT_SUNOS # SunOS 4.x binary compatibility; broken
## File systems.
file-system FFS # Berkeley Fast Filesystem
file-system NFS # Sun NFS-compatible filesystem client
file-system KERNFS # kernel data-structure filesystem
file-system NULLFS # NULL layered filesystem
file-system MFS # memory-based filesystem
#file-system FDESC # user file descriptor filesystem
file-system UMAPFS # uid/gid remapping filesystem
#file-system LFS # Log-based filesystem (still experimental)
file-system PORTAL # portal filesystem (still experimental)
file-system PROCFS # /proc
file-system CD9660 # ISO 9660 + Rock Ridge file system
file-system UNION # union file system
file-system MSDOSFS # MS-DOS FAT filesystem(s).
#file-system ADOSFS # AmigaDOS filesystem
## File system options.
options NFSSERVER # Sun NFS-compatible filesystem server
options QUOTA # FFS quotas
#options FFS_EI # FFS Endian Independent support
## Network protocol support. In most environments, INET is required.
options INET # IP (Internet Protocol) v4
options TCP_COMPAT_42 # 4.2BSD IP implementation compatibility
#options GATEWAY # packet forwarding ("router switch")
#options MROUTING # packet forwarding of multicast packets
#options DIRECTED_BROADCAST # allow broadcasts through routers
#options NS # Xerox NS networking
#options NSIP # Xerox NS tunneling over IP
#options ISO,TPIP # OSI networking
#options EON # OSI tunneling over IP
#options CCITT,LLC,HDLC # X.25 packet switched protocol
options NETATALK # AppleTalk (over Ethernet) protocol
options NTP # Network Time Protocol in-kernel support
#options PPS_SYNC # Add serial line synchronization for NTP
#options PFIL_HOOKS # Add pfil(9) hooks, intended for custom LKMs.
options IPFILTER_LOG # Add ipmon(8) logging for ipfilter device
#options PPP_BSDCOMP # Add BSD compression to ppp device
#options PPP_DEFLATE # Add deflate (libz) compression to ppp device
#options PPP_FILTER # Add active filters for ppp (via bpf)
#### Device configurations
## Fundamental devices; see also std.x68k
dmac0 at intio0 addr 0xe84000 # DMA controler
xel0 at intio0
opm0 at intio0 addr 0xe90000 # OPM: required for fdc
## Display devices and console
grfbus0 at mainbus0 # bitmapped displays
grf0 at grfbus0 # multiplane graphics
grf1 at grfbus0 # flexible graphics
#kbd0 at mfp0 # standard keyboard
#ite0 at grf0 # internal terminal emulator
#!pow0 at mfp0 flags 0 # power switch status; intr enabled
#!pow1 at mfp0 flags 1 # power switch status; read only
pseudo-device pow 2 #! software power switch
## floppy disks
fdc0 at intio0 addr 0xe94000 intr 96 dma 0 dmaintr 100 # floppy controler
fd* at fdc0 unit ? # builtin floppy drives
## SCSI devices
scsirom0 at intio0 addr 0xfc0000 # Built-in SCSI BIOS
scsirom1 at intio0 addr 0xea0020 # External SCSI BIOS
spc0 at scsirom0 # genuin SCSI
spc1 at scsirom1 # genuin SCSI
scsibus* at spc?
mha0 at scsirom1 # Mankai MK-HA1 (Mach-2)
scsibus* at mha0
sd* at scsibus? target ? lun ? # SCSI disks
cd* at scsibus? target ? lun ? # SCSI CD-ROMs
st* at scsibus? target ? lun ? # SCSI tapes
#ss* at scsibus? target ? lun ? # SCSI scanners
ch* at scsibus? target ? lun ? # SCSI changer devices
#uk* at scsibus? target ? lun ? # SCSI unknown devices
## Serial ports
zsc0 at intio0 addr 0xe98000 intr 112
zstty0 at zsc0 channel 0 # built-in RS-232C
ms0 at zsc0 channel 1 # standard mouse
#zsc1 at intio0 addr 0xeafc00 intr 113
#zstty2 at zsc1 channel 0
#zstty3 at zsc1 channel 1
#zsc2 at intio0 addr 0xeafc10 intr 114
#zstty4 at zsc2 channel 0
#zstty5 at zsc2 channel 1
pseudo-device sram #! battery-backuped static RAM
pseudo-device bell #! OPM bell
xcom0 at mainbus0 # NS16550 fast serial
xcom1 at mainbus0
## Audio device
#okiadpcm0 at intio0 addr 0xe92000 intr 106 errintr 107 dma 3
#audio* at okiadpcm*
## Network interfaces
neptune0 at intio0 addr 0xece000 intr 249 # Neptune-X
neptune1 at intio0 addr 0xece400 intr 249 # Neptune-X at alt. addr.
ne0 at neptune? addr 0x300 # NE2000 or clone
#se0 at scsibus? target ? lun ? # Ether+; not supported
#### Pseudo devices
## A disk-like interface to files. Can be used to create floppy, CD,
## miniroot images, etc.
pseudo-device vnd 4
## Concatenated and striped disks; with this, you can create a software-based
## disk array similar to a "RAID 0" setup. See ccd(4).
#pseudo-device ccd 4
## RAIDframe disk driver: software RAID driver. See raid(4).
#pseudo-device raid 4
## Memory disk device, used on boot floppies with compressed
## kernel-plus-root-disk images.
#pseudo-device md 1
## Loopback network interface; required
pseudo-device loop
## SLIP and CSLIP interfaces, for IP over a serial line.
pseudo-device sl 1
## PPP, the successor to SLIP. See pppd(8).
pseudo-device ppp 1
## Network "tunnel" device, allowing protocol stacks to run in the userland.
## This is used by the third-party user-mode "ppp" program, and others.
pseudo-device tun 4
## Generic L3 over IP tunnel
#pseudo-device gre 2 # generic L3 over IP tunnel
## Berkeley Packet Filter, required to run RARPD. A generic C-language
## interface that allows selective examining of incoming packets.
pseudo-device bpfilter 8
## IP Filter, used in firewall and NAT applications. See ipnat(8) for
## one example of the use of the IP Filter.
pseudo-device ipfilter
#### Other device configuration
## Pseudo ttys, required for network logins and programs like screen.
## 32 is a good number for average systems; you may have as many as you
## like, though 256 is more or less the upper limit. Increasing this
## number still requires you to run /dev/MAKEDEV to create the files
## for the ptys.
pseudo-device pty 32 # pseudo-ttys (for network, etc.)
## Random device, used to implement /dev/random (a source of random noise),
## and generate randomness for some kernel formulae.
## THIS DEVICE IS EXPERIMENTAL; use at your own risk.
#pseudo-device rnd

146
sys/arch/x68k/conf/files.x68k
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@ -1,8 +1,15 @@
# $NetBSD: files.x68k,v 1.22 1998/12/15 19:37:14 itohy Exp $
# $NetBSD: files.x68k,v 1.23 1999/03/16 16:30:17 minoura Exp $
#
# new style config file for x68k architecture
#
defopt opt_fpuemulate.h FPU_EMULATE
defopt opt_m060sp.h M060SP
#defopt opt_fpsp.h FPSP # this will fail...
defopt opt_jupiter.h JUPITER
defopt opt_panicbutton.h PANICBUTTON
# maxpartitions must be first item in files.${ARCH}.newconf
maxpartitions 8
@ -17,13 +24,8 @@ attach cpu at mainbus
define event {}
file arch/x68k/dev/event.c event
# keyboard
pseudo-device kbd: event
file arch/x68k/dev/kbd.c kbd
file arch/x68k/x68k/x68k_init.c
file arch/x68k/x68k/autoconf.c
file arch/x68k/x68k/clock.c
file arch/x68k/x68k/conf.c
file arch/x68k/x68k/disksubr.c disk
file arch/x68k/x68k/machdep.c
@ -35,9 +37,10 @@ file arch/x68k/x68k/trap.c
file arch/x68k/x68k/vm_machdep.c
file arch/x68k/x68k/db_memrw.c ddb
file arch/x68k/x68k/fpu.c
file arch/x68k/x68k/bus.c
file dev/cons.c
file dev/cninit.c ite
file dev/cninit.c
major {vnd = 6}
# Emulation modules
@ -47,46 +50,6 @@ include "arch/m68k/fpe/files.fpe"
# 68060 software support package
include "arch/m68k/060sp/files.060sp"
#
# SCSI drivers
#
include "dev/scsipi/files.scsipi"
major {cd = 7}
major {sd = 4}
major {st = 5}
device spc: scsi
attach spc at mainbus
file arch/x68k/dev/spc.c spc needs-count
device mha: scsi
attach mha at mainbus
file arch/x68k/dev/mha.c mha needs-count
device ed: ether, ifnet, arp
attach ed at mainbus
file arch/x68k/dev/if_ed.c ed needs-flag
device fdc { unit = -1 }
attach fdc at mainbus
device fd: disk
attach fd at fdc
file arch/x68k/dev/fd.c fd needs-flag
device zsc {channel = -1}
attach zsc at mainbus
file arch/x68k/dev/zs.c zsc needs-flag
file dev/ic/z8530sc.c zsc
device zstty: tty
attach zstty at zsc
file dev/ic/z8530tty.c zstty needs-flag
device ms: event
attach ms at zsc
file arch/x68k/dev/ms.c ms needs-flag
device xcom: tty
attach xcom at mainbus
file arch/x68k/dev/com.c xcom needs-count
@ -95,8 +58,6 @@ device par
attach par at mainbus
file arch/x68k/dev/par.c par needs-flag
file arch/x68k/dev/rtclock.c
# graphic devices
define grfb {}
@ -117,19 +78,94 @@ file arch/x68k/dev/ite.c ite needs-flag
file arch/x68k/dev/ite_tv.c grf|ite
file arch/x68k/dev/kbdmap.c ite
device intio {[addr = -1], [intr = -1], [dma = -1], [dmaintr = -1]}
attach intio at mainbus
file arch/x68k/dev/intio.c intio
device xel
attach xel at intio
file arch/x68k/dev/xel.c xel
device mfp {}
attach mfp at intio
file arch/x68k/dev/mfp.c mfp
device clock
attach clock at mfp
file arch/x68k/x68k/clock.c clock needs-flag
device kbd: event
attach kbd at mfp
file arch/x68k/dev/kbd.c kbd needs-flag
device rtc
attach rtc at intio
file arch/x68k/dev/rtclock.c rtc
device dmac
attach dmac at intio
file arch/x68k/dev/intio_dmac.c dmac needs-flag
defopt opt_zsc.h ZSCONSOLE ZSCN_SPEED
device zsc {channel = -1}
attach zsc at intio
file arch/x68k/dev/zs.c zsc needs-flag
file dev/ic/z8530sc.c zsc
device zstty: tty
attach zstty at zsc
file dev/ic/z8530tty.c zstty needs-flag
device ms: event
attach ms at zsc
file arch/x68k/dev/ms.c ms needs-flag
device neptune {[addr = -1]}
attach neptune at intio
file arch/x68k/dev/neptune.c neptune
attach ne at neptune with ne_neptune: rtl80x9
file arch/x68k/dev/if_ne_neptune.c ne_neptune
device opm
attach opm at intio
file arch/x68k/dev/opm.c opm
device fdc { unit = -1 }
attach fdc at intio
device fd: disk
attach fd at fdc
file arch/x68k/dev/fd.c fd needs-flag
#
# SCSI drivers
#
include "dev/scsipi/files.scsipi"
major {cd = 7}
major {sd = 4}
major {st = 5}
device scsirom {}
attach scsirom at intio
file arch/x68k/dev/scsirom.c scsirom
device spc: scsi
attach spc at scsirom with spc_intio
file arch/x68k/dev/spc.c spc_intio needs-flag
file dev/ic/mb89352.c spc
device mha: scsi
attach mha at scsirom
file arch/x68k/dev/mha.c mha needs-flag
pseudo-device bell
file arch/x68k/dev/opmbell.c bell needs-flag
file arch/x68k/dev/opm.c bell|fdc
device adpcm: audio
attach adpcm at mainbus
file arch/x68k/dev/bsd_audio.c adpcm needs-flag
file arch/x68k/dev/adpcm.c adpcm
pseudo-device sram
file arch/x68k/dev/sram.c sram needs-flag
pseudo-device pow
file arch/x68k/dev/pow.c pow needs-count
file arch/x68k/dev/dma.c fdc|adpcm
# memory disk
file arch/x68k/dev/md_root.c memory_disk_hooks

11
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@ -1,5 +1,4 @@
# $NetBSD: std.x68k,v 1.5 1998/09/08 15:43:27 minoura Exp $
# $NetBSD: std.x68k,v 1.6 1999/03/16 16:30:17 minoura Exp $
#
# Mandatory NetBSD/x68k kernel options.
@ -13,3 +12,11 @@ options DEVPAGER # mapped devices
options EXEC_AOUT # execve(2) support for a.out binaries
options EXEC_SCRIPT # execve(2) support for scripts
## Fundamental devices
mainbus0 at root # MANDATORY
intio0 at mainbus0 # MANDATORY: internal I/O space
mfp0 at intio0 addr 0xe88000 intr 64 # MANDATORY: Multi Function Periferal
clock0 at mfp0 # MANDATORY: system tick
rtc0 at intio0 addr 0xe8a000 # MANDATORY: Realtime Clock

250
sys/arch/x68k/dev/dma.c
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@ -1,250 +0,0 @@
/* $NetBSD: dma.c,v 1.6 1998/08/22 14:38:36 minoura Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Charles M. Hannum.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Don Ahn.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/file.h>
#include <sys/buf.h>
#include <sys/syslog.h>
#include <sys/malloc.h>
#include <sys/uio.h>
#include <vm/vm.h>
#include <machine/cpu.h>
#include <x68k/x68k/iodevice.h>
#include <x68k/dev/dmavar.h>
#define NDMA 4
/* region of physical memory known to be contiguous */
caddr_t dma_dataaddr[NDMA];
caddr_t dma_bouncebuf[NDMA];
vsize_t dma_bouncebytes[NDMA];
char dma_bounced[NDMA];
/*
* Check for problems with the address range of a DMA transfer
* (non-contiguous physical pages, outside of bus address space,
* crossing DMA page boundaries).
* Return true if special handling needed.
*/
int
dmarangecheck(va, length)
vaddr_t va;
vsize_t length;
{
paddr_t phys, priorpage = 0;
vaddr_t endva;
u_int dma_pgmsk = ~PGOFSET;
endva = round_page(va + length);
for (; va < endva ; va += NBPG) {
phys = trunc_page(pmap_extract(pmap_kernel(), va));
if (phys == 0)
panic("dmacheck: no physical page present");
if (phys >= (1<<24))
return 1; /* XXX */
if (priorpage) {
if (priorpage + NBPG != phys)
return 1;
/* check if crossing a DMA page boundary */
if ((priorpage ^ phys) & dma_pgmsk)
return 1;
}
priorpage = phys;
}
return 0;
}
/*
* program HD63450 DMAC channel.
*/
void
x68k_dmastart(flag, addr, nbytes, chan)
int flag;
caddr_t addr;
vsize_t nbytes;
int chan;
{
volatile struct dmac *dmac = &IODEVbase->io_dma[chan];
if (dmarangecheck((vaddr_t)addr, nbytes)) {
dma_bouncebytes[chan] = nbytes;
dma_dataaddr[chan] = addr;
if (!(flag)) {
bcopy(addr, dma_bouncebuf[chan], nbytes);
dma_bounced[chan] = DMA_BWR;
} else {
dma_bounced[chan] = DMA_BRD;
}
addr = dma_bouncebuf[chan];
} else {
dma_bounced[chan] = 0;
}
dmac->csr = 0xff;
dmac->ocr = flag ? 0xb2 : 0x32;
dmac->mtc = (unsigned short)nbytes;
asm("nop");
asm("nop");
dmac->mar = (unsigned long)kvtop(addr);
#if defined(M68040)
/*
* Push back dirty cache lines
*/
if (mmutype == MMU_68040)
DCFP(kvtop(addr));
#endif
dmac->ccr = 0x88;
}
#if 0
void
isa_dmadone(flags, addr, nbytes, chan)
int flags;
vaddr_t addr;
vsize_t nbytes;
int chan;
{
u_char tc;
#ifdef DIAGNOSTIC
if (chan < 0 || chan > 7)
panic("isa_dmadone: impossible request");
#endif
/* check that the terminal count was reached */
if ((chan & 4) == 0)
tc = inb(DMA1_SR) & (1 << chan);
else
tc = inb(DMA2_SR) & (1 << (chan & 3));
if (tc == 0)
/* XXX probably should panic or something */
log(LOG_ERR, "dma channel %d not finished\n", chan);
/* copy bounce buffer on read */
if (dma_bounced[chan]) {
bcopy(dma_bounce[chan], addr, nbytes);
dma_bounced[chan] = 0;
}
/* mask channel */
if ((chan & 4) == 0)
outb(DMA1_SMSK, DMA37SM_SET | chan);
else
outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
}
/* head of queue waiting for physmem to become available */
struct buf isa_physmemq;
/* blocked waiting for resource to become free for exclusive use */
static isaphysmemflag;
/* if waited for and call requested when free (B_CALL) */
static void (*isaphysmemunblock)(); /* needs to be a list */
/*
* Allocate contiguous physical memory for transfer, returning
* a *virtual* address to region. May block waiting for resource.
* (assumed to be called at splbio())
*/
caddr_t
isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
isaphysmemunblock = func;
while (isaphysmemflag & B_BUSY) {
isaphysmemflag |= B_WANTED;
sleep((caddr_t)&isaphysmemflag, PRIBIO);
}
isaphysmemflag |= B_BUSY;
return((caddr_t)isaphysmem);
}
/*
* Free contiguous physical memory used for transfer.
* (assumed to be called at splbio())
*/
void
isa_freephysmem(caddr_t va, unsigned length) {
isaphysmemflag &= ~B_BUSY;
if (isaphysmemflag & B_WANTED) {
isaphysmemflag &= B_WANTED;
wakeup((caddr_t)&isaphysmemflag);
if (isaphysmemunblock)
(*isaphysmemunblock)();
}
}
#endif

114
sys/arch/x68k/dev/dmacvar.h Normal file
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@ -0,0 +1,114 @@
/* $NetBSD: dmacvar.h,v 1.2 1999/03/16 16:30:17 minoura Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Minoura Makoto.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Hitachi HD63450 (= Motorola MC68450) DMAC driver for x68k.
*/
#include <dev/ic/mc68450reg.h>
typedef int (*dmac_intr_handler_t) __P((void*));
/*
* Struct that holds the channel status.
* Embedded in the device softc for each channel.
*/
struct dmac_channel_stat {
int ch_channel; /* channel number */
char ch_name[8]; /* user device name */
bus_space_handle_t ch_bht; /* bus_space handle */
int ch_dcr; /* device description */
int ch_ocr; /* operation size, request mode */
int ch_normalv; /* normal interrupt vector */
int ch_errorv; /* error interrupt vector */
dmac_intr_handler_t ch_normal; /* normal interrupt handler */
dmac_intr_handler_t ch_error; /* error interrupt handler */
void *ch_normalarg;
void *ch_errorarg;
struct dmac_dma_xfer *ch_xfer_in_progress;
void *ch_map; /* transfer map for arraychain mode */
struct device *ch_softc; /* device softc link */
};
/*
* DMAC softc
*/
struct dmac_softc {
struct device sc_dev;
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bht;
struct dmac_channel_stat sc_channels[DMAC_NCHAN];
};
/*
* Structure that describes a single transfer.
*/
struct dmac_dma_xfer {
struct dmac_channel_stat *dx_channel; /* channel structure */
bus_dmamap_t dx_dmamap; /* dmamap tag */
bus_dma_tag_t dx_tag; /* dma tag for the transfer */
int dx_ocr; /* direction */
int dx_scr; /* SCR value */
void *dx_device; /* (initial) device address */
int dx_done; /* transfer count */
};
#define DMAC_ADDR 0xe84000
#define DMAC_MAXSEGSZ 0xff00
#define DMAC_BOUNDARY 0
struct dmac_channel_stat *dmac_alloc_channel __P((struct device*, int, char*,
int,
dmac_intr_handler_t, void*,
int,
dmac_intr_handler_t, void*));
/* ch, name, normalv, normal, errorv, error */
int dmac_free_channel __P((struct device*, int, void*));
/* ch, channel */
struct dmac_dma_xfer *dmac_prepare_xfer __P((struct dmac_channel_stat*,
bus_dma_tag_t,
bus_dmamap_t,
int, int, void*));
/* chan, dmat, map, dir, sequence, dar */
#define dmac_finish_xfer(xfer) free(xfer, M_DEVBUF)
int dmac_start_xfer __P((struct device*, struct dmac_dma_xfer*));

546
sys/arch/x68k/dev/dp8390reg.h
View File

@ -1,546 +0,0 @@
/* $NetBSD: dp8390reg.h,v 1.1.1.1 1996/05/05 12:17:03 oki Exp $ */
/*
* National Semiconductor DS8390 NIC register definitions.
*
* Copyright (C) 1993, David Greenman. This software may be used, modified,
* copied, distributed, and sold, in both source and binary form provided that
* the above copyright and these terms are retained. Under no circumstances is
* the author responsible for the proper functioning of this software, nor does
* the author assume any responsibility for damages incurred with its use.
*/
/*
* Page 0 register offsets
*/
#define ED_P0_CR 0x00 /* Command Register */
#define ED_P0_CLDA0 0x02 /* Current Local DMA Addr low (read) */
#define ED_P0_PSTART 0x02 /* Page Start register (write) */
#define ED_P0_CLDA1 0x04 /* Current Local DMA Addr high (read) */
#define ED_P0_PSTOP 0x04 /* Page Stop register (write) */
#define ED_P0_BNRY 0x06 /* Boundary Pointer */
#define ED_P0_TSR 0x08 /* Transmit Status Register (read) */
#define ED_P0_TPSR 0x08 /* Transmit Page Start (write) */
#define ED_P0_NCR 0x0a /* Number of Collisions Reg (read) */
#define ED_P0_TBCR0 0x0a /* Transmit Byte count, low (write) */
#define ED_P0_FIFO 0x0c /* FIFO register (read) */
#define ED_P0_TBCR1 0x0c /* Transmit Byte count, high (write) */
#define ED_P0_ISR 0x0e /* Interrupt Status Register */
#define ED_P0_CRDA0 0x10 /* Current Remote DMA Addr low (read) */
#define ED_P0_RSAR0 0x10 /* Remote Start Address low (write) */
#define ED_P0_CRDA1 0x12 /* Current Remote DMA Addr high (read) */
#define ED_P0_RSAR1 0x12 /* Remote Start Address high (write) */
#define ED_P0_RBCR0 0x14 /* Remote Byte Count low (write) */
#define ED_P0_RBCR1 0x16 /* Remote Byte Count high (write) */
#define ED_P0_RSR 0x18 /* Receive Status (read) */
#define ED_P0_RCR 0x18 /* Receive Configuration Reg (write) */
#define ED_P0_CNTR0 0x1a /* frame alignment error counter (read) */
#define ED_P0_TCR 0x1a /* Transmit Configuration Reg (write) */
#define ED_P0_CNTR1 0x1c /* CRC error counter (read) */
#define ED_P0_DCR 0x1c /* Data Configuration Reg (write) */
#define ED_P0_CNTR2 0x1e /* missed packet counter (read) */
#define ED_P0_IMR 0x1e /* Interrupt Mask Register (write) */
/*
* Page 1 register offsets
*/
#define ED_P1_CR 0x00 /* Command Register */
#define ED_P1_PAR0 0x02 /* Physical Address Register 0 */
#define ED_P1_PAR1 0x04 /* Physical Address Register 1 */
#define ED_P1_PAR2 0x06 /* Physical Address Register 2 */
#define ED_P1_PAR3 0x08 /* Physical Address Register 3 */
#define ED_P1_PAR4 0x0a /* Physical Address Register 4 */
#define ED_P1_PAR5 0x0c /* Physical Address Register 5 */
#define ED_P1_CURR 0x0e /* Current RX ring-buffer page */
#define ED_P1_MAR0 0x10 /* Multicast Address Register 0 */
#define ED_P1_MAR1 0x12 /* Multicast Address Register 1 */
#define ED_P1_MAR2 0x14 /* Multicast Address Register 2 */
#define ED_P1_MAR3 0x16 /* Multicast Address Register 3 */
#define ED_P1_MAR4 0x18 /* Multicast Address Register 4 */
#define ED_P1_MAR5 0x1a /* Multicast Address Register 5 */
#define ED_P1_MAR6 0x1c /* Multicast Address Register 6 */
#define ED_P1_MAR7 0x1e /* Multicast Address Register 7 */
/*
* Page 2 register offsets
*/
#define ED_P2_CR 0x00 /* Command Register */
#define ED_P2_PSTART 0x02 /* Page Start (read) */
#define ED_P2_CLDA0 0x02 /* Current Local DMA Addr 0 (write) */
#define ED_P2_PSTOP 0x04 /* Page Stop (read) */
#define ED_P2_CLDA1 0x04 /* Current Local DMA Addr 1 (write) */
#define ED_P2_RNPP 0x06 /* Remote Next Packet Pointer */
#define ED_P2_TPSR 0x08 /* Transmit Page Start (read) */
#define ED_P2_LNPP 0x0a /* Local Next Packet Pointer */
#define ED_P2_ACU 0x0c /* Address Counter Upper */
#define ED_P2_ACL 0x0e /* Address Counter Lower */
#define ED_P2_RCR 0x18 /* Receive Configuration Register (read) */
#define ED_P2_TCR 0x1a /* Transmit Configuration Register (read) */
#define ED_P2_DCR 0x1c /* Data Configuration Register (read) */
#define ED_P2_IMR 0x1e /* Interrupt Mask Register (read) */
/*
* Command Register (CR) definitions
*/
/*
* STP: SToP. Software reset command. Takes the controller offline. No
* packets will be received or transmitted. Any reception or transmission in
* progress will continue to completion before entering reset state. To exit
* this state, the STP bit must reset and the STA bit must be set. The
* software reset has executed only when indicated by the RST bit in the ISR
* being set.
*/
#define ED_CR_STP 0x01
/*
* STA: STArt. This bit is used to activate the NIC after either power-up, or
* when the NIC has been put in reset mode by software command or error.
*/
#define ED_CR_STA 0x02
/*
* TXP: Transmit Packet. This bit must be set to indicate transmission of a
* packet. TXP is internally reset either after the transmission is completed
* or aborted. This bit should be set only after the Transmit Byte Count and
* Transmit Page Start register have been programmed.
*/
#define ED_CR_TXP 0x04
/*
* RD0, RD1, RD2: Remote DMA Command. These three bits control the operation
* of the remote DMA channel. RD2 can be set to abort any remote DMA command
* in progress. The Remote Byte Count registers should be cleared when a
* remote DMA has been aborted. The Remote Start Addresses are not restored
* to the starting address if the remote DMA is aborted.
*
* RD2 RD1 RD0 function
* 0 0 0 not allowed
* 0 0 1 remote read
* 0 1 0 remote write
* 0 1 1 send packet
* 1 X X abort
*/
#define ED_CR_RD0 0x08
#define ED_CR_RD1 0x10
#define ED_CR_RD2 0x20
/*
* PS0, PS1: Page Select. The two bits select which register set or 'page' to
* access.
*
* PS1 PS0 page
* 0 0 0
* 0 1 1
* 1 0 2
* 1 1 reserved
*/
#define ED_CR_PS0 0x40
#define ED_CR_PS1 0x80
/* bit encoded aliases */
#define ED_CR_PAGE_0 0x00 /* (for consistency) */
#define ED_CR_PAGE_1 0x40
#define ED_CR_PAGE_2 0x80
/*
* Interrupt Status Register (ISR) definitions
*/
/*
* PRX: Packet Received. Indicates packet received with no errors.
*/
#define ED_ISR_PRX 0x01
/*
* PTX: Packet Transmitted. Indicates packet transmitted with no errors.
*/
#define ED_ISR_PTX 0x02
/*
* RXE: Receive Error. Indicates that a packet was received with one or more
* the following errors: CRC error, frame alignment error, FIFO overrun,
* missed packet.
*/
#define ED_ISR_RXE 0x04
/*
* TXE: Transmission Error. Indicates that an attempt to transmit a packet
* resulted in one or more of the following errors: excessive collisions, FIFO
* underrun.
*/
#define ED_ISR_TXE 0x08
/*
* OVW: OverWrite. Indicates a receive ring-buffer overrun. Incoming network
* would exceed (has exceeded?) the boundary pointer, resulting in data that
* was previously received and not yet read from the buffer to be overwritten.
*/
#define ED_ISR_OVW 0x10
/*
* CNT: Counter Overflow. Set when the MSB of one or more of the Network Tally
* Counters has been set.
*/
#define ED_ISR_CNT 0x20
/*
* RDC: Remote Data Complete. Indicates that a Remote DMA operation has
* completed.
*/
#define ED_ISR_RDC 0x40
/*
* RST: Reset status. Set when the NIC enters the reset state and cleared when
* a Start Command is issued to the CR. This bit is also set when a receive
* ring-buffer overrun (OverWrite) occurs and is cleared when one or more
* packets have been removed from the ring. This is a read-only bit.
*/
#define ED_ISR_RST 0x80
/*
* Interrupt Mask Register (IMR) definitions
*/
/*
* PRXE: Packet Received interrupt Enable. If set, a received packet will
* cause an interrupt.
*/
#define ED_IMR_PRXE 0x01
/*
* PTXE: Packet Transmit interrupt Enable. If set, an interrupt is generated
* when a packet transmission completes.
*/
#define ED_IMR_PTXE 0x02
/*
* RXEE: Receive Error interrupt Enable. If set, an interrupt will occur
* whenever a packet is received with an error.
*/
#define ED_IMR_RXEE 0x04
/*
* TXEE: Transmit Error interrupt Enable. If set, an interrupt will occur
* whenever a transmission results in an error.
*/
#define ED_IMR_TXEE 0x08
/*
* OVWE: OverWrite error interrupt Enable. If set, an interrupt is generated
* whenever the receive ring-buffer is overrun. i.e. when the boundary pointer
* is exceeded.
*/
#define ED_IMR_OVWE 0x10
/*
* CNTE: Counter overflow interrupt Enable. If set, an interrupt is generated
* whenever the MSB of one or more of the Network Statistics counters has been
* set.
*/
#define ED_IMR_CNTE 0x20
/*
* RDCE: Remote DMA Complete interrupt Enable. If set, an interrupt is
* generated when a remote DMA transfer has completed.
*/
#define ED_IMR_RDCE 0x40
/*
* Bit 7 is unused/reserved.
*/
/*
* Data Configuration Register (DCR) definitions
*/
/*
* WTS: Word Transfer Select. WTS establishes byte or word transfers for both
* remote and local DMA transfers
*/
#define ED_DCR_WTS 0x01
/*
* BOS: Byte Order Select. BOS sets the byte order for the host. Should be 0
* for 80x86, and 1 for 68000 series processors
*/
#define ED_DCR_BOS 0x02
/*
* LAS: Long Address Select. When LAS is 1, the contents of the remote DMA
* registers RSAR0 and RSAR1 are used to provide A16-A31.
*/
#define ED_DCR_LAS 0x04
/*
* LS: Loopback Select. When 0, loopback mode is selected. Bits D1 and D2 of
* the TCR must also be programmed for loopback operation. When 1, normal
* operation is selected.
*/
#define ED_DCR_LS 0x08
/*
* AR: Auto-initialize Remote. When 0, data must be removed from ring-buffer
* under program control. When 1, remote DMA is automatically initiated and
* the boundary pointer is automatically updated.
*/
#define ED_DCR_AR 0x10
/*
* FT0, FT1: Fifo Threshold select.
*
* FT1 FT0 Word-width Byte-width
* 0 0 1 word 2 bytes
* 0 1 2 words 4 bytes
* 1 0 4 words 8 bytes
* 1 1 8 words 12 bytes
*
* During transmission, the FIFO threshold indicates the number of bytes or
* words that the FIFO has filled from the local DMA before BREQ is asserted.
* The transmission threshold is 16 bytes minus the receiver threshold.
*/
#define ED_DCR_FT0 0x20
#define ED_DCR_FT1 0x40
/*
* bit 7 (0x80) is unused/reserved
*/
/*
* Transmit Configuration Register (TCR) definitions
*/
/*
* CRC: Inhibit CRC. If 0, CRC will be appended by the transmitter, if 0, CRC
* is not appended by the transmitter.
*/
#define ED_TCR_CRC 0x01
/*
* LB0, LB1: Loopback control. These two bits set the type of loopback that is
* to be performed.
*
* LB1 LB0 mode
* 0 0 0 - normal operation (DCR_LS = 0)
* 0 1 1 - internal loopback (DCR_LS = 0)
* 1 0 2 - external loopback (DCR_LS = 1)
* 1 1 3 - external loopback (DCR_LS = 0)
*/
#define ED_TCR_LB0 0x02
#define ED_TCR_LB1 0x04
/*
* ATD: Auto Transmit Disable. Clear for normal operation. When set, allows
* another station to disable the NIC's transmitter by transmitting to a
* multicast address hashing to bit 62. Reception of a multicast address
* hashing to bit 63 enables the transmitter.
*/
#define ED_TCR_ATD 0x08
/*
* OFST: Collision Offset enable. This bit when set modifies the backoff
* algorithm to allow prioritization of nodes.
*/
#define ED_TCR_OFST 0x10
/*
* bits 5, 6, and 7 are unused/reserved
*/
/*
* Transmit Status Register (TSR) definitions
*/
/*
* PTX: Packet Transmitted. Indicates successful transmission of packet.
*/
#define ED_TSR_PTX 0x01
/*
* bit 1 (0x02) is unused/reserved
*/
/*
* COL: Transmit Collided. Indicates that the transmission collided at least
* once with another station on the network.
*/
#define ED_TSR_COL 0x04
/*
* ABT: Transmit aborted. Indicates that the transmission was aborted due to
* excessive collisions.
*/
#define ED_TSR_ABT 0x08
/*
* CRS: Carrier Sense Lost. Indicates that carrier was lost during the
* transmission of the packet. (Transmission is not aborted because of a loss
* of carrier).
*/
#define ED_TSR_CRS 0x10
/*
* FU: FIFO Underrun. Indicates that the NIC wasn't able to access bus/
* transmission memory before the FIFO emptied. Transmission of the packet was
* aborted.
*/
#define ED_TSR_FU 0x20
/*
* CDH: CD Heartbeat. Indicates that the collision detection circuitry isn't
* working correctly during a collision heartbeat test.
*/
#define ED_TSR_CDH 0x40
/*
* OWC: Out of Window Collision: Indicates that a collision occurred after a
* slot time (51.2us). The transmission is rescheduled just as in normal
* collisions.
*/
#define ED_TSR_OWC 0x80
/*
* Receiver Configuration Register (RCR) definitions
*/
/*
* SEP: Save Errored Packets. If 0, error packets are discarded. If set to 1,
* packets with CRC and frame errors are not discarded.
*/
#define ED_RCR_SEP 0x01
/*
* AR: Accept Runt packet. If 0, packet with less than 64 byte are discarded.
* If set to 1, packets with less than 64 byte are not discarded.
*/
#define ED_RCR_AR 0x02
/*
* AB: Accept Broadcast. If set, packets sent to the broadcast address will be
* accepted.
*/
#define ED_RCR_AB 0x04
/*
* AM: Accept Multicast. If set, packets sent to a multicast address are
* checked for a match in the hashing array. If clear, multicast packets are
* ignored.
*/
#define ED_RCR_AM 0x08
/*
* PRO: Promiscuous Physical. If set, all packets with a physical addresses
* are accepted. If clear, a physical destination address must match this
* station's address. Note: for full promiscuous mode, RCR_AB and RCR_AM must
* also be set. In addition, the multicast hashing array must be set to all
* 1's so that all multicast addresses are accepted.
*/
#define ED_RCR_PRO 0x10
/*
* MON: Monitor Mode. If set, packets will be checked for good CRC and
* framing, but are not stored in the ring-buffer. If clear, packets are
* stored (normal operation).
*/
#define ED_RCR_MON 0x20
/*
* Bits 6 and 7 are unused/reserved.
*/
/*
* Receiver Status Register (RSR) definitions
*/
/*
* PRX: Packet Received without error.
*/
#define ED_RSR_PRX 0x01
/*
* CRC: CRC error. Indicates that a packet has a CRC error. Also set for
* frame alignment errors.
*/
#define ED_RSR_CRC 0x02
/*
* FAE: Frame Alignment Error. Indicates that the incoming packet did not end
* on a byte boundary and the CRC did not match at the last byte boundary.
*/
#define ED_RSR_FAE 0x04
/*
* FO: FIFO Overrun. Indicates that the FIFO was not serviced (during local
* DMA) causing it to overrun. Reception of the packet is aborted.
*/
#define ED_RSR_FO 0x08
/*
* MPA: Missed Packet. Indicates that the received packet couldn't be stored
* in the ring-buffer because of insufficient buffer space (exceeding the
* boundary pointer), or because the transfer to the ring-buffer was inhibited
* by RCR_MON - monitor mode.
*/
#define ED_RSR_MPA 0x10
/*
* PHY: Physical address. If 0, the packet received was sent to a physical
* address. If 1, the packet was accepted because of a multicast/broadcast
* address match.
*/
#define ED_RSR_PHY 0x20
/*
* DIS: Receiver Disabled. Set to indicate that the receiver has enetered
* monitor mode. Cleared when the receiver exits monitor mode.
*/
#define ED_RSR_DIS 0x40
/*
* DFR: Deferring. Set to indicate a 'jabber' condition. The CRS and COL
* inputs are active, and the transceiver has set the CD line as a result of
* the jabber.
*/
#define ED_RSR_DFR 0x80
/*
* receive ring discriptor
*
* The National Semiconductor DS8390 Network interface controller uses the
* following receive ring headers. The way this works is that the memory on
* the interface card is chopped up into 256 bytes blocks. A contiguous
* portion of those blocks are marked for receive packets by setting start and
* end block #'s in the NIC. For each packet that is put into the receive
* ring, one of these headers (4 bytes each) is tacked onto the front. The
* first byte is a copy of the receiver status register at the time the packet
* was received.
*/
struct ed_ring {
u_char rsr; /* receiver status */
u_char next_packet; /* pointer to next packet */
u_char count_l; /* bytes in packet (length + 4) */
u_char count_h;
};
/*
* Common constants
*/
#define ED_PAGE_SIZE 256 /* Size of RAM pages in bytes */
#define ED_PAGE_MASK 255
#define ED_PAGE_SHIFT 8
#define ED_TXBUF_SIZE 6 /* Size of TX buffer in pages */

504
sys/arch/x68k/dev/fd.c
View File

@ -1,11 +1,11 @@
/* $NetBSD: fd.c,v 1.24 1999/02/08 16:33:17 bouyer Exp $ */
/* $NetBSD: fd.c,v 1.25 1999/03/16 16:30:17 minoura Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Charles M. Hannum.
* by Charles M. Hannum and Minoura Makoto.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -74,7 +74,9 @@
* @(#)fd.c 7.4 (Berkeley) 5/25/91
*/
#include "rnd.h"
#include "opt_ddb.h"
#include "opt_uvm.h"
#include <sys/param.h>
#include <sys/systm.h>
@ -92,19 +94,27 @@
#include <sys/uio.h>
#include <sys/syslog.h>
#include <sys/queue.h>
#include <sys/fdio.h>
#if NRND > 0
#include <sys/rnd.h>
#endif
#if defined(UVM)
#include <vm/vm.h>
#include <uvm/uvm_extern.h>
#endif
#include <machine/bus.h>
#include <machine/cpu.h>
#include <x68k/x68k/iodevice.h>
#include <x68k/dev/dmavar.h>
#include <x68k/dev/fdreg.h>
#include <x68k/dev/opmreg.h>
#include <arch/x68k/dev/intiovar.h>
#include <arch/x68k/dev/dmacvar.h>
#include <arch/x68k/dev/fdreg.h>
#include <arch/x68k/dev/opmreg.h> /* for CT1 access */
#include "locators.h"
#define infdc (IODEVbase->io_fdc)
#ifdef DEBUG
#ifdef FDDEBUG
#define DPRINTF(x) if (fddebug) printf x
int fddebug = 0;
#else
@ -141,7 +151,14 @@ enum fdc_state {
/* software state, per controller */
struct fdc_softc {
struct device sc_dev; /* boilerplate */
u_char sc_flags;
bus_space_tag_t sc_iot; /* intio i/o space identifier */
bus_space_handle_t sc_ioh; /* intio io handle */
bus_dma_tag_t sc_dmat; /* intio dma tag */
bus_dmamap_t sc_dmamap; /* dma map */
u_int8_t *sc_addr; /* physical address */
struct dmac_channel_stat *sc_dmachan; /* intio dma channel */
struct dmac_dma_xfer *sc_xfer; /* dma transfer */
struct fd_softc *sc_fd[4]; /* pointers to children */
TAILQ_HEAD(drivehead, fd_softc) sc_drives;
@ -153,8 +170,8 @@ struct fdc_softc {
bdev_decl(fd);
cdev_decl(fd);
int fdcintr __P((void));
void fdcreset __P((void));
int fdcintr __P((void*));
void fdcreset __P((struct fdc_softc *));
/* controller driver configuration */
int fdcprobe __P((struct device *, struct cfdata *, void *));
@ -180,7 +197,7 @@ struct fd_type {
int steprate; /* step rate and head unload time */
int gap1; /* gap len between sectors */
int gap2; /* formatting gap */
int tracks; /* total num of tracks */
int cyls; /* total num of cylinders */
int size; /* size of disk in sectors */
int step; /* steps per cylinder */
int rate; /* transfer speed code */
@ -209,6 +226,7 @@ struct fd_softc {
daddr_t sc_blkno; /* starting block number */
int sc_bcount; /* byte count left */
int sc_opts; /* user-set options */
int sc_skip; /* bytes already transferred */
int sc_nblks; /* number of blocks currently tranferring */
int sc_nbytes; /* number of bytes currently tranferring */
@ -231,6 +249,10 @@ struct fd_softc {
#define SEC_P10 0x02 /* first part */
#define SEC_P01 0x01 /* second part */
#define SEC_P11 0x03 /* both part */
#if NRND > 0
rndsource_element_t rnd_source;
#endif
};
/* floppy driver configuration */
@ -252,7 +274,7 @@ void fd_set_motor __P((struct fdc_softc *fdc, int reset));
void fd_motor_off __P((void *arg));
void fd_motor_on __P((void *arg));
int fdcresult __P((struct fdc_softc *fdc));
int out_fdc __P((u_char x));
int out_fdc __P((bus_space_tag_t, bus_space_handle_t, u_char x));
void fdcstart __P((struct fdc_softc *fdc));
void fdcstatus __P((struct device *dv, int n, char *s));
void fdctimeout __P((void *arg));
@ -262,85 +284,71 @@ void fdfinish __P((struct fd_softc *fd, struct buf *bp));
__inline struct fd_type *fd_dev_to_type __P((struct fd_softc *, dev_t));
static int fdcpoll __P((struct fdc_softc *));
static int fdgetdisklabel __P((struct fd_softc *, dev_t));
static void fd_do_eject __P((int));
static void fd_do_eject __P((struct fdc_softc *, int));
void fd_mountroot_hook __P((struct device *));
/* dma transfer routines */
__inline static void fdc_dmastart __P((int, caddr_t, vsize_t));
void fdcdmaintr __P((void));
void fdcdmaerrintr __P((void));
#define FDDI_EN 0x02
#define FDCI_EN 0x04
#define FDD_INT 0x40
#define FDC_INT 0x80
#define DMA_BRD 0x01
#define DMA_BWR 0x02
#define DRQ 0
static u_char *fdc_dmabuf;
__inline static void fdc_dmastart __P((struct fdc_softc*, int,
caddr_t, vsize_t));
static int fdcdmaintr __P((void*));
static int fdcdmaerrintr __P((void*));
__inline static void
fdc_dmastart(read, addr, count)
fdc_dmastart(fdc, read, addr, count)
struct fdc_softc *fdc;
int read;
caddr_t addr;
vsize_t count;
{
volatile struct dmac *dmac = &IODEVbase->io_dma[DRQ];
int error;
DPRINTF(("fdc_dmastart: (%s, addr = %p, count = %d\n",
read ? "read" : "write", (caddr_t) addr, count));
if (dmarangecheck((vaddr_t)addr, count)) {
dma_bouncebytes[DRQ] = count;
dma_dataaddr[DRQ] = addr;
if (!(read)) {
bcopy(addr, dma_bouncebuf[DRQ], count);
dma_bounced[DRQ] = DMA_BWR;
} else {
dma_bounced[DRQ] = DMA_BRD;
}
addr = dma_bouncebuf[DRQ];
} else {
dma_bounced[DRQ] = 0;
error = bus_dmamap_load(fdc->sc_dmat, fdc->sc_dmamap, addr, count,
0, BUS_DMA_NOWAIT);
if (error) {
panic ("fdc_dmastart: cannot load dmamap");
}
dmac->csr = 0xff;
dmac->ocr = read ? 0xb2 : 0x32;
dmac->mtc = (unsigned short)count;
asm("nop");
asm("nop");
dmac->mar = (unsigned long)kvtop(addr);
bus_dmamap_sync(fdc->sc_dmat, fdc->sc_dmamap, 0, count,
read?BUS_DMASYNC_PREREAD:BUS_DMASYNC_PREWRITE);
fdc->sc_xfer = dmac_prepare_xfer(fdc->sc_dmachan, fdc->sc_dmat,
fdc->sc_dmamap,
(read?
DMAC_OCR_DIR_DTM:DMAC_OCR_DIR_MTD),
(DMAC_SCR_MAC_COUNT_UP|
DMAC_SCR_DAC_NO_COUNT),
(u_int8_t*) (fdc->sc_addr +
fddata)); /* XXX */
#if defined(M68040) || defined(M68060)
/*
* Push back dirty cache lines
*/
if (mmutype == MMU_68040)
DCFP(kvtop(addr));
if (mmutype == MMU_68040)
dma_cachectl(addr, count);
#endif
dmac->ccr = 0x88;
dmac_start_xfer(fdc->sc_dmachan->ch_softc, fdc->sc_xfer);
}
void
fdcdmaintr()
static int
fdcdmaintr(arg)
void *arg;
{
volatile struct dmac *dmac = &IODEVbase->io_dma[DRQ];
dmac->csr = 0xff;
PCIA(); /* XXX? by oki */
if (dma_bounced[DRQ] == DMA_BRD) {
bcopy(dma_bouncebuf[DRQ], dma_dataaddr[DRQ], dma_bouncebytes[DRQ]);
}
dma_bounced[DRQ] = 0;
struct fdc_softc *fdc = arg;
bus_dmamap_unload(fdc->sc_dmat, fdc->sc_dmamap);
return 0;
}
void
fdcdmaerrintr()
static int
fdcdmaerrintr(dummy)
void *dummy;
{
volatile struct dmac *dmac = &IODEVbase->io_dma[DRQ];
printf("fdcdmaerrintr: csr=%x, cer=%x\n", dmac->csr, dmac->cer);
dmac->csr = 0xff;
DPRINTF(("fdcdmaerrintr\n"));
return 0;
}
/* ARGSUSED */
@ -350,8 +358,28 @@ fdcprobe(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
if (strcmp("fdc", aux) != 0)
struct intio_attach_args *ia = aux;
if (strcmp(ia->ia_name, "fdc") != 0)
return 0;
if (ia->ia_addr == INTIOCF_ADDR_DEFAULT)
ia->ia_addr = FDC_ADDR;
if (ia->ia_intr == INTIOCF_INTR_DEFAULT)
ia->ia_intr = FDC_INTR;
if (ia->ia_dma == INTIOCF_DMA_DEFAULT)
ia->ia_dma = FDC_DMA;
if (ia->ia_dmaintr == INTIOCF_DMAINTR_DEFAULT)
ia->ia_dmaintr = FDC_DMAINTR;
if (ia->ia_intr & 0x03 != 0)
return 0;
ia->ia_size = 0x2000;
if (intio_map_allocate_region (parent, ia, INTIO_MAP_TESTONLY))
return 0;
/* builtin device; always there */
return 1;
}
@ -388,63 +416,78 @@ fdcattach(parent, self, aux)
void *aux;
{
struct fdc_softc *fdc = (void *)self;
volatile struct dmac *dmac = &IODEVbase->io_dma[DRQ];
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct intio_attach_args *ia = aux;
struct fdc_attach_args fa;
iot = ia->ia_bst;
printf("\n");
/* Re-map the I/O space. */
bus_space_map(iot, ia->ia_addr, 0x2000, BUS_SPACE_MAP_SHIFTED, &ioh);
fdc->sc_iot = iot;
fdc->sc_ioh = ioh;
fdc->sc_addr = (void*) ia->ia_addr;
fdc->sc_dmat = ia->ia_dmat;
fdc->sc_state = DEVIDLE;
TAILQ_INIT(&fdc->sc_drives);
fdc->sc_flags = 0;
/* Initialize DMAC channel */
fdc->sc_dmachan = dmac_alloc_channel(parent, ia->ia_dma, "fdc",
ia->ia_dmaintr, fdcdmaintr, fdc,
ia->ia_dmaintr+1, fdcdmaerrintr,
fdc);
if (bus_dmamap_create(fdc->sc_dmat, FDC_MAXIOSIZE, 16, 0xf000, 0,
BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
&fdc->sc_dmamap)) {
printf("%s: can't set up intio DMA map\n",
fdc->sc_dev.dv_xname);
return;
}
if (intio_intr_establish(ia->ia_intr, "fdc", fdcintr, fdc))
panic ("Could not establish interrupt (duplicated vector?).");
intio_set_ivec(ia->ia_intr);
/* reset */
ioctlr.intr &= (~FDDI_EN);
ioctlr.intr |= FDCI_EN;
intio_disable_intr(SICILIAN_INTR_FDD);
intio_enable_intr(SICILIAN_INTR_FDC);
fdcresult(fdc);
fdcreset();
fdcreset(fdc);
/* Initialize DMAC channel */
dmac->dcr = 0x80;
dmac->scr = 0x04;
dmac->csr = 0xff;
dmac->cpr = 0x00;
dmac->dar = (unsigned long) kvtop((void *)&infdc.data);
dmac->mfc = 0x05;
dmac->dfc = 0x05;
dmac->bfc = 0x05;
dmac->niv = 0x64;
dmac->eiv = 0x65;
printf(": uPD72065 FDC\n");
out_fdc(NE7CMD_SPECIFY);/* specify command */
out_fdc(0xd0);
out_fdc(0x10);
fdc_dmabuf = (u_char *)malloc(NBPG, M_DEVBUF, M_WAITOK);
if (fdc_dmabuf == 0)
printf("fdcattach: WARNING!! malloc() failed.\n");
dma_bouncebuf[DRQ] = fdc_dmabuf;
printf("%s: uPD72065 FDC\n", fdc->sc_dev.dv_xname);
out_fdc(iot, ioh, NE7CMD_SPECIFY);/* specify command */
out_fdc(iot, ioh, 0xd0);
out_fdc(iot, ioh, 0x10);
/* physical limit: four drives per controller. */
for (fa.fa_drive = 0; fa.fa_drive < 4; fa.fa_drive++) {
(void)config_found(self, (void *)&fa, fdprint);
}
intio_enable_intr(SICILIAN_INTR_FDC);
}
void
fdcreset()
fdcreset(fdc)
struct fdc_softc *fdc;
{
infdc.stat = FDC_RESET;
bus_space_write_1(fdc->sc_iot, fdc->sc_ioh, fdsts, NE7CMD_RESET);
}
static int
fdcpoll(fdc)
struct fdc_softc *fdc;
{
int i = 25000;
int i = 25000, n;
while (--i > 0) {
if ((ioctlr.intr & 0x80)) {
out_fdc(NE7CMD_SENSEI);
fdcresult(fdc);
if ((intio_get_sicilian_intr() & SICILIAN_STAT_FDC)) {
out_fdc(fdc->sc_iot, fdc->sc_ioh, NE7CMD_SENSEI);
n = fdcresult(fdc);
break;
}
DELAY(100);
@ -460,7 +503,10 @@ fdprobe(parent, cf, aux)
{
struct fdc_softc *fdc = (void *)parent;
struct fd_type *type;
int drive = cf->cf_unit;
struct fdc_attach_args *fa = aux;
int drive = fa->fa_drive;
bus_space_tag_t iot = fdc->sc_iot;
bus_space_handle_t ioh = fdc->sc_ioh;
int n;
int found = 0;
int i;
@ -471,21 +517,21 @@ fdprobe(parent, cf, aux)
type = &fd_types[0]; /* XXX 1.2MB */
ioctlr.intr &= (~FDCI_EN);
intio_disable_intr(SICILIAN_INTR_FDC);
/* select drive and turn on motor */
infdc.select = 0x80 | (type->rate << 4)| drive;
bus_space_write_1(iot, ioh, fdctl, 0x80 | (type->rate << 4)| drive);
fdc_force_ready(FDCRDY);
fdcpoll(fdc);
retry:
out_fdc(NE7CMD_RECAL);
out_fdc(drive);
out_fdc(iot, ioh, NE7CMD_RECAL);
out_fdc(iot, ioh, drive);
i = 25000;
while (--i > 0) {
if ((ioctlr.intr & 0x80)) {
out_fdc(NE7CMD_SENSEI);
if ((intio_get_sicilian_intr() & SICILIAN_STAT_FDC)) {
out_fdc(iot, ioh, NE7CMD_SENSEI);
n = fdcresult(fdc);
break;
}
@ -495,10 +541,10 @@ retry:
#ifdef FDDEBUG
{
int i;
printf("fdprobe: status");
DPRINTF(("fdprobe: status"));
for (i = 0; i < n; i++)
printf(" %x", fdc->sc_status[i]);
printf("\n");
DPRINTF((" %x", fdc->sc_status[i]));
DPRINTF(("\n"));
}
#endif
@ -511,35 +557,36 @@ retry:
}
/* turn off motor */
infdc.select = (type->rate << 4)| drive;
bus_space_write_1(fdc->sc_iot, fdc->sc_ioh,
fdctl, (type->rate << 4)| drive);
fdc_force_ready(FDCSTBY);
if (!found) {
ioctlr.intr |= FDCI_EN;
intio_enable_intr(SICILIAN_INTR_FDC);
return 0;
}
return 1;
}
/*
* Controller is working, and drive responded. Attach it.
*/
void
fdattach(parent, self, aux)
struct device *parent;
struct device *self;
struct device *parent, *self;
void *aux;
{
struct fdc_softc *fdc = (void *)parent;
register struct fd_softc *fd = (void *)self;
struct fd_softc *fd = (void *)self;
struct fdc_attach_args *fa = aux;
int drive = fa->fa_drive;
struct fd_type *type = &fd_types[0]; /* XXX 1.2MB */
int drive = fa->fa_drive;
fd->sc_flags = 0;
ioctlr.intr |= FDCI_EN;
if (type)
printf(": %s %d cyl, %d head, %d sec\n", type->name,
type->tracks, type->heads, type->sectrac);
printf(": %s, %d cyl, %d head, %d sec\n", type->name,
type->cyls, type->heads, type->sectrac);
else
printf(": density unknown\n");
@ -565,6 +612,10 @@ fdattach(parent, self, aux)
* with RB_ASKNAME and get selected as the boot device.
*/
mountroothook_establish(fd_mountroot_hook, &fd->sc_dev);
#if NRND > 0
rnd_attach_source(&fd->rnd_source, fd->sc_dev.dv_xname, RND_TYPE_DISK);
#endif
}
__inline struct fd_type *
@ -592,10 +643,8 @@ fdstrategy(bp)
(fd = fd_cd.cd_devs[unit]) == 0 ||
bp->b_blkno < 0 ||
(bp->b_bcount % FDC_BSIZE) != 0) {
#ifdef FDDEBUG
printf("fdstrategy: unit=%d, blkno=%d, bcount=%d\n", unit,
bp->b_blkno, bp->b_bcount);
#endif
DPRINTF(("fdstrategy: unit=%d, blkno=%d, bcount=%d\n", unit,
bp->b_blkno, bp->b_bcount));
bp->b_error = EINVAL;
goto bad;
}
@ -693,6 +742,11 @@ fdfinish(fd, bp)
bp->b_resid = fd->sc_bcount;
fd->sc_skip = 0;
fd->sc_q.b_actf = bp->b_actf;
#if NRND > 0
rnd_add_uint32(&fd->rnd_source, bp->b_blkno);
#endif
biodone(bp);
/* turn off motor 5s from now */
timeout(fd_motor_off, fd, 5 * hz);
@ -730,7 +784,8 @@ fd_set_motor(fdc, reset)
DPRINTF(("fd_set_motor:\n"));
for (n = 0; n < 4; n++)
if ((fd = fdc->sc_fd[n]) && (fd->sc_flags & FD_MOTOR)) {
infdc.select = 0x80 | (fd->sc_type->rate << 4)| n;
bus_space_write_1(fdc->sc_iot, fdc->sc_ioh, fdctl,
0x80 | (fd->sc_type->rate << 4)| n);
}
}
@ -739,15 +794,17 @@ fd_motor_off(arg)
void *arg;
{
struct fd_softc *fd = arg;
struct fdc_softc *fdc = (struct fdc_softc*) fd->sc_dev.dv_parent;
int s;
DPRINTF(("fd_motor_off:\n"));
s = splbio();
fd->sc_flags &= ~(FD_MOTOR | FD_MOTOR_WAIT);
infdc.select = (fd->sc_type->rate << 4) | fd->sc_drive;
bus_space_write_1 (fdc->sc_iot, fdc->sc_ioh, fdctl,
(fd->sc_type->rate << 4) | fd->sc_drive);
#if 0
fd_set_motor((struct fdc_softc *)&fdc_softc[0], 0); /* XXX */
fd_set_motor(fdc, 0); /* XXX */
#endif
splx(s);
}
@ -765,7 +822,7 @@ fd_motor_on(arg)
s = splbio();
fd->sc_flags &= ~FD_MOTOR_WAIT;
if ((fdc->sc_drives.tqh_first == fd) && (fdc->sc_state == MOTORWAIT))
(void) fdcintr();
(void) fdcintr(fdc);
splx(s);
}
@ -773,14 +830,15 @@ int
fdcresult(fdc)
struct fdc_softc *fdc;
{
bus_space_tag_t iot = fdc->sc_iot;
bus_space_handle_t ioh = fdc->sc_ioh;
u_char i;
int j = 100000,
n = 0;
for (; j; j--) {
i = infdc.stat & (NE7_DIO | NE7_RQM | NE7_CB);
i = bus_space_read_1(iot, ioh, fdsts) &
(NE7_DIO | NE7_RQM | NE7_CB);
if (i == NE7_RQM)
return n;
@ -789,28 +847,30 @@ fdcresult(fdc)
log(LOG_ERR, "fdcresult: overrun\n");
return -1;
}
fdc->sc_status[n++] = infdc.data;
fdc->sc_status[n++] =
bus_space_read_1(iot, ioh, fddata);
}
delay(10);
}
log(LOG_ERR, "fdcresult: timeout\n");
return -1;
}
int
out_fdc(x)
out_fdc(iot, ioh, x)
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_char x;
{
int i = 100000;
while ((infdc.stat & NE7_DIO) && i-- > 0);
while ((bus_space_read_1(iot, ioh, fdsts) & NE7_DIO) && i-- > 0);
if (i <= 0)
return -1;
while ((infdc.stat & NE7_RQM) == 0 && i-- > 0);
while ((bus_space_read_1(iot, ioh, fdsts) & NE7_RQM) == 0 && i-- > 0);
if (i <= 0)
return -1;
infdc.data = x;
bus_space_write_1(iot, ioh, fddata, x);
return 0;
}
@ -823,6 +883,7 @@ fdopen(dev, flags, mode, p)
int unit;
struct fd_softc *fd;
struct fd_type *type;
struct fdc_softc *fdc;
unit = FDUNIT(dev);
if (unit >= fd_cd.cd_ndevs)
@ -838,10 +899,12 @@ fdopen(dev, flags, mode, p)
fd->sc_type != type)
return EBUSY;
fdc = (void *)fd->sc_dev.dv_parent;
if ((fd->sc_flags & FD_OPEN) == 0) {
/* Lock eject button */
infdc.drvstat = 0x40 | ( 1 << unit);
infdc.drvstat = 0x40;
bus_space_write_1(fdc->sc_iot, fdc->sc_ioh, fdout,
0x40 | ( 1 << unit));
bus_space_write_1(fdc->sc_iot, fdc->sc_ioh, fdout, 0x40);
}
fd->sc_type = type;
@ -868,7 +931,8 @@ fdclose(dev, flags, mode, p)
struct proc *p;
{
int unit = FDUNIT(dev);
struct fd_softc *fd = fd_cd.cd_devs[FDUNIT(dev)];
struct fd_softc *fd = fd_cd.cd_devs[unit];
struct fdc_softc *fdc = (void *)fd->sc_dev.dv_parent;
DPRINTF(("fdclose %d\n", unit));
@ -882,8 +946,9 @@ fdclose(dev, flags, mode, p)
}
if ((fd->sc_flags & FD_OPEN) == 0) {
infdc.drvstat = ( 1 << unit);
infdc.drvstat = 0x00;
bus_space_write_1(fdc->sc_iot, fdc->sc_ioh, fdout,
( 1 << unit));
bus_space_write_1(fdc->sc_iot, fdc->sc_ioh, fdout, 0);
}
return 0;
}
@ -901,7 +966,7 @@ fdcstart(fdc)
return;
}
#endif
(void) fdcintr();
(void) fdcintr(fdc);
}
void
@ -914,7 +979,7 @@ fdcstatus(dv, n, s)
char bits[64];
if (n == 0) {
out_fdc(NE7CMD_SENSEI);
out_fdc(fdc->sc_iot, fdc->sc_ioh, NE7CMD_SENSEI);
(void) fdcresult(fdc);
n = 2;
}
@ -964,30 +1029,36 @@ fdctimeout(arg)
else
fdc->sc_state = DEVIDLE;
(void) fdcintr();
(void) fdcintr(fdc);
splx(s);
}
#if 0
void
fdcpseudointr(arg)
void *arg;
{
int s;
struct fdc_softc *fdc = arg;
/* just ensure it has the right spl */
s = splbio();
(void) fdcintr();
(void) fdcintr(fdc);
splx(s);
}
#endif
int
fdcintr()
fdcintr(arg)
void *arg;
{
struct fdc_softc *fdc = (void *)((struct fd_softc*)fd_cd.cd_devs[0])->sc_dev.dv_parent; /* XXX */
struct fdc_softc *fdc = arg;
#define st0 fdc->sc_status[0]
#define cyl fdc->sc_status[1]
struct fd_softc *fd;
struct buf *bp;
bus_space_tag_t iot = fdc->sc_iot;
bus_space_handle_t ioh = fdc->sc_ioh;
int read, head, sec, pos, i, sectrac, nblks;
int tmp;
struct fd_type *type;
@ -997,9 +1068,10 @@ loop:
if (fd == NULL) {
DPRINTF(("fdcintr: set DEVIDLE\n"));
if (fdc->sc_state == DEVIDLE) {
if ((ioctlr.intr & 0x80)) {
out_fdc(NE7CMD_SENSEI);
if ((tmp = fdcresult(fdc)) != 2 || (st0 & 0xf8) != 0x20) {
if (intio_get_sicilian_intr() & SICILIAN_STAT_FDC) {
out_fdc(iot, ioh, NE7CMD_SENSEI);
if ((tmp = fdcresult(fdc)) != 2 ||
(st0 & 0xf8) != 0x20) {
goto loop;
}
}
@ -1058,13 +1130,13 @@ loop:
if (fd->sc_cylin == bp->b_cylin)
goto doio;
out_fdc(NE7CMD_SPECIFY);/* specify command */
out_fdc(0xd0); /* XXX const */
out_fdc(0x10);
out_fdc(iot, ioh, NE7CMD_SPECIFY);/* specify command */
out_fdc(iot, ioh, 0xd0); /* XXX const */
out_fdc(iot, ioh, 0x10);
out_fdc(NE7CMD_SEEK); /* seek function */
out_fdc(fd->sc_drive); /* drive number */
out_fdc(bp->b_cylin * fd->sc_type->step);
out_fdc(iot, ioh, NE7CMD_SEEK); /* seek function */
out_fdc(iot, ioh, fd->sc_drive); /* drive number */
out_fdc(iot, ioh, bp->b_cylin * fd->sc_type->step);
fd->sc_cylin = -1;
fdc->sc_state = SEEKWAIT;
@ -1143,19 +1215,20 @@ loop:
if (fd->sc_part != SEC_P11)
goto docopy;
fdc_dmastart(read, bp->b_data + fd->sc_skip, fd->sc_nbytes);
fdc_dmastart(fdc,
read, bp->b_data + fd->sc_skip, fd->sc_nbytes);
if (read)
out_fdc(NE7CMD_READ); /* READ */
out_fdc(iot, ioh, NE7CMD_READ); /* READ */
else
out_fdc(NE7CMD_WRITE); /* WRITE */
out_fdc((head << 2) | fd->sc_drive);
out_fdc(bp->b_cylin); /* cylinder */
out_fdc(head);
out_fdc(sec + 1); /* sector +1 */
out_fdc(type->secsize); /* sector size */
out_fdc(type->sectrac); /* sectors/track */
out_fdc(type->gap1); /* gap1 size */
out_fdc(type->datalen); /* data length */
out_fdc(iot, ioh, NE7CMD_WRITE); /* WRITE */
out_fdc(iot, ioh, (head << 2) | fd->sc_drive);
out_fdc(iot, ioh, bp->b_cylin); /* cylinder */
out_fdc(iot, ioh, head);
out_fdc(iot, ioh, sec + 1); /* sector +1 */
out_fdc(iot, ioh, type->secsize); /* sector size */
out_fdc(iot, ioh, type->sectrac); /* sectors/track */
out_fdc(iot, ioh, type->gap1); /* gap1 size */
out_fdc(iot, ioh, type->datalen); /* data length */
fdc->sc_state = IOCOMPLETE;
disk_busy(&fd->sc_dk);
@ -1167,16 +1240,16 @@ loop:
case DOCOPY:
docopy:
DPRINTF(("fdcintr: DOCOPY:\n"));
fdc_dmastart(B_READ, fd->sc_copybuf, 1024);
out_fdc(NE7CMD_READ); /* READ */
out_fdc((head << 2) | fd->sc_drive);
out_fdc(bp->b_cylin); /* cylinder */
out_fdc(head);
out_fdc(sec + 1); /* sector +1 */
out_fdc(type->secsize); /* sector size */
out_fdc(type->sectrac); /* sectors/track */
out_fdc(type->gap1); /* gap1 size */
out_fdc(type->datalen); /* data length */
fdc_dmastart(fdc, B_READ, fd->sc_copybuf, 1024);
out_fdc(iot, ioh, NE7CMD_READ); /* READ */
out_fdc(iot, ioh, (head << 2) | fd->sc_drive);
out_fdc(iot, ioh, bp->b_cylin); /* cylinder */
out_fdc(iot, ioh, head);
out_fdc(iot, ioh, sec + 1); /* sector +1 */
out_fdc(iot, ioh, type->secsize); /* sector size */
out_fdc(iot, ioh, type->sectrac); /* sectors/track */
out_fdc(iot, ioh, type->gap1); /* gap1 size */
out_fdc(iot, ioh, type->datalen); /* data length */
fdc->sc_state = COPYCOMPLETE;
/* allow 2 seconds for operation */
timeout(fdctimeout, fdc, 2 * hz);
@ -1217,17 +1290,17 @@ loop:
fd->sc_copybuf
+ (fd->sc_part & SEC_P01 ? FDC_BSIZE : 0),
FDC_BSIZE);
fdc_dmastart(read, fd->sc_copybuf, 1024);
fdc_dmastart(fdc, read, fd->sc_copybuf, 1024);
}
out_fdc(NE7CMD_WRITE); /* WRITE */
out_fdc((head << 2) | fd->sc_drive);
out_fdc(bp->b_cylin); /* cylinder */
out_fdc(head);
out_fdc(sec + 1); /* sector +1 */
out_fdc(fd->sc_type->secsize); /* sector size */
out_fdc(sectrac); /* sectors/track */
out_fdc(fd->sc_type->gap1); /* gap1 size */
out_fdc(fd->sc_type->datalen); /* data length */
out_fdc(iot, ioh, NE7CMD_WRITE); /* WRITE */
out_fdc(iot, ioh, (head << 2) | fd->sc_drive);
out_fdc(iot, ioh, bp->b_cylin); /* cylinder */
out_fdc(iot, ioh, head);
out_fdc(iot, ioh, sec + 1); /* sector +1 */
out_fdc(iot, ioh, fd->sc_type->secsize); /* sector size */
out_fdc(iot, ioh, sectrac); /* sectors/track */
out_fdc(iot, ioh, fd->sc_type->gap1); /* gap1 size */
out_fdc(iot, ioh, fd->sc_type->datalen); /* data length */
fdc->sc_state = IOCOMPLETE;
/* allow 2 seconds for operation */
timeout(fdctimeout, fdc, 2 * hz);
@ -1237,20 +1310,24 @@ loop:
untimeout(fdctimeout, fdc);
fdc->sc_state = SEEKCOMPLETE;
/* allow 1/50 second for heads to settle */
/* timeout(fdcpseudointr, fdc, hz / 50);*/
#if 0
timeout(fdcpseudointr, fdc, hz / 50);
#endif
return 1;
case SEEKCOMPLETE:
/* Make sure seek really happened */
DPRINTF(("fdcintr: SEEKCOMPLETE: FDC status = %x\n",
infdc.stat));
out_fdc(NE7CMD_SENSEI);
bus_space_read_1(fdc->sc_iot, fdc->sc_ioh, fdsts)));
out_fdc(iot, ioh, NE7CMD_SENSEI);
tmp = fdcresult(fdc);
if ((st0 & 0xf8) == 0xc0) {
DPRINTF(("fdcintr: first seek!\n"));
fdc->sc_state = DORECAL;
goto loop;
} else if (tmp != 2 || (st0 & 0xf8) != 0x20 || cyl != bp->b_cylin) {
} else if (tmp != 2 ||
(st0 & 0xf8) != 0x20 ||
cyl != bp->b_cylin) {
#ifdef FDDEBUG
fdcstatus(&fd->sc_dev, 2, "seek failed");
#endif
@ -1291,7 +1368,7 @@ loop:
#endif
iocomplete2:
if (fdc->sc_errors) {
diskerr(bp, "fd", "soft error", LOG_PRINTF,
diskerr(bp, "fd", "soft error (corrected)", LOG_PRINTF,
fd->sc_skip / FDC_BSIZE, (struct disklabel *)NULL);
printf("\n");
fdc->sc_errors = 0;
@ -1341,15 +1418,15 @@ loop:
untimeout(fdctimeout, fdc);
/* clear the controller output buffer */
for (i = 0; i < 4; i++) {
out_fdc(NE7CMD_SENSEI);
out_fdc(iot, ioh, NE7CMD_SENSEI);
(void) fdcresult(fdc);
}
/* fall through */
case DORECAL:
DPRINTF(("fdcintr: in DORECAL\n"));
out_fdc(NE7CMD_RECAL); /* recalibrate function */
out_fdc(fd->sc_drive);
out_fdc(iot, ioh, NE7CMD_RECAL); /* recalibrate function */
out_fdc(iot, ioh, fd->sc_drive);
fdc->sc_state = RECALWAIT;
timeout(fdctimeout, fdc, 5 * hz);
return 1; /* will return later */
@ -1359,12 +1436,14 @@ loop:
untimeout(fdctimeout, fdc);
fdc->sc_state = RECALCOMPLETE;
/* allow 1/30 second for heads to settle */
/* timeout(fdcpseudointr, fdc, hz / 30);*/
#if 0
timeout(fdcpseudointr, fdc, hz / 30);
#endif
return 1; /* will return later */
case RECALCOMPLETE:
DPRINTF(("fdcintr: in RECALCOMPLETE\n"));
out_fdc(NE7CMD_SENSEI);
out_fdc(iot, ioh, NE7CMD_SENSEI);
tmp = fdcresult(fdc);
if ((st0 & 0xf8) == 0xc0) {
DPRINTF(("fdcintr: first seek!\n"));
@ -1478,6 +1557,7 @@ fdioctl(dev, cmd, addr, flag, p)
struct proc *p;
{
struct fd_softc *fd = fd_cd.cd_devs[FDUNIT(dev)];
struct fdc_softc *fdc = (void*) fd->sc_dev.dv_parent;
int unit = FDUNIT(dev);
int part = DISKPART(dev);
struct disklabel buffer;
@ -1490,7 +1570,7 @@ fdioctl(dev, cmd, addr, flag, p)
*(struct disklabel *)addr = *(fd->sc_dk.dk_label);
return(0);
#else
bzero(&buffer, sizeof(buffer));
memset(&buffer, 0, sizeof(buffer));
buffer.d_secpercyl = fd->sc_type->seccyl;
buffer.d_type = DTYPE_FLOPPY;
@ -1546,7 +1626,7 @@ fdioctl(dev, cmd, addr, flag, p)
}
/* FALLTHROUGH */
case ODIOCEJECT:
fd_do_eject(unit);
fd_do_eject(fdc, unit);
return 0;
default:
@ -1559,12 +1639,14 @@ fdioctl(dev, cmd, addr, flag, p)
}
void
fd_do_eject(unit)
fd_do_eject(fdc, unit)
struct fdc_softc *fdc;
int unit;
{
infdc.drvstat = 0x20 | ( 1 << unit);
bus_space_write_1(fdc->sc_iot, fdc->sc_ioh, fdout,
0x20 | ( 1 << unit));
DELAY(1); /* XXX */
infdc.drvstat = 0x20;
bus_space_write_1(fdc->sc_iot, fdc->sc_ioh, fdout, 0x20);
}
/*
@ -1579,9 +1661,7 @@ fdgetdisklabel(sc, dev)
struct disklabel *lp;
int part;
#ifdef FDDEBUG
printf("fdgetdisklabel()\n");
#endif
DPRINTF(("fdgetdisklabel()\n"));
part = DISKPART(dev);
lp = sc->sc_dk.dk_label;
@ -1621,9 +1701,11 @@ void
fd_mountroot_hook(dev)
struct device *dev;
{
struct fd_softc *fd = (void*) dev;
struct fdc_softc *fdc = (void*) fd->sc_dev.dv_parent;
int c;
fd_do_eject(dev->dv_unit);
fd_do_eject(fdc, dev->dv_unit);
printf("Insert filesystem floppy and press return.");
for (;;) {
c = cngetc();

67
sys/arch/x68k/dev/fdreg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: fdreg.h,v 1.1.1.1 1996/05/05 12:17:03 oki Exp $ */
/* $NetBSD: fdreg.h,v 1.2 1999/03/16 16:30:18 minoura Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@ -42,61 +42,24 @@
/* uses NEC72065 controller */
#include <dev/ic/nec765reg.h>
/* Status registers returned as result of operation. */
#define ST0 0x00 /* status register 0 */
#define ST1 0x01 /* status register 1 */
#define ST2 0x02 /* status register 2 */
#define ST3 0x00 /* status register 3 (return by DRIVE_SENSE) */
#define ST_CYL 0x03 /* slot where controller reports cylinder */
#define ST_HEAD 0x04 /* slot where controller reports head */
#define ST_SEC 0x05 /* slot where controller reports sector */
#define ST_PCN 0x01 /* slot where controller reports present cyl */
/* Fields within the I/O ports. */
/* FDD registers */
#define EJECT 0x20
#define MOTOR_ON 0x80
/* Floppy disk controller command bytes. */
#define FDC_SEEK 0x0F /* command the drive to seek */
#define FDC_READ 0xE6 /* command the drive to read */
#define FDC_WRITE 0xC5 /* command the drive to write */
#define FDC_SENSE 0x08 /* command the controller to tell its status */
#define FDC_RECALIBRATE 0x07 /* command the drive to go to cyl 0 */
#define FDC_SPECIFY 0x03 /* command the drive to accept params */
#define FDC_READ_ID 0x4A /* command the drive to read sector identity */
#define FDC_FORMAT 0x4D /* command the drive to format a track */
#define FDC_RESET 0x36 /* reset command for fdc */
/* Main status register. */
#define NE7_D0B 0x01 /* Diskette drive 0 is seeking, thus busy */
#define NE7_D1B 0x02 /* Diskette drive 1 is seeking, thus busy */
#define NE7_D2B 0x01 /* Diskette drive 2 is seeking, thus busy */
#define NE7_D3B 0x02 /* Diskette drive 3 is seeking, thus busy */
#define NE7_CB 0x10 /* Diskette Controller Busy */
#define NE7_NDM 0x20 /* Diskette Controller in Non Dma Mode */
#define NE7_DIO 0x40 /* Diskette Controller Data register I/O */
#define NE7_RQM 0x80 /* Diskette Controller ReQuest for Master */
/* registers */
#define fdout 2 /* Digital Output Register (W) */
#define FDO_FDSEL 0x03 /* floppy device select */
#define FDO_FRST 0x04 /* floppy controller reset */
#define FDO_FDMAEN 0x08 /* enable floppy DMA and Interrupt */
#define FDO_MOEN(n) ((1 << n) * 0x10) /* motor enable */
#define fdsts 4 /* NEC 765 Main Status Register (R) */
#define fddata 5 /* NEC 765 Data Register (R/W) */
#define fdctl 7 /* Control Register (W) */
#define fdsts 0 /* NEC 765 Main Status Register (R) */
#define fddata 1 /* NEC 765 Data Register (R/W) */
#define fdout 2 /* Digital Output Register (W) */
#define fdctl 3 /* Control Register (W) */
#define FDC_500KBPS 0x00 /* 500KBPS MFM drive transfer rate */
#define FDC_300KBPS 0x01 /* 300KBPS MFM drive transfer rate */
#define FDC_250KBPS 0x02 /* 250KBPS MFM drive transfer rate */
#define FDC_125KBPS 0x03 /* 125KBPS FM drive transfer rate */
#define fdin 7 /* Digital Input Register (R) */
#define FDI_DCHG 0x80 /* diskette has been changed */
#define FDC_BSIZE 512
#define FDC_NPORT 8
#define FDC_MAXIOSIZE NBPG /* XXX should be MAXBSIZE */
#define FDC_MAXIOSIZE MAXBSIZE
/* Floppy disk controller command bytes. */
#define NE7CMD_RESET 0x36 /* reset command for fdc */
/* default attach args */
#define FDC_ADDR 0xe94000 /* builtin fdc is here */
#define FDC_INTR 96 /* interrupt vector */
#define FDC_DMA 0 /* DMA ch# */
#define FDC_DMAINTR 100 /* DMA interrupt vector */

4
sys/arch/x68k/dev/grf_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: grf_machdep.c,v 1.11 1998/08/06 14:08:54 minoura Exp $ */
/* $NetBSD: grf_machdep.c,v 1.12 1999/03/16 16:30:18 minoura Exp $ */
/*
* Copyright (c) 1991 University of Utah.
@ -59,6 +59,8 @@
* false when initing for the console.
*/
extern int x68k_realconfig;
int x68k_config_found __P((struct cfdata *, struct device *,
void *, cfprint_t));
int grfbusprint __P((void *auxp, const char *));
int grfbusmatch __P((struct device *, struct cfdata *, void *));

1591
sys/arch/x68k/dev/if_ed.c
View File

File diff suppressed because it is too large Load Diff

398
sys/arch/x68k/dev/if_edreg.h
View File

@ -1,398 +0,0 @@
/* $NetBSD: if_edreg.h,v 1.1.1.1 1996/05/05 12:17:03 oki Exp $ */
/*
* National Semiconductor DS8390 NIC register definitions.
*
* Copyright (C) 1993, David Greenman. This software may be used, modified,
* copied, distributed, and sold, in both source and binary form provided that
* the above copyright and these terms are retained. Under no circumstances is
* the author responsible for the proper functioning of this software, nor does
* the author assume any responsibility for damages incurred with its use.
*/
/*
* Vendor types
*/
#define ED_VENDOR_WD_SMC 0x00 /* Western Digital/SMC */
#define ED_VENDOR_3COM 0x01 /* 3Com */
#define ED_VENDOR_NOVELL 0x02 /* Novell */
/*
* Compile-time config flags
*/
/*
* This sets the default for enabling/disablng the tranceiver.
*/
#define ED_FLAGS_DISABLE_TRANCEIVER 0x0001
/*
* This forces the board to be used in 8/16-bit mode even if it autoconfigs
* differently.
*/
#define ED_FLAGS_FORCE_8BIT_MODE 0x0002
#define ED_FLAGS_FORCE_16BIT_MODE 0x0004
/*
* This disables the use of double transmit buffers.
*/
#define ED_FLAGS_NO_MULTI_BUFFERING 0x0008
/*
* This forces all operations with the NIC memory to use Programmed I/O (i.e.
* not via shared memory).
*/
#define ED_FLAGS_FORCE_PIO 0x0010
/*
* Definitions for Western digital/SMC WD80x3 series ASIC
*/
/*
* Memory Select Register (MSR)
*/
#define ED_WD_MSR 0
/* next three definitions for Toshiba */
#define ED_WD_MSR_POW 0x02 /* 0 = power save, 1 = normal (R/W) */
#define ED_WD_MSR_BSY 0x04 /* gate array busy (R) */
#define ED_WD_MSR_LEN 0x20 /* 0 = 16-bit, 1 = 8-bit (R/W) */
#define ED_WD_MSR_ADDR 0x3f /* Memory decode bits 18-13 */
#define ED_WD_MSR_MENB 0x40 /* Memory enable */
#define ED_WD_MSR_RST 0x80 /* Reset board */
/*
* Interface Configuration Register (ICR)
*/
#define ED_WD_ICR 1
#define ED_WD_ICR_16BIT 0x01 /* 16-bit interface */
#define ED_WD_ICR_OAR 0x02 /* select register (0=BIO 1=EAR) */
#define ED_WD_ICR_IR2 0x04 /* high order bit of encoded IRQ */
#define ED_WD_ICR_MSZ 0x08 /* memory size (0=8k 1=32k) */
#define ED_WD_ICR_RLA 0x10 /* recall LAN address */
#define ED_WD_ICR_RX7 0x20 /* recall all but i/o and LAN address */
#define ED_WD_ICR_RIO 0x40 /* recall i/o address */
#define ED_WD_ICR_STO 0x80 /* store to non-volatile memory */
#ifdef TOSH_ETHER
#define ED_WD_ICR_MEM 0xe0 /* shared mem address A15-A13 (R/W) */
#define ED_WD_ICR_MSZ1 0x0f /* memory size, 0x08 = 64K, 0x04 = 32K,
0x02 = 16K, 0x01 = 8K */
/* 64K can only be used if mem address
above 1MB */
/* IAR holds address A23-A16 (R/W) */
#endif
/*
* IO Address Register (IAR)
*/
#define ED_WD_IAR 2
/*
* EEROM Address Register
*/
#define ED_WD_EAR 3
/*
* Interrupt Request Register (IRR)
*/
#define ED_WD_IRR 4
#define ED_WD_IRR_0WS 0x01 /* use 0 wait-states on 8 bit bus */
#define ED_WD_IRR_OUT1 0x02 /* WD83C584 pin 1 output */
#define ED_WD_IRR_OUT2 0x04 /* WD83C584 pin 2 output */
#define ED_WD_IRR_OUT3 0x08 /* WD83C584 pin 3 output */
#define ED_WD_IRR_FLASH 0x10 /* Flash RAM is in the ROM socket */
/*
* The three bits of the encoded IRQ are decoded as follows:
*
* IR2 IR1 IR0 IRQ
* 0 0 0 2/9
* 0 0 1 3
* 0 1 0 5
* 0 1 1 7
* 1 0 0 10
* 1 0 1 11
* 1 1 0 15
* 1 1 1 4
*/
#define ED_WD_IRR_IR0 0x20 /* bit 0 of encoded IRQ */
#define ED_WD_IRR_IR1 0x40 /* bit 1 of encoded IRQ */
#define ED_WD_IRR_IEN 0x80 /* Interrupt enable */
/*
* LA Address Register (LAAR)
*/
#define ED_WD_LAAR 5
#define ED_WD_LAAR_ADDRHI 0x1f /* bits 23-19 of RAM address */
#define ED_WD_LAAR_0WS16 0x20 /* enable 0 wait-states on 16 bit bus */
#define ED_WD_LAAR_L16EN 0x40 /* enable 16-bit operation */
#define ED_WD_LAAR_M16EN 0x80 /* enable 16-bit memory access */
/* i/o base offset to station address/card-ID PROM */
#define ED_WD_PROM 8
/*
* 83C790 specific registers
*/
/*
* Hardware Support Register (HWR) ('790)
*/
#define ED_WD790_HWR 4
#define ED_WD790_HWR_RST 0x10 /* hardware reset */
#define ED_WD790_HWR_LPRM 0x40 /* LAN PROM select */
#define ED_WD790_HWR_SWH 0x80 /* switch register set */
/*
* ICR790 Interrupt Control Register for the 83C790
*/
#define ED_WD790_ICR 6
#define ED_WD790_ICR_EIL 0x01 /* enable interrupts */
/*
* General Control Register (GCR)
* Eanbled with SWH bit == 1 in HWR register
*/
#define ED_WD790_GCR 0x0d
#define ED_WD790_GCR_IR0 0x04 /* bit 0 of encoded IRQ */
#define ED_WD790_GCR_IR1 0x08 /* bit 1 of encoded IRQ */
#define ED_WD790_GCR_ZWSEN 0x20 /* zero wait state enable */
#define ED_WD790_GCR_IR2 0x40 /* bit 2 of encoded IRQ */
/*
* The three bits of the encoded IRQ are decoded as follows:
*
* IR2 IR1 IR0 IRQ
* 0 0 0 none
* 0 0 1 9
* 0 1 0 3
* 0 1 1 5
* 1 0 0 7
* 1 0 1 10
* 1 1 0 11
* 1 1 1 15
*/
/* i/o base offset to CARD ID */
#define ED_WD_CARD_ID ED_WD_PROM+6
/* Board type codes in card ID */
#define ED_TYPE_WD8003S 0x02
#define ED_TYPE_WD8003E 0x03
#define ED_TYPE_WD8013EBT 0x05
#define ED_TYPE_TOSHIBA1 0x11 /* named PCETA1 */
#define ED_TYPE_TOSHIBA2 0x12 /* named PCETA2 */
#define ED_TYPE_TOSHIBA3 0x13 /* named PCETB */
#define ED_TYPE_TOSHIBA4 0x14 /* named PCETC */
#define ED_TYPE_WD8003W 0x24
#define ED_TYPE_WD8003EB 0x25
#define ED_TYPE_WD8013W 0x26
#define ED_TYPE_WD8013EP 0x27
#define ED_TYPE_WD8013WC 0x28
#define ED_TYPE_WD8013EPC 0x29
#define ED_TYPE_SMC8216T 0x2a
#define ED_TYPE_SMC8216C 0x2b
#define ED_TYPE_WD8013EBP 0x2c
/* Bit definitions in card ID */
#define ED_WD_REV_MASK 0x1f /* Revision mask */
#define ED_WD_SOFTCONFIG 0x20 /* Soft config */
#define ED_WD_LARGERAM 0x40 /* Large RAM */
#define ED_MICROCHANEL 0x80 /* Microchannel bus (vs. isa) */
/*
* Checksum total. All 8 bytes in station address PROM will add up to this.
*/
#ifdef TOSH_ETHER
#define ED_WD_ROM_CHECKSUM_TOTAL 0xA5
#else
#define ED_WD_ROM_CHECKSUM_TOTAL 0xFF
#endif
#define ED_WD_NIC_OFFSET 0x10 /* I/O base offset to NIC */
#define ED_WD_ASIC_OFFSET 0 /* I/O base offset to ASIC */
#define ED_WD_IO_PORTS 32 /* # of i/o addresses used */
#define ED_WD_PAGE_OFFSET 0 /* page offset for NIC access to mem */
/*
* Definitions for 3Com 3c503
*/
#define ED_3COM_NIC_OFFSET 0
#define ED_3COM_ASIC_OFFSET 0x400 /* offset to nic i/o regs */
/*
* XXX - The I/O address range is fragmented in the 3c503; this is the
* number of regs at iobase.
*/
#define ED_3COM_IO_PORTS 16 /* # of i/o addresses used */
/* tx memory starts in second bank on 8bit cards */
#define ED_3COM_TX_PAGE_OFFSET_8BIT 0x20
/* tx memory starts in first bank on 16bit cards */
#define ED_3COM_TX_PAGE_OFFSET_16BIT 0x0
/* ...and rx memory starts in second bank */
#define ED_3COM_RX_PAGE_OFFSET_16BIT 0x20
/*
* Page Start Register. Must match PSTART in NIC.
*/
#define ED_3COM_PSTR 0
/*
* Page Stop Register. Must match PSTOP in NIC.
*/
#define ED_3COM_PSPR 1
/*
* DrQ Timer Register. Determines number of bytes to be transfered during a
* DMA burst.
*/
#define ED_3COM_DQTR 2
/*
* Base Configuration Register. Read-only register which contains the
* board-configured I/O base address of the adapter. Bit encoded.
*/
#define ED_3COM_BCFR 3
/*
* EPROM Configuration Register. Read-only register which contains the
* board-configured memory base address. Bit encoded.
*/
#define ED_3COM_PCFR 4
/*
* GA Configuration Register. Gate-Array Configuration Register.
*
* mbs2 mbs1 mbs0 start address
* 0 0 0 0x0000
* 0 0 1 0x2000
* 0 1 0 0x4000
* 0 1 1 0x6000
*
* Note that with adapters with only 8K, the setting for 0x2000 must always be
* used.
*/
#define ED_3COM_GACFR 5
#define ED_3COM_GACFR_MBS0 0x01
#define ED_3COM_GACFR_MBS1 0x02
#define ED_3COM_GACFR_MBS2 0x04
#define ED_3COM_GACFR_RSEL 0x08 /* enable shared memory */
#define ED_3COM_GACFR_TEST 0x10 /* for GA testing */
#define ED_3COM_GACFR_OWS 0x20 /* select 0WS access to GA */
#define ED_3COM_GACFR_TCM 0x40 /* Mask DMA interrupts */
#define ED_3COM_GACFR_NIM 0x80 /* Mask NIC interrupts */
/*
* Control Register. Miscellaneous control functions.
*/
#define ED_3COM_CR 6
#define ED_3COM_CR_RST 0x01 /* Reset GA and NIC */
#define ED_3COM_CR_XSEL 0x02 /* Transceiver select. BNC=1(def) AUI=0 */
#define ED_3COM_CR_EALO 0x04 /* window EA PROM 0-15 to I/O base */
#define ED_3COM_CR_EAHI 0x08 /* window EA PROM 16-31 to I/O base */
#define ED_3COM_CR_SHARE 0x10 /* select interrupt sharing option */
#define ED_3COM_CR_DBSEL 0x20 /* Double buffer select */
#define ED_3COM_CR_DDIR 0x40 /* DMA direction select */
#define ED_3COM_CR_START 0x80 /* Start DMA controller */
/*
* Status Register. Miscellaneous status information.
*/
#define ED_3COM_STREG 7
#define ED_3COM_STREG_REV 0x07 /* GA revision */
#define ED_3COM_STREG_DIP 0x08 /* DMA in progress */
#define ED_3COM_STREG_DTC 0x10 /* DMA terminal count */
#define ED_3COM_STREG_OFLW 0x20 /* Overflow */
#define ED_3COM_STREG_UFLW 0x40 /* Underflow */
#define ED_3COM_STREG_DPRDY 0x80 /* Data port ready */
/*
* Interrupt/DMA Configuration Register
*/
#define ED_3COM_IDCFR 8
#define ED_3COM_IDCFR_DRQ 0x07 /* DMA request */
#define ED_3COM_IDCFR_UNUSED 0x08 /* not used */
#if 0
#define ED_3COM_IDCFR_IRQ 0xF0 /* Interrupt request */
#else
#define ED_3COM_IDCFR_IRQ2 0x10 /* Interrupt request 2 select */
#define ED_3COM_IDCFR_IRQ3 0x20 /* Interrupt request 3 select */
#define ED_3COM_IDCFR_IRQ4 0x40 /* Interrupt request 4 select */
#define ED_3COM_IDCFR_IRQ5 0x80 /* Interrupt request 5 select */
#endif
/*
* DMA Address Register MSB
*/
#define ED_3COM_DAMSB 9
/*
* DMA Address Register LSB
*/
#define ED_3COM_DALSB 0x0a
/*
* Vector Pointer Register 2
*/
#define ED_3COM_VPTR2 0x0b
/*
* Vector Pointer Register 1
*/
#define ED_3COM_VPTR1 0x0c
/*
* Vector Pointer Register 0
*/
#define ED_3COM_VPTR0 0x0d
/*
* Register File Access MSB
*/
#define ED_3COM_RFMSB 0x0e
/*
* Register File Access LSB
*/
#define ED_3COM_RFLSB 0x0f
/*
* Definitions for Novell NE1000/2000 boards
*/
/*
* Board type codes
*/
#define ED_TYPE_NE1000 0x01
#define ED_TYPE_NE2000 0x02
/*
* Register offsets/total
*/
#define ED_NOVELL_NIC_OFFSET 0x200
#define ED_NOVELL_ASIC_OFFSET 0x220
#define ED_NOVELL_IO_PORTS 32
/*
* Remote DMA data register; for reading or writing to the NIC mem via
* programmed I/O (offset from ASIC base).
*/
#define ED_NOVELL_DATA 0x00
/*
* Reset register; reading from this register causes a board reset.
*/
#define ED_NOVELL_RESET 0x1e

240
sys/arch/x68k/dev/if_ne_neptune.c Normal file
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/* $NetBSD: if_ne_neptune.c,v 1.2 1999/03/16 16:30:18 minoura Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "opt_inet.h"
#include "opt_ns.h"
#include "bpfilter.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/mbuf.h>
#include <sys/socket.h>
#include <sys/ioctl.h>
#include <sys/errno.h>
#include <sys/syslog.h>
#include <sys/select.h>
#include <sys/device.h>
#include <net/if.h>
#include <net/if_dl.h>
#include <net/if_ether.h>
#include <net/if_media.h>
#ifdef INET
#include <netinet/in.h>
#include <netinet/in_systm.h>
#include <netinet/in_var.h>
#include <netinet/ip.h>
#include <netinet/if_inarp.h>
#endif
#ifdef NS
#include <netns/ns.h>
#include <netns/ns_if.h>
#endif
#if NBPFILTER > 0
#include <net/bpf.h>
#include <net/bpfdesc.h>
#endif
#include <machine/bus.h>
#include <dev/ic/dp8390reg.h>
#include <dev/ic/dp8390var.h>
#include <dev/ic/ne2000reg.h>
#include <dev/ic/ne2000var.h>
#include <dev/ic/rtl80x9reg.h>
#include <dev/ic/rtl80x9var.h>
#include <arch/x68k/dev/neptunevar.h>
static int ne_neptune_match __P((struct device *, struct cfdata *, void *));
static void ne_neptune_attach __P((struct device *, struct device *, void *));
static int ne_neptune_intr __P((void *));
#define ne_neptune_softc ne2000_softc
struct cfattach ne_neptune_ca = {
sizeof(struct ne_neptune_softc), ne_neptune_match, ne_neptune_attach
};
int
ne_neptune_match(parent, match, aux)
struct device *parent;
struct cfdata *match;
void *aux;
{
struct neptune_attach_args *na = aux;
bus_space_tag_t nict = na->na_bst;
bus_space_handle_t nich;
bus_space_tag_t asict;
bus_space_handle_t asich;
int rv = 0;
if (na->na_addr == NEPTUNECF_ADDR_DEFAULT)
na->na_addr = 0x300;
/* Make sure this is a valid NE[12]000 i/o address. */
if ((na->na_addr & 0x1f) != 0)
return (0);
/* Map i/o space. */
if (bus_space_map(nict, na->na_addr, NE2000_NPORTS*2, 0, &nich))
return (0);
asict = nict;
if (bus_space_subregion(nict, nich, NE2000_ASIC_OFFSET,
NE2000_ASIC_NPORTS*2, &asich))
goto out;
/* Look for an NE2000-compatible card. */
rv = ne2000_detect(nict, nich, asict, asich);
out:
bus_space_unmap(nict, nich, NE2000_NPORTS);
return (rv);
}
void
ne_neptune_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct ne_neptune_softc *nsc = (struct ne_neptune_softc *)self;
struct dp8390_softc *dsc = &nsc->sc_dp8390;
struct neptune_attach_args *na = aux;
bus_space_tag_t nict = na->na_bst;
bus_space_handle_t nich;
bus_space_tag_t asict = nict;
bus_space_handle_t asich;
void (*npp_init_media) __P((struct dp8390_softc *, int **,
int *, int *));
int *media, nmedia, defmedia;
const char *typestr;
int netype;
printf("\n");
npp_init_media = NULL;
media = NULL;
nmedia = defmedia = 0;
/* Map i/o space. */
if (bus_space_map(nict, na->na_addr, NE2000_NPORTS*2, 0, &nich)) {
printf("%s: can't map i/o space\n", dsc->sc_dev.dv_xname);
return;
}
if (bus_space_subregion(nict, nich, NE2000_ASIC_OFFSET,
NE2000_ASIC_NPORTS*2, &asich)) {
printf("%s: can't subregion i/o space\n", dsc->sc_dev.dv_xname);
return;
}
dsc->sc_regt = nict;
dsc->sc_regh = nich;
nsc->sc_asict = asict;
nsc->sc_asich = asich;
/*
* Detect it again, so we can print some information about the
* interface.
*/
netype = ne2000_detect(nict, nich, asict, asich);
switch (netype) {
case NE2000_TYPE_NE1000:
typestr = "NE1000";
break;
case NE2000_TYPE_NE2000:
typestr = "NE2000";
/*
* Check for a RealTek 8019.
*/
bus_space_write_1(nict, nich, ED_P0_CR,
ED_CR_PAGE_0 | ED_CR_STP);
if (bus_space_read_1(nict, nich, NERTL_RTL0_8019ID0) ==
RTL0_8019ID0 &&
bus_space_read_1(nict, nich, NERTL_RTL0_8019ID1) ==
RTL0_8019ID1) {
typestr = "NE2000 (RTL8019)";
npp_init_media = rtl80x9_init_media;
dsc->sc_mediachange = rtl80x9_mediachange;
dsc->sc_mediastatus = rtl80x9_mediastatus;
dsc->init_card = rtl80x9_init_card;
}
break;
default:
printf("%s: where did the card go?!\n", dsc->sc_dev.dv_xname);
return;
}
printf("%s: %s Ethernet\n", dsc->sc_dev.dv_xname, typestr);
/* Initialize media, if we have it. */
if (npp_init_media != NULL)
(*npp_init_media)(dsc, &media, &nmedia, &defmedia);
/* This interface is always enabled. */
dsc->sc_enabled = 1;
/*
* Do generic NE2000 attach. This will read the station address
* from the EEPROM.
*/
ne2000_attach(nsc, NULL, media, nmedia, defmedia);
/* Establish the interrupt handler. */
if (neptune_intr_establish(na->na_intr, "ne", ne_neptune_intr, dsc))
printf("%s: couldn't establish interrupt handler\n",
dsc->sc_dev.dv_xname);
}
static int
ne_neptune_intr(arg)
void *arg;
{
spl4(); /* XXX */
return dp8390_intr(arg);
}

967
sys/arch/x68k/dev/intio.c Normal file
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/* $NetBSD: intio.c,v 1.2 1999/03/16 16:30:18 minoura Exp $ */
/*
*
* Copyright (c) 1998 NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles D. Cranor and
* Washington University.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* NetBSD/x68k internal I/O virtual bus.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <sys/mbuf.h>
#include <sys/extent.h>
#include <vm/vm.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/frame.h>
#include <arch/x68k/dev/intiovar.h>
#include <arch/x68k/dev/mfp.h>
/*
* bus_space(9) interface
*/
static int intio_bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *));
static void intio_bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
static int intio_bus_space_subregion __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *));
static struct x68k_bus_space intio_bus = {
#if 0
X68K_INTIO_BUS,
#endif
intio_bus_space_map, intio_bus_space_unmap, intio_bus_space_subregion,
x68k_bus_space_alloc, x68k_bus_space_free,
#if 0
x68k_bus_space_barrier,
#endif
0
};
/*
* bus_dma(9) interface
*/
#define INTIO_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
int _intio_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int,
bus_size_t, bus_size_t, int, bus_dmamap_t *));
void _intio_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
int _intio_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
bus_size_t, struct proc *, int));
int _intio_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
struct mbuf *, int));
int _intio_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
struct uio *, int));
int _intio_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
bus_dma_segment_t *, int, bus_size_t, int));
void _intio_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
void _intio_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
bus_addr_t, bus_size_t, int));
int _intio_bus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t,
bus_size_t, bus_dma_segment_t *, int, int *, int));
int _intio_dma_alloc_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t,
bus_size_t, int));
void _intio_dma_free_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t));
struct x68k_bus_dma intio_bus_dma = {
INTIO_DMA_BOUNCE_THRESHOLD,
_intio_bus_dmamap_create,
_intio_bus_dmamap_destroy,
_intio_bus_dmamap_load,
_intio_bus_dmamap_load_mbuf,
_intio_bus_dmamap_load_uio,
_intio_bus_dmamap_load_raw,
_intio_bus_dmamap_unload,
_intio_bus_dmamap_sync,
_intio_bus_dmamem_alloc,
x68k_bus_dmamem_free,
x68k_bus_dmamem_map,
x68k_bus_dmamem_unmap,
x68k_bus_dmamem_mmap,
};
/*
* autoconf stuff
*/
static int intio_match __P((struct device *, struct cfdata *, void *));
static void intio_attach __P((struct device *, struct device *, void *));
static int intio_search __P((struct device *, struct cfdata *cf, void *));
static int intio_print __P((void *, const char *));
static void intio_alloc_system_ports __P((struct intio_softc*));
struct cfattach intio_ca = {
sizeof(struct intio_softc), intio_match, intio_attach
};
static struct intio_interrupt_vector {
intio_intr_handler_t iiv_handler;
void *iiv_arg;
int iiv_intrcntoff;
} iiv[256] = {0,};
extern struct cfdriver intio_cd;
/* used in console initialization */
extern int x68k_realconfig;
int x68k_config_found __P((struct cfdata *, struct device *,
void *, cfprint_t));
static struct cfdata *cfdata_intiobus = NULL;
/* other static functions */
static int scan_intrnames __P((const char *));
static int
intio_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux; /* NULL */
{
if (strcmp(aux, intio_cd.cd_name) != 0)
return (0);
if (cf->cf_unit != 0)
return (0);
if (x68k_realconfig == 0)
cfdata_intiobus = cf; /* XXX */
return (1);
}
/* used in console initialization: configure only MFP */
static struct intio_attach_args initial_ia = {
&intio_bus,
0/*XXX*/,
"mfp", /* ia_name */
MFP_ADDR, /* ia_addr */
MFP_INTR, /* ia_intr */
-1 /* ia_dma */
-1, /* ia_dmaintr */
};
static void
intio_attach(parent, self, aux)
struct device *parent, *self;
void *aux; /* NULL */
{
struct intio_softc *sc = (struct intio_softc *)self;
struct intio_attach_args ia;
if (self == NULL) {
/* console only init */
x68k_config_found(cfdata_intiobus, NULL, &initial_ia, NULL);
return;
}
printf (" mapped at %08p\n", intiobase);
sc->sc_map = extent_create("intiomap",
PHYS_INTIODEV,
PHYS_INTIODEV + 0x400000,
M_DEVBUF, NULL, NULL, EX_NOWAIT);
intio_alloc_system_ports (sc);
sc->sc_bst = &intio_bus;
sc->sc_bst->x68k_bus_device = self;
sc->sc_dmat = &intio_bus_dma;
sc->sc_dmac = 0;
bzero(iiv, sizeof (struct intio_interrupt_vector) * 256);
ia.ia_bst = sc->sc_bst;
ia.ia_dmat = sc->sc_dmat;
config_search (intio_search, self, &ia);
}
static int
intio_search(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct intio_attach_args *ia = aux;
struct intio_softc *sc = (struct intio_softc *)parent;
ia->ia_bst = sc->sc_bst;
ia->ia_dmat = sc->sc_dmat;
ia->ia_name = cf->cf_driver->cd_name;
ia->ia_addr = cf->cf_addr;
ia->ia_intr = cf->cf_intr;
ia->ia_dma = cf->cf_dma;
ia->ia_dmaintr = cf->cf_dmaintr;
if ((*cf->cf_attach->ca_match)(parent, cf, ia) > 0)
config_attach(parent, cf, ia, intio_print);
return (0);
}
static int
intio_print(aux, name)
void *aux;
const char *name;
{
struct intio_attach_args *ia = aux;
/* if (ia->ia_addr > 0) */
printf (" addr 0x%06x", ia->ia_addr);
if (ia->ia_intr > 0)
printf (" intr 0x%02x", ia->ia_intr);
if (ia->ia_dma >= 0) {
printf (" using DMA ch%d", ia->ia_dma);
if (ia->ia_dmaintr > 0)
printf (" intr 0x%02x and 0x%02x",
ia->ia_dmaintr, ia->ia_dmaintr+1);
}
return (QUIET);
}
/*
* intio memory map manager
*/
int
intio_map_allocate_region(parent, ia, flag)
struct device *parent;
struct intio_attach_args *ia;
enum intio_map_flag flag; /* INTIO_MAP_TESTONLY or INTIO_MAP_ALLOCATE */
{
struct intio_softc *sc = (struct intio_softc*) parent;
struct extent *map = sc->sc_map;
int r;
r = extent_alloc_region (map, ia->ia_addr, ia->ia_size, 0);
#ifdef DEBUG
extent_print (map);
#endif
if (r == 0) {
if (flag != INTIO_MAP_ALLOCATE)
extent_free (map, ia->ia_addr, ia->ia_size, 0);
return 0;
}
return -1;
}
int
intio_map_free_region(parent, ia)
struct device *parent;
struct intio_attach_args *ia;
{
struct intio_softc *sc = (struct intio_softc*) parent;
struct extent *map = sc->sc_map;
extent_free (map, ia->ia_addr, ia->ia_size, 0);
#ifdef DEBUG
extent_print (map);
#endif
return 0;
}
void
intio_alloc_system_ports(sc)
struct intio_softc *sc;
{
extent_alloc_region (sc->sc_map, INTIO_SYSPORT, 16, 0);
extent_alloc_region (sc->sc_map, INTIO_SICILIAN, 0x2000, 0);
}
/*
* intio bus space stuff.
*/
static int
intio_bus_space_map(t, bpa, size, flags, bshp)
bus_space_tag_t t;
bus_addr_t bpa;
bus_size_t size;
int flags;
bus_space_handle_t *bshp;
{
/*
* Intio bus is mapped permanently.
*/
*bshp = (bus_space_handle_t)
((u_int) bpa - PHYS_INTIODEV + intiobase);
/*
* Some devices are mapped on odd addresses only.
*/
if (flags & BUS_SPACE_MAP_SHIFTED)
*bshp += 0x80000001;
return (0);
}
static void
intio_bus_space_unmap(t, bsh, size)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t size;
{
return;
}
static int
intio_bus_space_subregion(t, bsh, offset, size, nbshp)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset, size;
bus_space_handle_t *nbshp;
{
*nbshp = bsh + offset;
return (0);
}
/*
* interrupt handler
*/
int
intio_intr_establish (vector, name, handler, arg)
int vector;
const char *name; /* XXX */
intio_intr_handler_t handler;
void *arg;
{
if (vector < 16)
panic ("Invalid interrupt vector");
if (iiv[vector].iiv_handler)
return EBUSY;
iiv[vector].iiv_handler = handler;
iiv[vector].iiv_arg = arg;
iiv[vector].iiv_intrcntoff = scan_intrnames(name);
return 0;
}
static int
scan_intrnames (name)
const char *name;
{
extern char intrnames[];
extern char eintrnames[];
int r = 0;
char *p = &intrnames[0];
for (;;) {
if (*p == 0) { /* new intr */
if (p + strlen(name) >= eintrnames)
panic ("Interrupt statics buffer overrun.");
strcpy (p, name);
break;
}
if (strcmp(p, name) == 0)
break;
r++;
while (*p++ != 0);
}
return r;
}
int
intio_intr_disestablish (vector, arg)
int vector;
void *arg;
{
if (iiv[vector].iiv_handler == 0 || iiv[vector].iiv_arg != arg)
return EINVAL;
iiv[vector].iiv_handler = 0;
iiv[vector].iiv_arg = 0;
return 0;
}
int
intio_intr (frame)
struct frame *frame;
{
int vector = frame->f_vector / 4;
extern int intrcnt[];
#if 0 /* this is not correct now */
/* CAUTION: HERE WE ARE IN SPLHIGH() */
/* LOWER TO APPROPRIATE IPL AT VERY FIRST IN THE HANDLER!! */
#endif
if (iiv[vector].iiv_handler == 0) {
printf ("Stray interrupt: %d type %x\n", vector, frame->f_format);
return 0;
}
intrcnt[iiv[vector].iiv_intrcntoff]++;
return (*(iiv[vector].iiv_handler)) (iiv[vector].iiv_arg);
}
/*
* Intio I/O controler interrupt
*/
static intio_ivec = 0;
void
intio_set_ivec (vec)
int vec;
{
vec &= 0xfc;
if (intio_ivec && intio_ivec != (vec & 0xfc))
panic ("Wrong interrupt vector for Sicilian.");
intio_ivec = vec;
intio_set_sicilian_ivec(vec);
}
/*
* intio bus dma stuff. stolen from arch/i386/isa/isa_machdep.c
*/
/*
* Create an INTIO DMA map.
*/
int
_intio_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
bus_dma_tag_t t;
bus_size_t size;
int nsegments;
bus_size_t maxsegsz;
bus_size_t boundary;
int flags;
bus_dmamap_t *dmamp;
{
struct intio_dma_cookie *cookie;
bus_dmamap_t map;
int error, cookieflags;
void *cookiestore;
size_t cookiesize;
extern paddr_t avail_end;
/* Call common function to create the basic map. */
error = x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
flags, dmamp);
if (error)
return (error);
map = *dmamp;
map->x68k_dm_cookie = NULL;
cookiesize = sizeof(struct intio_dma_cookie);
/*
* INTIO only has 24-bits of address space. This means
* we can't DMA to pages over 16M. In order to DMA to
* arbitrary buffers, we use "bounce buffers" - pages
* in memory below the 16M boundary. On DMA reads,
* DMA happens to the bounce buffers, and is copied into
* the caller's buffer. On writes, data is copied into
* but bounce buffer, and the DMA happens from those
* pages. To software using the DMA mapping interface,
* this looks simply like a data cache.
*
* If we have more than 16M of RAM in the system, we may
* need bounce buffers. We check and remember that here.
*
* ...or, there is an opposite case. The most segments
* a transfer will require is (maxxfer / NBPG) + 1. If
* the caller can't handle that many segments (e.g. the
* DMAC), we may have to bounce it as well.
*/
if (avail_end <= t->_bounce_thresh)
/* Bouncing not necessary due to memory size. */
map->x68k_dm_bounce_thresh = 0;
cookieflags = 0;
if (map->x68k_dm_bounce_thresh != 0 ||
((map->x68k_dm_size / NBPG) + 1) > map->x68k_dm_segcnt) {
cookieflags |= ID_MIGHT_NEED_BOUNCE;
cookiesize += (sizeof(bus_dma_segment_t) * map->x68k_dm_segcnt);
}
/*
* Allocate our cookie.
*/
if ((cookiestore = malloc(cookiesize, M_DMAMAP,
(flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
error = ENOMEM;
goto out;
}
memset(cookiestore, 0, cookiesize);
cookie = (struct intio_dma_cookie *)cookiestore;
cookie->id_flags = cookieflags;
map->x68k_dm_cookie = cookie;
if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
/*
* Allocate the bounce pages now if the caller
* wishes us to do so.
*/
if ((flags & BUS_DMA_ALLOCNOW) == 0)
goto out;
error = _intio_dma_alloc_bouncebuf(t, map, size, flags);
}
out:
if (error) {
if (map->x68k_dm_cookie != NULL)
free(map->x68k_dm_cookie, M_DMAMAP);
x68k_bus_dmamap_destroy(t, map);
}
return (error);
}
/*
* Destroy an INTIO DMA map.
*/
void
_intio_bus_dmamap_destroy(t, map)
bus_dma_tag_t t;
bus_dmamap_t map;
{
struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
/*
* Free any bounce pages this map might hold.
*/
if (cookie->id_flags & ID_HAS_BOUNCE)
_intio_dma_free_bouncebuf(t, map);
free(cookie, M_DMAMAP);
x68k_bus_dmamap_destroy(t, map);
}
/*
* Load an INTIO DMA map with a linear buffer.
*/
int
_intio_bus_dmamap_load(t, map, buf, buflen, p, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
void *buf;
bus_size_t buflen;
struct proc *p;
int flags;
{
struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
int error;
/*
* Make sure that on error condition we return "no valid mappings."
*/
map->dm_mapsize = 0;
map->dm_nsegs = 0;
/*
* Try to load the map the normal way. If this errors out,
* and we can bounce, we will.
*/
error = x68k_bus_dmamap_load(t, map, buf, buflen, p, flags);
if (error == 0 ||
(error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
return (error);
/*
* Allocate bounce pages, if necessary.
*/
if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
error = _intio_dma_alloc_bouncebuf(t, map, buflen, flags);
if (error)
return (error);
}
/*
* Cache a pointer to the caller's buffer and load the DMA map
* with the bounce buffer.
*/
cookie->id_origbuf = buf;
cookie->id_origbuflen = buflen;
cookie->id_buftype = ID_BUFTYPE_LINEAR;
error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
p, flags);
if (error) {
/*
* Free the bounce pages, unless our resources
* are reserved for our exclusive use.
*/
if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
_intio_dma_free_bouncebuf(t, map);
return (error);
}
/* ...so _intio_bus_dmamap_sync() knows we're bouncing */
cookie->id_flags |= ID_IS_BOUNCING;
return (0);
}
/*
* Like _intio_bus_dmamap_load(), but for mbufs.
*/
int
_intio_bus_dmamap_load_mbuf(t, map, m0, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
struct mbuf *m0;
int flags;
{
struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
int error;
/*
* Make sure on error condition we return "no valid mappings."
*/
map->dm_mapsize = 0;
map->dm_nsegs = 0;
#ifdef DIAGNOSTIC
if ((m0->m_flags & M_PKTHDR) == 0)
panic("_intio_bus_dmamap_load_mbuf: no packet header");
#endif
if (m0->m_pkthdr.len > map->x68k_dm_size)
return (EINVAL);
/*
* Try to load the map the normal way. If this errors out,
* and we can bounce, we will.
*/
error = x68k_bus_dmamap_load_mbuf(t, map, m0, flags);
if (error == 0 ||
(error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
return (error);
/*
* Allocate bounce pages, if necessary.
*/
if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
error = _intio_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
flags);
if (error)
return (error);
}
/*
* Cache a pointer to the caller's buffer and load the DMA map
* with the bounce buffer.
*/
cookie->id_origbuf = m0;
cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
cookie->id_buftype = ID_BUFTYPE_MBUF;
error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf,
m0->m_pkthdr.len, NULL, flags);
if (error) {
/*
* Free the bounce pages, unless our resources
* are reserved for our exclusive use.
*/
if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
_intio_dma_free_bouncebuf(t, map);
return (error);
}
/* ...so _intio_bus_dmamap_sync() knows we're bouncing */
cookie->id_flags |= ID_IS_BOUNCING;
return (0);
}
/*
* Like _intio_bus_dmamap_load(), but for uios.
*/
int
_intio_bus_dmamap_load_uio(t, map, uio, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
struct uio *uio;
int flags;
{
panic("_intio_bus_dmamap_load_uio: not implemented");
}
/*
* Like _intio_bus_dmamap_load(), but for raw memory allocated with
* bus_dmamem_alloc().
*/
int
_intio_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_dma_segment_t *segs;
int nsegs;
bus_size_t size;
int flags;
{
panic("_intio_bus_dmamap_load_raw: not implemented");
}
/*
* Unload an INTIO DMA map.
*/
void
_intio_bus_dmamap_unload(t, map)
bus_dma_tag_t t;
bus_dmamap_t map;
{
struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
/*
* If we have bounce pages, free them, unless they're
* reserved for our exclusive use.
*/
if ((cookie->id_flags & ID_HAS_BOUNCE) &&
(map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
_intio_dma_free_bouncebuf(t, map);
cookie->id_flags &= ~ID_IS_BOUNCING;
cookie->id_buftype = ID_BUFTYPE_INVALID;
/*
* Do the generic bits of the unload.
*/
x68k_bus_dmamap_unload(t, map);
}
/*
* Synchronize an INTIO DMA map.
*/
void
_intio_bus_dmamap_sync(t, map, offset, len, ops)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_addr_t offset;
bus_size_t len;
int ops;
{
struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
/*
* Mixing PRE and POST operations is not allowed.
*/
if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
(ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
panic("_intio_bus_dmamap_sync: mix PRE and POST");
#ifdef DIAGNOSTIC
if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
if (offset >= map->dm_mapsize)
panic("_intio_bus_dmamap_sync: bad offset");
if (len == 0 || (offset + len) > map->dm_mapsize)
panic("_intio_bus_dmamap_sync: bad length");
}
#endif
/*
* If we're not bouncing, just return; nothing to do.
*/
if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
return;
switch (cookie->id_buftype) {
case ID_BUFTYPE_LINEAR:
/*
* Nothing to do for pre-read.
*/
if (ops & BUS_DMASYNC_PREWRITE) {
/*
* Copy the caller's buffer to the bounce buffer.
*/
memcpy((char *)cookie->id_bouncebuf + offset,
(char *)cookie->id_origbuf + offset, len);
}
if (ops & BUS_DMASYNC_POSTREAD) {
/*
* Copy the bounce buffer to the caller's buffer.
*/
memcpy((char *)cookie->id_origbuf + offset,
(char *)cookie->id_bouncebuf + offset, len);
}
/*
* Nothing to do for post-write.
*/
break;
case ID_BUFTYPE_MBUF:
{
struct mbuf *m, *m0 = cookie->id_origbuf;
bus_size_t minlen, moff;
/*
* Nothing to do for pre-read.
*/
if (ops & BUS_DMASYNC_PREWRITE) {
/*
* Copy the caller's buffer to the bounce buffer.
*/
m_copydata(m0, offset, len,
(char *)cookie->id_bouncebuf + offset);
}
if (ops & BUS_DMASYNC_POSTREAD) {
/*
* Copy the bounce buffer to the caller's buffer.
*/
for (moff = offset, m = m0; m != NULL && len != 0;
m = m->m_next) {
/* Find the beginning mbuf. */
if (moff >= m->m_len) {
moff -= m->m_len;
continue;
}
/*
* Now at the first mbuf to sync; nail
* each one until we have exhausted the
* length.
*/
minlen = len < m->m_len - moff ?
len : m->m_len - moff;
memcpy(mtod(m, caddr_t) + moff,
(char *)cookie->id_bouncebuf + offset,
minlen);
moff = 0;
len -= minlen;
offset += minlen;
}
}
/*
* Nothing to do for post-write.
*/
break;
}
case ID_BUFTYPE_UIO:
panic("_intio_bus_dmamap_sync: ID_BUFTYPE_UIO");
break;
case ID_BUFTYPE_RAW:
panic("_intio_bus_dmamap_sync: ID_BUFTYPE_RAW");
break;
case ID_BUFTYPE_INVALID:
panic("_intio_bus_dmamap_sync: ID_BUFTYPE_INVALID");
break;
default:
printf("unknown buffer type %d\n", cookie->id_buftype);
panic("_intio_bus_dmamap_sync");
}
}
/*
* Allocate memory safe for INTIO DMA.
*/
int
_intio_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
bus_dma_tag_t t;
bus_size_t size, alignment, boundary;
bus_dma_segment_t *segs;
int nsegs;
int *rsegs;
int flags;
{
paddr_t high;
extern paddr_t avail_end;
if (avail_end > INTIO_DMA_BOUNCE_THRESHOLD)
high = trunc_page(INTIO_DMA_BOUNCE_THRESHOLD);
else
high = trunc_page(avail_end);
return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
segs, nsegs, rsegs, flags, 0, high));
}
/**********************************************************************
* INTIO DMA utility functions
**********************************************************************/
int
_intio_dma_alloc_bouncebuf(t, map, size, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_size_t size;
int flags;
{
struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
int error = 0;
cookie->id_bouncebuflen = round_page(size);
error = _intio_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
NBPG, map->x68k_dm_boundary, cookie->id_bouncesegs,
map->x68k_dm_segcnt, &cookie->id_nbouncesegs, flags);
if (error)
goto out;
error = x68k_bus_dmamem_map(t, cookie->id_bouncesegs,
cookie->id_nbouncesegs, cookie->id_bouncebuflen,
(caddr_t *)&cookie->id_bouncebuf, flags);
out:
if (error) {
x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
cookie->id_nbouncesegs);
cookie->id_bouncebuflen = 0;
cookie->id_nbouncesegs = 0;
} else {
cookie->id_flags |= ID_HAS_BOUNCE;
}
return (error);
}
void
_intio_dma_free_bouncebuf(t, map)
bus_dma_tag_t t;
bus_dmamap_t map;
{
struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
x68k_bus_dmamem_unmap(t, cookie->id_bouncebuf,
cookie->id_bouncebuflen);
x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
cookie->id_nbouncesegs);
cookie->id_bouncebuflen = 0;
cookie->id_nbouncesegs = 0;
cookie->id_flags &= ~ID_HAS_BOUNCE;
}

499
sys/arch/x68k/dev/intio_dmac.c Normal file
View File

@ -0,0 +1,499 @@
/* $NetBSD: intio_dmac.c,v 1.2 1999/03/16 16:30:18 minoura Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Minoura Makoto.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Hitachi HD63450 (= Motorola MC68450) DMAC driver for x68k.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <sys/extent.h>
#include <vm/vm.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/frame.h>
#include <arch/x68k/dev/intiovar.h>
#include <arch/x68k/dev/dmacvar.h>
#ifdef DMAC_DEBUG
#define DPRINTF(n,x) if (dmacdebug>(n)&0x0f) printf x
#define DDUMPREGS(n,x) if (dmacdebug>(n)&0x0f) {printf x; dmac_dump_regs();}
int dmacdebug = 0;
#else
#define DPRINTF(n,x)
#define DDUMPREGS(n,x)
#endif
static void dmac_init_channels __P((struct dmac_softc*));
static int dmac_program_arraychain __P((struct device*, struct dmac_dma_xfer*));
static int dmac_done __P((void*));
static int dmac_error __P((void*));
static int dmac_dump_regs __P((void));
/*
* autoconf stuff
*/
static int dmac_match __P((struct device *, struct cfdata *, void *));
static void dmac_attach __P((struct device *, struct device *, void *));
struct cfattach dmac_ca = {
sizeof(struct dmac_softc), dmac_match, dmac_attach
};
static int
dmac_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct intio_attach_args *ia = aux;
if (strcmp (ia->ia_name, "dmac") != 0)
return (0);
if (cf->cf_unit != 0)
return (0);
if (ia->ia_addr == INTIOCF_ADDR_DEFAULT)
ia->ia_addr = DMAC_ADDR;
/* fixed address */
if (ia->ia_addr != DMAC_ADDR)
return (0);
if (ia->ia_intr != INTIOCF_INTR_DEFAULT)
return (0);
return 1;
}
static void
dmac_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct dmac_softc *sc = (struct dmac_softc *)self;
struct intio_attach_args *ia = aux;
int r;
ia->ia_size = DMAC_CHAN_SIZE * DMAC_NCHAN;
r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
#ifdef DIAGNOSTIC
if (r)
panic ("IO map for DMAC corruption??");
#endif
((struct intio_softc*) parent)->sc_dmac = self;
sc->sc_bst = ia->ia_bst;
bus_space_map (sc->sc_bst, ia->ia_addr, ia->ia_size, 0, &sc->sc_bht);
dmac_init_channels(sc);
printf (": HD63450 DMAC\n%s: 4 channels available.\n", self->dv_xname);
}
#define DMAC_MAPSIZE 64
/* Allocate statically in order to make sure the DMAC can reach the maps. */
static struct dmac_sg_array dmac_map[DMAC_NCHAN][DMAC_MAPSIZE];
static void
dmac_init_channels(sc)
struct dmac_softc *sc;
{
int i;
pmap_t pmap = pmap_kernel();
for (i=0; i<DMAC_NCHAN; i++) {
sc->sc_channels[i].ch_channel = i;
sc->sc_channels[i].ch_name[0] = 0;
sc->sc_channels[i].ch_softc = &sc->sc_dev;
sc->sc_channels[i].ch_map =
(void*) pmap_extract (pmap, (vaddr_t) &dmac_map[i]);
bus_space_subregion(sc->sc_bst, sc->sc_bht,
DMAC_CHAN_SIZE*i, DMAC_CHAN_SIZE,
&sc->sc_channels[i].ch_bht);
}
return;
}
/*
* Channel initialization/deinitialization per user device.
*/
struct dmac_channel_stat *
dmac_alloc_channel(self, ch, name,
normalv, normal, normalarg,
errorv, error, errorarg)
struct device *self;
int ch;
char *name;
int normalv, errorv;
dmac_intr_handler_t normal, error;
void *normalarg, *errorarg;
{
struct intio_softc *intio = (void*) self;
struct dmac_softc *sc = (void*) intio->sc_dmac;
struct dmac_channel_stat *chan = &sc->sc_channels[ch];
char intrname[16];
#ifdef DIAGNOSTIC
if (ch < 0 || ch >= DMAC_NCHAN)
panic ("Invalid DMAC channel.");
if (chan->ch_name[0])
panic ("DMAC: channel in use.");
if (strlen(name) > 8)
panic ("DMAC: wrong user name.");
#endif
/* fill the channel status structure. */
strcpy(chan->ch_name, name);
chan->ch_dcr = (DMAC_DCR_XRM_CSWH | DMAC_DCR_OTYP_EASYNC |
DMAC_DCR_OPS_8BIT);
chan->ch_ocr = (DMAC_OCR_SIZE_BYTE_NOPACK | DMAC_OCR_CHAIN_ARRAY |
DMAC_OCR_REQG_EXTERNAL);
chan->ch_normalv = normalv;
chan->ch_errorv = errorv;
chan->ch_normal = normal;
chan->ch_error = error;
chan->ch_normalarg = normalarg;
chan->ch_errorarg = errorarg;
chan->ch_xfer_in_progress = 0;
/* setup the device-specific registers */
bus_space_write_1 (sc->sc_bst, chan->ch_bht, DMAC_REG_CSR, 0xff);
bus_space_write_1 (sc->sc_bst, chan->ch_bht,
DMAC_REG_DCR, chan->ch_dcr);
bus_space_write_1 (sc->sc_bst, chan->ch_bht, DMAC_REG_CPR, 0);
/*
* X68k physical user space is a subset of the kernel space;
* the memory is always included in the physical user space,
* while the device is not.
*/
bus_space_write_1 (sc->sc_bst, chan->ch_bht,
DMAC_REG_BFCR, DMAC_FC_USER_DATA);
bus_space_write_1 (sc->sc_bst, chan->ch_bht,
DMAC_REG_MFCR, DMAC_FC_USER_DATA);
bus_space_write_1 (sc->sc_bst, chan->ch_bht,
DMAC_REG_DFCR, DMAC_FC_KERNEL_DATA);
/* setup the interrupt handlers */
bus_space_write_1 (sc->sc_bst, chan->ch_bht, DMAC_REG_NIVR, normalv);
bus_space_write_1 (sc->sc_bst, chan->ch_bht, DMAC_REG_EIVR, errorv);
strcpy(intrname, name);
strcat(intrname, "dma");
intio_intr_establish (normalv, intrname, dmac_done, chan);
strcpy(intrname, name);
strcat(intrname, "dmaerr");
intio_intr_establish (errorv, intrname, dmac_error, chan);
return chan;
}
int
dmac_free_channel(self, ch, channel)
struct device *self;
int ch;
void *channel;
{
struct dmac_softc *sc = (void*) self;
struct dmac_channel_stat *chan = &sc->sc_channels[ch];
if (chan != channel)
return -1;
if (ch != chan->ch_channel)
return -1;
#if DIAGNOSTIC
if (chan->ch_xfer_in_progress)
panic ("dmac_free_channel: DMA transfer in progress");
#endif
chan->ch_name[0] = 0;
intio_intr_disestablish(chan->ch_normalv, channel);
intio_intr_disestablish(chan->ch_errorv, channel);
return 0;
}
/*
* Initialization / deinitialization per transfer.
*/
struct dmac_dma_xfer *
dmac_prepare_xfer (chan, dmat, dmamap, dir, scr, dar)
struct dmac_channel_stat *chan;
bus_dma_tag_t dmat;
bus_dmamap_t dmamap;
int dir, scr;
void *dar;
{
struct dmac_dma_xfer *r = malloc (sizeof (struct dmac_dma_xfer),
M_DEVBUF, M_WAITOK);
r->dx_channel = chan;
r->dx_dmamap = dmamap;
r->dx_tag = dmat;
r->dx_ocr = dir & DMAC_OCR_DIR_MASK;
r->dx_scr = scr & (DMAC_SCR_MAC_MASK|DMAC_SCR_DAC_MASK);
r->dx_device = dar;
r->dx_done = 0;
return r;
}
#ifdef DMAC_DEBUG
static struct dmac_channel_stat *debugchan = 0;
#endif
#ifdef DMAC_DEBUG
static u_int8_t dcsr, dcer, ddcr, docr, dscr, dccr, dcpr, dgcr,
dnivr, deivr, ddfcr, dmfcr, dbfcr;
static u_int16_t dmtcr, dbtcr;
static u_int32_t ddar, dmar, dbar;
#endif
/*
* Do the actual transfer.
*/
int
dmac_start_xfer(self, xf)
struct device *self;
struct dmac_dma_xfer *xf;
{
struct dmac_softc *sc = (void*) self;
struct dmac_channel_stat *chan = xf->dx_channel;
int c;
#ifdef DMAC_DEBUG
debugchan=chan;
#endif
bus_space_write_1(sc->sc_bst, chan->ch_bht,
DMAC_REG_OCR, (xf->dx_ocr | chan->ch_ocr));
bus_space_write_1(sc->sc_bst, chan->ch_bht,
DMAC_REG_SCR, xf->dx_scr);
/* program DMAC in array chainning mode */
xf->dx_done = 0;
DPRINTF (3, ("First program:\n"));
c = dmac_program_arraychain(self, xf);
/* setup the address/count registers */
bus_space_write_4(sc->sc_bst, chan->ch_bht,
DMAC_REG_BAR, (int) chan->ch_map);
bus_space_write_4(sc->sc_bst, chan->ch_bht,
DMAC_REG_DAR, (int) xf->dx_device);
bus_space_write_1(sc->sc_bst, chan->ch_bht,
DMAC_REG_CSR, 0xff);
bus_space_write_2(sc->sc_bst, chan->ch_bht,
DMAC_REG_BTCR, c);
/* START!! */
DDUMPREGS (3, ("first start\n"));
#ifdef DMAC_DEBUG
dcsr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CSR);
dcer = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CER);
ddcr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_DCR);
docr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_OCR);
dscr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_SCR);
dccr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CCR);
dcpr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CPR);
dgcr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_GCR);
dnivr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_NIVR);
deivr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_EIVR);
ddfcr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_DFCR);
dmfcr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_MFCR);
dbfcr = bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_BFCR);
dmtcr = bus_space_read_2(sc->sc_bst, chan->ch_bht, DMAC_REG_MTCR);
dbtcr = bus_space_read_2(sc->sc_bst, chan->ch_bht, DMAC_REG_BTCR);
ddar = bus_space_read_4(sc->sc_bst, chan->ch_bht, DMAC_REG_DAR);
dmar = bus_space_read_4(sc->sc_bst, chan->ch_bht, DMAC_REG_MAR);
dbar = bus_space_read_4(sc->sc_bst, chan->ch_bht, DMAC_REG_BAR);
#endif
#if defined(M68040) || defined(M68060)
if (mmutype == MMU_68040)
dma_cachectl((caddr_t) &dmac_map[chan->ch_channel],
sizeof(struct dmac_sg_array)*DMAC_MAPSIZE);
#endif
bus_space_write_1(sc->sc_bst, chan->ch_bht,
DMAC_REG_CCR, DMAC_CCR_STR|DMAC_CCR_INT);
chan->ch_xfer_in_progress = xf;
return 0;
}
static int
dmac_program_arraychain(self, xf)
struct device *self;
struct dmac_dma_xfer *xf;
{
struct dmac_softc *sc = (void*) self;
struct dmac_channel_stat *chan = xf->dx_channel;
int ch = chan->ch_channel;
struct x68k_bus_dmamap *map = xf->dx_dmamap;
int i, j;
for (i=0, j=xf->dx_done; i<DMAC_MAPSIZE && j<map->dm_nsegs;
i++, j++) {
dmac_map[ch][i].da_addr = map->dm_segs[j].ds_addr;
#ifdef DIAGNOSTIC
if (map->dm_segs[j].ds_len > 0xff00)
panic ("dmac_program_arraychain: wrong map: %d", map->dm_segs[j].ds_len);
#endif
dmac_map[ch][i].da_count = map->dm_segs[j].ds_len;
}
xf->dx_done = j;
return i;
}
/*
* interrupt handlers.
*/
static int
dmac_done(arg)
void *arg;
{
struct dmac_channel_stat *chan = arg;
struct dmac_softc *sc = (void*) chan->ch_softc;
struct dmac_dma_xfer *xf = chan->ch_xfer_in_progress;
struct x68k_bus_dmamap *map = xf->dx_dmamap;
int c;
DPRINTF (3, ("dmac_done\n"));
bus_space_write_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CSR, 0xff);
if (xf->dx_done == map->dm_nsegs) {
/* Done */
chan->ch_xfer_in_progress = 0;
return (*chan->ch_normal) (chan->ch_normalarg);
}
/* Continue transfer */
DPRINTF (3, ("reprograming\n"));
c = dmac_program_arraychain (&sc->sc_dev, xf);
bus_space_write_4(sc->sc_bst, chan->ch_bht,
DMAC_REG_BAR, (int) chan->ch_map);
bus_space_write_4(sc->sc_bst, chan->ch_bht,
DMAC_REG_DAR, (int) xf->dx_device);
bus_space_write_1(sc->sc_bst, chan->ch_bht,
DMAC_REG_CSR, 0xff);
bus_space_write_2(sc->sc_bst, chan->ch_bht,
DMAC_REG_BTCR, c);
/* START!! */
DDUMPREGS (3, ("restart\n"));
bus_space_write_1(sc->sc_bst, chan->ch_bht,
DMAC_REG_CCR, DMAC_CCR_STR|DMAC_CCR_INT);
return 1;
}
static int
dmac_error(arg)
void *arg;
{
struct dmac_channel_stat *chan = arg;
struct dmac_softc *sc = (void*) chan->ch_softc;
printf ("DMAC transfer error CSR=%02x, CER=%02x\n",
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CSR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CER));
DPRINTF(5, ("registers were:\n"));
#ifdef DMAC_DEBUG
if ((dmacdebug & 0x0f) > 5) {
printf ("CSR=%02x, CER=%02x, DCR=%02x, OCR=%02x, SCR=%02x,"
"CCR=%02x, CPR=%02x, GCR=%02x\n",
dcsr, dcer, ddcr, docr, dscr, dccr, dcpr, dgcr);
printf ("NIVR=%02x, EIVR=%02x, MTCR=%04x, BTCR=%04x, "
"DFCR=%02x, MFCR=%02x, BFCR=%02x\n",
dnivr, deivr, dmtcr, dbtcr, ddfcr, dmfcr, dbfcr);
printf ("DAR=%08x, MAR=%08x, BAR=%08x\n",
ddar, dmar, dbar);
}
#endif
bus_space_write_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CSR, 0xff);
DDUMPREGS(3, ("dmac_error\n"));
return (*chan->ch_error) (chan->ch_errorarg);
}
#ifdef DMAC_DEBUG
static int
dmac_dump_regs(void)
{
struct dmac_channel_stat *chan = debugchan;
struct dmac_softc *sc;
if ((chan == 0) || (dmacdebug & 0xf0)) return;
sc = (void*) chan->ch_softc;
printf ("DMAC channel %d registers\n", chan->ch_channel);
printf ("CSR=%02x, CER=%02x, DCR=%02x, OCR=%02x, SCR=%02x,"
"CCR=%02x, CPR=%02x, GCR=%02x\n",
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CSR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CER),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_DCR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_OCR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_SCR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CCR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_CPR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_GCR));
printf ("NIVR=%02x, EIVR=%02x, MTCR=%04x, BTCR=%04x, DFCR=%02x,"
"MFCR=%02x, BFCR=%02x\n",
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_NIVR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_EIVR),
bus_space_read_2(sc->sc_bst, chan->ch_bht, DMAC_REG_MTCR),
bus_space_read_2(sc->sc_bst, chan->ch_bht, DMAC_REG_BTCR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_DFCR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_MFCR),
bus_space_read_1(sc->sc_bst, chan->ch_bht, DMAC_REG_BFCR));
printf ("DAR=%08x, MAR=%08x, BAR=%08x\n",
bus_space_read_4(sc->sc_bst, chan->ch_bht, DMAC_REG_DAR),
bus_space_read_4(sc->sc_bst, chan->ch_bht, DMAC_REG_MAR),
bus_space_read_4(sc->sc_bst, chan->ch_bht, DMAC_REG_BAR));
return 0;
}
#endif

196
sys/arch/x68k/dev/intiovar.h Normal file
View File

@ -0,0 +1,196 @@
/* $NetBSD: intiovar.h,v 1.2 1999/03/16 16:30:19 minoura Exp $ */
/*
*
* Copyright (c) 1998 NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles D. Cranor and
* Washington University.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* NetBSD/x68k internal I/O virtual bus.
*/
#ifndef _INTIOVAR_H_
#define _INTIOVAR_H_
#include <machine/frame.h>
#include <sys/malloc.h>
#include <sys/extent.h>
#include "locators.h"
#define cf_addr cf_loc[INTIOCF_ADDR]
#define cf_intr cf_loc[INTIOCF_INTR]
#define cf_dma cf_loc[INTIOCF_DMA]
#define cf_dmaintr cf_loc[INTIOCF_DMAINTR]
struct intio_attach_args {
bus_space_tag_t ia_bst; /* bus_space tag */
bus_dma_tag_t ia_dmat; /* bus_dma tag */
char *ia_name; /* device name */
int ia_addr; /* addr */
int ia_size;
int ia_intr; /* interrupt vector */
int ia_dma; /* dma channel */
int ia_dmaintr; /* interrupt vector for dmac */
};
struct intio_softc {
struct device sc_dev;
bus_space_tag_t sc_bst;
bus_dma_tag_t sc_dmat;
struct extent *sc_map;
struct device *sc_dmac;
};
enum intio_map_flag {
INTIO_MAP_ALLOCATE = 0,
INTIO_MAP_TESTONLY = 1
};
int intio_map_allocate_region __P((struct device*, struct intio_attach_args*, enum intio_map_flag));
int intio_map_free_region __P((struct device*, struct intio_attach_args*));
typedef int (*intio_intr_handler_t) __P((void*));
int intio_intr_establish __P((int, const char *, intio_intr_handler_t, void *));
int intio_intr_disestablish __P((int, void *));
int intio_intr __P((struct frame *));
#define PHYS_INTIODEV 0x00c00000
extern u_int8_t *intiobase;
#define INTIO_ADDR(a) ((volatile u_int8_t *) (((u_int32_t) (a)) - (PHYS_INTIODEV) + intiobase))
#define INTIO_SYSPORT (0x00e8e000)
#define intio_sysport INTIO_ADDR(INTIO_SYSPORT)
#define sysport_contrast 1
#define sysport_tvctrl 3
#define sysport_imageunit 5
#define sysport_keyctrl 7
#define sysport_waitctrl 9
#define sysport_mpustat 11
#define sysport_sramwp 13
#define sysport_powoff 15
#define intio_set_sysport_contrast(a) \
intio_sysport[sysport_contrast] = (a) /* 0-15 */
#define intio_set_sysport_tvctrl(a) \
intio_sysport[sysport_tvctrl] = (a)
#define INTIO_SYSPORT_TVCTRL 0x08
#define intio_set_sysport_imageunit(a) \
intio_sysport[sysport_imageunit] = (a)
#define intio_set_sysport_keyctrl(a) \
intio_sysport[sysport_keyctrl] = (a)
#define INTIO_SYSPORT_KBENABLE 0x08
#define intio_set_sysport_waitctrl(a) \
intio_sysport[sysport_waitctrl] = (a) /* X68030 only */
#define intio_set_sysport_sramwp(a) \
intio_sysport[sysport_sramwp] = (a)
#define INTIO_SYSPORT_SRAMWP 0x31
#define intio_set_sysport_powoff(a) \
intio_sysport[sysport_powoff] = (a)
#define intio_get_sysport_contrast() \
(intio_sysport[sysport_contrast])
#define intio_get_sysport_tvctrl() \
(intio_sysport[sysport_tvctrl])
#define INTIO_SYSPORT_TVSTAT 0x08
#define intio_get_sysport_keyctrl() \
(intio_sysport[sysport_keyctrl])
#define INTIO_SYSPORT_KBEXIST 0x08
#define intio_get_sysport_waitctrl() \
(intio_sysport[sysport_waitctrl])
#define intio_get_sysport_mpustat() \
(intio_sysport[sysport_mpustat])
/* I/O controler (sicilian/pluto) */
#define INTIO_SICILIAN (0x00e9c000)
#define intio_sicilian INTIO_ADDR(INTIO_SICILIAN)
#define sicilian_intr 1
#define sicilian_ivec 3
#define intio_get_sicilian_intr() \
(intio_sicilian[sicilian_intr])
#define intio_set_sicilian_intr(a) \
intio_sicilian[sicilian_intr] = (a)
#define SICILIAN_INTR_PAR 0x01
#define SICILIAN_INTR_FDD 0x02
#define SICILIAN_INTR_FDC 0x04
#define SICILIAN_INTR_HDD 0x08
#define SICILIAN_STAT_HDD 0x10
#define SICILIAN_STAT_PAR 0x20
#define SICILIAN_STAT_FDD 0x40
#define SICILIAN_STAT_FDC 0x80
#define intio_enable_intr(a) \
intio_sicilian[sicilian_intr] = ((a) | intio_sicilian[sicilian_intr])
#define intio_disable_intr(a) \
intio_sicilian[sicilian_intr] = (~(a) & intio_sicilian[sicilian_intr])
#define intio_set_sicilian_ivec(a) \
intio_sicilian[sicilian_ivec] = (a)
void intio_set_ivec __P((int));
struct intio_dma_cookie {
int id_flags; /* flags; see below */
/*
* Information about the original buffer used during
* DMA map syncs. Note that origibuflen is only used
* for ID_BUFTYPE_LINEAR.
*/
void *id_origbuf; /* pointer to orig buffer if
bouncing */
bus_size_t id_origbuflen; /* ...and size */
int id_buftype; /* type of buffer */
void *id_bouncebuf; /* pointer to the bounce buffer */
bus_size_t id_bouncebuflen; /* ...and size */
int id_nbouncesegs; /* number of valid bounce segs */
bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer
physical memory segments */
};
/* id_flags */
#define ID_MIGHT_NEED_BOUNCE 0x01 /* map could need bounce buffers */
#define ID_HAS_BOUNCE 0x02 /* map currently has bounce buffers */
#define ID_IS_BOUNCING 0x04 /* map is bouncing current xfer */
/* id_buftype */
#define ID_BUFTYPE_INVALID 0
#define ID_BUFTYPE_LINEAR 1
#define ID_BUFTYPE_MBUF 2
#define ID_BUFTYPE_UIO 3
#define ID_BUFTYPE_RAW 4
#endif

72
sys/arch/x68k/dev/ite.c
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@ -1,4 +1,4 @@
/* $NetBSD: ite.c,v 1.13 1998/08/06 14:08:54 minoura Exp $ */
/* $NetBSD: ite.c,v 1.14 1999/03/16 16:30:19 minoura Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -52,6 +52,7 @@
#if NITE > 0
#include "bell.h"
#include "kbd.h"
#include <sys/param.h>
#include <sys/conf.h>
@ -61,15 +62,16 @@
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <machine/kbio.h>
#include <machine/iteioctl.h>
#include <machine/bus.h>
#include <machine/grfioctl.h>
#include <machine/iteioctl.h>
#include <x68k/dev/grfvar.h>
#include <x68k/dev/itevar.h>
#include <x68k/dev/kbdmap.h>
#include <x68k/x68k/iodevice.h>
#include <arch/x68k/dev/grfvar.h>
#include <arch/x68k/dev/itevar.h>
#include <arch/x68k/dev/kbdmap.h>
#include <arch/x68k/dev/mfp.h>
#define SUBR_CNPROBE(min) itesw[min].ite_cnprobe(min)
#define SUBR_INIT(ip) ip->isw->ite_init(ip)
@ -139,8 +141,6 @@ int next_repeat_timeo = 3; /* /100: timeout when repeating for next char */
u_char cons_tabs[MAX_TABS];
int kbd_init;
cdev_decl(ite);
void itestart __P((struct tty *tp));
@ -302,6 +302,9 @@ iteon(dev, flag)
if (ip->flags & ITE_INGRF)
return(0);
iteinit(dev);
#if NKBD > 0
mfp_send_usart (0x49); /* XXX */
#endif
return(0);
}
@ -339,8 +342,12 @@ iteoff(dev, flag)
* cleared, we will never see messages printed during
* the process of rebooting.
*/
if ((flag & 2) == 0 && (ip->flags & ITE_ISCONS) == 0)
if ((flag & 2) == 0 && (ip->flags & ITE_ISCONS) == 0) {
ip->flags &= ~ITE_ACTIVE;
#if NKBD > 0
mfp_send_usart (0x48); /* XXX */
#endif
}
}
/*
@ -392,10 +399,6 @@ iteopen(dev, mode, devtype, p)
if (error == 0) {
tp->t_winsize.ws_row = ip->rows;
tp->t_winsize.ws_col = ip->cols;
if (!kbd_init) {
kbd_init = 1;
kbdenable();
}
} else if (first)
iteoff(dev, 0);
return (error);
@ -502,12 +505,11 @@ iteioctl(dev, cmd, addr, flag, p)
return EFAULT;
case ITETVCTRL:
if (addr && *(u_char *)addr < 0x40) {
while(!(mfp.tsr & 0x80)) ;
mfp.udr = *(u_char *)addr;
return 0;
} else
if (addr && *(u_int8_t *)addr < 0x40) {
return mfp_send_usart (* (u_int8_t *)addr);
} else {
return EFAULT;
}
#endif
}
return (ENOTTY);
@ -2441,10 +2443,14 @@ itecheckwrap(ip)
#endif
#if NITE > 0 && NKBD > 0
/*
* Console functions
*/
#include <dev/cons.h>
extern void kbdenable __P((int));
extern int kbdcngetc __P((void));
/*
* Return a priority in consdev->cn_pri field highest wins. This function
@ -2474,9 +2480,13 @@ itecnprobe(cd)
cd->cn_pri = CN_DEAD;
else {
con_itesoftc.flags = (ITE_ALIVE|ITE_CONSOLE);
con_itesoftc.isw = &itesw[0]; /* XXX */
/*
* hardcode the minor number.
* currently we support only one ITE, it is enough for now.
*/
con_itesoftc.isw = &itesw[0];
cd->cn_pri = CN_INTERNAL;
cd->cn_dev = makedev(maj, 0); /* XXX */
cd->cn_dev = makedev(maj, 0);
}
}
@ -2490,6 +2500,8 @@ itecninit(cd)
ip = getitesp(cd->cn_dev);
iteinit(cd->cn_dev); /* init console unit */
ip->flags |= ITE_ACTIVE | ITE_ISCONS;
kbdenable(0);
mfp_send_usart(0x49);
}
/*
@ -2515,13 +2527,8 @@ itecngetc(dev)
{
register int c;
/* XXX this should be moved */
if (!kbd_init) {
kbd_init = 1;
kbdenable();
}
do {
c = kbdgetcn();
c = kbdcngetc();
c = ite_cnfilter(c, ITEFILT_CONSOLE);
} while (c == -1);
return (c);
@ -2535,11 +2542,22 @@ itecnputc(dev, c)
static int paniced = 0;
struct ite_softc *ip = getitesp(dev);
char ch = c;
#ifdef ITE_KERNEL_ATTR
short save_attribute;
#endif
if (panicstr && !paniced &&
(ip->flags & (ITE_ACTIVE|ITE_INGRF)) != ITE_ACTIVE) {
(void) iteon(dev, 3);
paniced = 1;
}
#ifdef ITE_KERNEL_ATTR
save_attribute = ip->attribute;
ip->attribute = ITE_KERNEL_ATTR;
#endif
ite_putstr(&ch, 1, dev);
#ifdef ITE_KERNEL_ATTR
ip->attribute = save_attribute;
#endif
}
#endif

23
sys/arch/x68k/dev/ite_tv.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ite_tv.c,v 1.5 1998/08/06 14:08:54 minoura Exp $ */
/* $NetBSD: ite_tv.c,v 1.6 1999/03/16 16:30:19 minoura Exp $ */
/*
* Copyright (c) 1997 Masaru Oki.
@ -35,11 +35,13 @@
#include <sys/proc.h>
#include <sys/systm.h>
#include <machine/bus.h>
#include <machine/grfioctl.h>
#include <x68k/x68k/iodevice.h>
#include <x68k/dev/itevar.h>
#include <x68k/dev/grfvar.h>
#include <arch/x68k/x68k/iodevice.h>
#include <arch/x68k/dev/itevar.h>
#include <arch/x68k/dev/grfvar.h>
#include <arch/x68k/dev/mfp.h>
/*
* ITE device dependent routine for X680x0 Text-Video framebuffer.
@ -70,7 +72,6 @@ char *tv_font[256];
__volatile char *tv_kfont[0x7f];
u_char kern_font[256 * FONTHEIGHT];
u_char kbdled;
#define PHYSLINE(y) ((tv_top + (y)) % PLANELINES)
#define ROWOFFSET(y) ((y) * FONTHEIGHT * ROWBYTES)
@ -116,10 +117,7 @@ txrascpy (src, dst, size, mode)
/*s = splhigh();*/
while (--size >= 0) {
/* wait for hsync */
while (mfp.gpip & MFP_GPIP_HSYNC)
asm("nop");
while (!(mfp.gpip & MFP_GPIP_HSYNC))
asm("nop");
mfp_wait_for_hsync ();
CRTC.r22 = (src << 8) | dst; /* specify raster number */
/* start raster copy */
CRTC.crtctrl = 8;
@ -130,10 +128,8 @@ txrascpy (src, dst, size, mode)
/*splx(s);*/
/* wait for hsync */
while (mfp.gpip & MFP_GPIP_HSYNC)
asm("nop");
while (!(mfp.gpip & MFP_GPIP_HSYNC))
asm("nop");
mfp_wait_for_hsync ();
/* stop raster copy */
CRTC.crtctrl = 0;
@ -210,7 +206,6 @@ tv_deinit(ip)
struct ite_softc *ip;
{
ip->flags &= ~ITE_INITED; /* XXX? */
mfp.udr = 0x48; /* send character from keyboard disable */
}
typedef void tv_putcfunc __P((struct ite_softc *, int, char *));

228
sys/arch/x68k/dev/kbd.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: kbd.c,v 1.6 1997/10/09 13:00:51 oki Exp $ */
/* $NetBSD: kbd.c,v 1.7 1999/03/16 16:30:19 minoura Exp $ */
/*
* Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
@ -36,7 +36,6 @@
#include "ite.h"
#include "bell.h"
#if NITE > 0
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
@ -50,87 +49,132 @@
#include <sys/syslog.h>
#include <machine/cpu.h>
#include <machine/bus.h>
#include <x68k/dev/itevar.h>
#include <x68k/x68k/iodevice.h>
#include <arch/x68k/dev/intiovar.h>
#include <arch/x68k/dev/mfp.h>
#include <arch/x68k/dev/itevar.h>
/* for sun-like event mode, if you go thru /dev/kbd. */
#include <x68k/dev/event_var.h>
#include <arch/x68k/dev/event_var.h>
#include <machine/kbio.h>
#include <machine/kbd.h>
#include <machine/vuid_event.h>
struct kbd_softc {
int k_event_mode; /* if true, collect events, else pass to ite */
struct evvar k_events; /* event queue state */
} kbd_softc;
struct device sc_dev;
void kbdattach __P((int));
void kbdenable __P((void));
int sc_event_mode; /* if true, collect events, else pass to ite */
struct evvar sc_events; /* event queue state */
};
void kbdenable __P((int));
int kbdopen __P((dev_t, int, int, struct proc *));
int kbdclose __P((dev_t, int, int, struct proc *));
int kbdread __P((dev_t, struct uio *, int));
int kbdwrite __P((dev_t, struct uio *, int));
int kbdioctl __P((dev_t, u_long, caddr_t, int, struct proc *));
int kbdpoll __P((dev_t, int, struct proc *));
void kbdintr __P((void));
int kbdintr __P((void *));
void kbdsoftint __P((void));
void kbd_bell __P((int));
int kbdgetcn __P((void));
int kbdcngetc __P((void));
void kbd_setLED __P((void));
int kbd_send_command __P((int));
/*
* Called from main() during pseudo-device setup. If this keyboard is
* the console, this is our chance to open the underlying serial port and
* send a RESET, so that we can find out what kind of keyboard it is.
*/
void
kbdattach(kbd)
int kbd;
static int kbdmatch __P((struct device *, struct cfdata *, void *));
static void kbdattach __P((struct device *, struct device *, void *));
struct cfattach kbd_ca = {
sizeof(struct kbd_softc), kbdmatch, kbdattach
};
static int
kbdmatch (parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
if (strcmp(aux, "kbd") != 0)
return (0);
if (cf->cf_unit != 0)
return (0);
return (1);
}
static void
kbdattach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct kbd_softc *k = (void*) self;
struct mfp_softc *mfp = (void*) parent;
int s = spltty();
/* MFP interrupt #12 is for USART recieve buffer full */
intio_intr_establish (mfp->sc_intr + 12, "kbd", kbdintr, self);
kbdenable(1);
k->sc_event_mode = 0;
k->sc_events.ev_io = 0;
splx(s);
printf ("\n");
}
/* definitions for x68k keyboard encoding. */
#define KEY_CODE(c) ((c) & 0x7f)
#define KEY_UP(c) ((c) & 0x80)
void
kbdenable()
kbdenable(mode)
int mode; /* 1: interrupt, 0: poll */
{
int s = spltty();
intio_set_sysport_keyctrl(8);
mfp_bit_clear_iera (MFP_INTR_RCV_FULL | MFP_INTR_TIMER_B);
mfp_set_tbcr(MFP_TIMERB_RESET | MFP_TIMERB_STOP);
mfp_set_tbdr(13); /* Timer B interrupt interval */
mfp_set_tbcr(1); /* 1/4 delay mode */
mfp_set_ucr(MFP_UCR_CLKX16 | MFP_UCR_RW_8 | MFP_UCR_ONESB);
mfp_set_rsr(MFP_RSR_RE); /* USART receive enable */
mfp_set_tsr(MFP_TSR_TE); /* USART transmit enable */
sysport.keyctrl = 8; /* send character from keyboard enable */
mfp.iera &= (~0x11); /* MPSC RBF, Timer-B interrupt disable */
mfp.tbcr = MFP_TIMERB_RESET | MFP_TIMERB_STOP; /* Timer-B stop */
mfp.tbdr = 13; /* Timer-B 38400 Hz clock (interrupt 76800Hz) */
mfp.tbcr = 1; /* Timer-B deray mode, prescale 1/4 */
mfp.ucr = MFP_UCR_CLKX16 | MFP_UCR_RW_8 | MFP_UCR_ONESB;
mfp.rsr = MFP_RSR_RE; /* USART receive enable */
mfp.iera |= 0x11; /* MPSC RBF, Timer-B interrupt enable */
while(!(mfp.tsr & MFP_TSR_BE)) ;
mfp.udr = 0x49; /* send character from keyboard enable */
kbdled = 0; /* all keyboard LED turn off. */
if (mode)
mfp_bit_set_iera(MFP_INTR_RCV_FULL);
kbdled = 0; /* all keyboard LED turn off. */
kbd_setLED();
if (!(sysport.keyctrl & 8))
printf("WARNING: no connected keyboard\n");
kbd_softc.k_event_mode = 0;
kbd_softc.k_events.ev_io = 0;
splx(s);
if (!(intio_get_sysport_keyctrl() & 8))
printf(" (no connected keyboard)");
}
extern struct cfdriver kbd_cd;
int
kbdopen(dev, flags, mode, p)
dev_t dev;
int flags, mode;
struct proc *p;
{
if (kbd_softc.k_events.ev_io)
struct kbd_softc *k;
int unit = minor(dev);
if (unit >= kbd_cd.cd_ndevs)
return (ENXIO);
k = kbd_cd.cd_devs[minor(dev)];
if (k == NULL)
return (ENXIO);
if (k->sc_events.ev_io)
return (EBUSY);
kbd_softc.k_events.ev_io = p;
ev_init(&kbd_softc.k_events);
k->sc_events.ev_io = p;
ev_init(&k->sc_events);
return (0);
}
@ -140,20 +184,26 @@ kbdclose(dev, flags, mode, p)
int flags, mode;
struct proc *p;
{
struct kbd_softc *k = kbd_cd.cd_devs[minor(dev)];
/* Turn off event mode, dump the queue */
kbd_softc.k_event_mode = 0;
ev_fini(&kbd_softc.k_events);
kbd_softc.k_events.ev_io = NULL;
k->sc_event_mode = 0;
ev_fini(&k->sc_events);
k->sc_events.ev_io = NULL;
return (0);
}
int
kbdread(dev, uio, flags)
dev_t dev;
struct uio *uio;
int flags;
{
return ev_read(&kbd_softc.k_events, uio, flags);
struct kbd_softc *k = kbd_cd.cd_devs[minor(dev)];
return ev_read(&k->sc_events, uio, flags);
}
/* this routine should not exist, but is convenient to write here for now */
@ -174,7 +224,7 @@ kbdioctl(dev, cmd, data, flag, p)
int flag;
struct proc *p;
{
register struct kbd_softc *k = &kbd_softc;
register struct kbd_softc *k = kbd_cd.cd_devs[minor(dev)];
int cmd_data;
switch (cmd) {
@ -191,7 +241,7 @@ kbdioctl(dev, cmd, data, flag, p)
return (0);
case KIOCSDIRECT:
k->k_event_mode = *(int *)data;
k->sc_event_mode = *(int *)data;
return (0);
case KIOCCMD:
@ -219,11 +269,11 @@ kbdioctl(dev, cmd, data, flag, p)
return (0);
case FIOASYNC:
k->k_events.ev_async = *(int *)data != 0;
k->sc_events.ev_async = *(int *)data != 0;
return (0);
case TIOCSPGRP:
if (*(int *)data != k->k_events.ev_io->p_pgid)
if (*(int *)data != k->sc_events.ev_io->p_pgid)
return (EPERM);
return (0);
@ -237,33 +287,39 @@ kbdioctl(dev, cmd, data, flag, p)
return (EOPNOTSUPP); /* misuse, but what the heck */
}
int
kbdpoll(dev, events, p)
dev_t dev;
int events;
struct proc *p;
{
return ev_poll (&kbd_softc.k_events, events, p);
struct kbd_softc *k;
k = kbd_cd.cd_devs[minor(dev)];
return (ev_poll(&k->sc_events, events, p));
}
#define KBDBUFMASK 63
#define KBDBUFSIZ 64
static u_char kbdbuf[KBDBUFSIZ];
static int kbdputoff = 0;
static int kbdgetoff = 0;
void
kbdintr()
int
kbdintr(arg)
void *arg;
{
u_char c, in;
struct kbd_softc *k = &kbd_softc;
struct kbd_softc *k = arg; /* XXX */
struct firm_event *fe;
int put;
c = in = mfp.udr;
c = in = mfp_get_udr();
/* if not in event mode, deliver straight to ite to process key stroke */
if (! k->k_event_mode) {
if (! k->sc_event_mode) {
kbdbuf[kbdputoff++ & KBDBUFMASK] = c;
setsoftkbd();
return;
@ -273,24 +329,24 @@ kbdintr()
event and put it in the queue. If the queue is full, the
keystroke is lost (sorry!). */
put = k->k_events.ev_put;
fe = &k->k_events.ev_q[put];
put = k->sc_events.ev_put;
fe = &k->sc_events.ev_q[put];
put = (put + 1) % EV_QSIZE;
if (put == k->k_events.ev_get) {
if (put == k->sc_events.ev_get) {
log(LOG_WARNING, "keyboard event queue overflow\n"); /* ??? */
return;
}
fe->id = KEY_CODE(c);
fe->value = KEY_UP(c) ? VKEY_UP : VKEY_DOWN;
fe->time = time;
k->k_events.ev_put = put;
EV_WAKEUP(&k->k_events);
k->sc_events.ev_put = put;
EV_WAKEUP(&k->sc_events);
}
void
kbdsoftint()
kbdsoftint() /* what if ite is not configured? */
{
int s = splhigh();
int s = spltty();
while(kbdgetoff < kbdputoff)
ite_filter(kbdbuf[kbdgetoff++ & KBDBUFMASK], ITEFILT_TTY);
@ -311,31 +367,11 @@ kbd_bell(mode)
#endif
}
int
kbdgetcn()
{
int s = spltty();
u_char ints, c, in;
ints = mfp.iera;
mfp.iera &= 0xef;
mfp.rsr |= 1;
while (!(mfp.rsr & MFP_RSR_BF))
asm("nop");
in = c = mfp.udr;
mfp.iera = ints;
splx (s);
return c;
}
unsigned char kbdled;
void
kbd_setLED()
{
while(!(mfp.tsr & MFP_TSR_BE)) ;
mfp.udr = ~kbdled | 0x80;
mfp_send_usart(~kbdled | 0x80);
}
int
@ -360,4 +396,26 @@ kbd_send_command(cmd)
}
}
/*
* for console
*/
#include "ite.h"
#if NITE > 0
int
kbdcngetc()
{
int s = splhigh();
u_char ints, c, in;
ints = mfp_get_iera();
mfp_bit_clear_iera(MFP_INTR_RCV_FULL);
mfp_set_rsr(mfp_get_rsr() | MFP_RSR_RE);
in = c = mfp_recieve_usart();
mfp_set_iera(ints);
splx (s);
return c;
}
#endif

67
sys/arch/x68k/dev/mb86601reg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: mb86601reg.h,v 1.1 1997/10/19 09:29:25 oki Exp $ */
/* $NetBSD: mb86601reg.h,v 1.2 1999/03/16 16:30:19 minoura Exp $ */
/*
* Copyright (c) 1990, 1993
@ -42,73 +42,10 @@
* FUJITSU MB86601A SCSI Protocol Controler Hardware Description.
*/
struct mb86601 {
u_char p32, scsi_bdid;
u_char p34, scsi_sctl;
#define SCTL_DISABLE 0x80
#define SCTL_CTRLRST 0x40
#define SCTL_DIAG 0x20
#define SCTL_ABRT_ENAB 0x10
#define SCTL_PARITY_ENAB 0x08
#define SCTL_SEL_ENAB 0x04
#define SCTL_RESEL_ENAB 0x02
#define SCTL_INTR_ENAB 0x01
u_char p36, scsi_scmd;
#define SCMD_RST 0x10
#define SCMD_ICPT_XFR 0x08
#define SCMD_PROG_XFR 0x04
#define SCMD_PAD 0x01 /* if initiator */
#define SCMD_PERR_STOP 0x01 /* if target */
/* command codes */
#define SCMD_BUS_REL 0x00
#define SCMD_SELECT 0x20
#define SCMD_RST_ATN 0x40
#define SCMD_SET_ATN 0x60
#define SCMD_XFR 0x80
#define SCMD_XFR_PAUSE 0xa0
#define SCMD_RST_ACK 0xc0
#define SCMD_SET_ACK 0xe0
u_char p38, scsi_tmod;
#define TMOD_SYNC 0x80
u_char p40, scsi_ints;
#define INTS_SEL 0x80
#define INTS_RESEL 0x40
#define INTS_DISCON 0x20
#define INTS_CMD_DONE 0x10
#define INTS_SRV_REQ 0x08
#define INTS_TIMEOUT 0x04
#define INTS_HARD_ERR 0x02
#define INTS_RST 0x01
u_char p42, scsi_psns;
#define PSNS_REQ 0x80
#define PSNS_ACK 0x40
#define PSNS_ATN 0x20
#define PSNS_SEL 0x10
#define PSNS_BSY 0x08
u_char p44, scsi_ssts;
#define SSTS_INITIATOR 0x80
#define SSTS_TARGET 0x40
#define SSTS_BUSY 0x20
#define SSTS_XFR 0x10
#define SSTS_ACTIVE (SSTS_INITIATOR|SSTS_XFR)
#define SSTS_RST 0x08
#define SSTS_TCZERO 0x04
#define SSTS_DREG_FULL 0x02
#define SSTS_DREG_EMPTY 0x01
u_char p46, scsi_serr;
#define SERR_SCSI_PAR 0x80
#define SERR_SPC_PAR 0x40
#define SERR_TC_PAR 0x08
#define SERR_PHASE_ERR 0x04
#define SERR_SHORT_XFR 0x02
#define SERR_OFFSET 0x01
u_char p48, scsi_pctl;
#define PCTL_BFINT_ENAB 0x80
u_char p50, scsi_mbc;
u_char p52, scsi_dreg;
u_char p54, scsi_temp;
u_char p56, scsi_tch;
u_char p58, scsi_tcm;
u_char p60, scsi_tcl;
u_char p62, scsi_exbf;
};

192
sys/arch/x68k/dev/mfp.c Normal file
View File

@ -0,0 +1,192 @@
/* $NetBSD: mfp.c,v 1.2 1999/03/16 16:30:19 minoura Exp $ */
/*
*
* Copyright (c) 1998 NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles D. Cranor and
* Washington University.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* MC68901 MFP (multi function periferal) driver for NetBSD/x68k
*/
/*
* MFP is used as keyboard controler, which may be used before
* ordinary initialization.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <arch/x68k/dev/intiovar.h>
#include <arch/x68k/dev/mfp.h>
static int mfp_match __P((struct device *, struct cfdata *, void *));
static void mfp_attach __P((struct device *, struct device *, void *));
static int mfp_search __P((struct device *, struct cfdata *cf, void *));
static void mfp_init __P((void));
struct cfattach mfp_ca = {
sizeof(struct mfp_softc), mfp_match, mfp_attach
};
extern int x68k_realconfig;
extern struct cfdriver mfp_cd;
static int
mfp_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct intio_attach_args *ia = aux;
/* mfp0 */
if (strcmp (ia->ia_name, "mfp") != 0)
return 0;
if (cf->cf_unit != 0)
return (0);
if (ia->ia_addr == INTIOCF_ADDR_DEFAULT)
ia->ia_addr = MFP_ADDR;
if (ia->ia_intr == INTIOCF_INTR_DEFAULT)
ia->ia_addr = MFP_INTR;
/* fixed address */
if (ia->ia_addr != MFP_ADDR)
return (0);
if (ia->ia_intr != MFP_INTR)
return (0);
return (1);
}
static void
mfp_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct mfp_softc *sc = (struct mfp_softc *)self;
struct intio_attach_args *ia = aux;
mfp_init ();
if (sc != NULL) {
/* realconfig */
int r;
printf ("\n");
sc->sc_bst = ia->ia_bst;
sc->sc_intr = ia->ia_intr;
ia->ia_size = 0x30;
r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
#ifdef DIAGNOSTIC
if (r)
panic ("IO map for MFP corruption??");
#endif
bus_space_map(ia->ia_bst, ia->ia_addr, 0x2000, 0, &sc->sc_bht);
config_found (self, "kbd", NULL);
config_found (self, "clock", NULL);
config_found (self, "pow", NULL);
}
}
static void
mfp_init (void)
{
#if 0 /* done in x68k_init.c::intr_reset() */
mfp_set_vr(MFP_INTR);
/* stop all interrupts */
mfp_set_iera(0);
mfp_set_ierb(0);
#endif
/* Timer A settings */
mfp_set_tacr(MFP_TIMERA_RESET | MFP_TIMERA_STOP);
/* Timer B settings: used for USART clock */
mfp_set_tbcr(MFP_TIMERB_RESET | MFP_TIMERB_STOP);
/* Timer C/D settings */
mfp_set_tcdcr(0);
}
/*
* MFP utility functions
*/
/*
* wait for built-in display hsync.
* should be called before writing to frame buffer.
* might be called before realconfig.
*/
void
mfp_wait_for_hsync (void)
{
struct mfp_softc *sc = mfp_cd.cd_devs[0]; /* XXX */
/* wait for CRT HSYNC */
while (mfp_get_gpip() & MFP_GPIP_HSYNC)
asm("nop");
while (!(mfp_get_gpip() & MFP_GPIP_HSYNC))
asm("nop");
}
/*
* send COMMAND to the MFP USART.
* USART is attached to the keyboard.
* might be called before realconfig.
*/
int
mfp_send_usart (command)
int command;
{
struct mfp_softc *sc = mfp_cd.cd_devs[0]; /* XXX */
while (!(mfp_get_tsr() & MFP_TSR_BE));
mfp_set_udr(command);
return 0;
}
int
mfp_recieve_usart(void)
{
while (!(mfp_get_rsr() & MFP_RSR_BF))
asm("nop");
return mfp_get_udr();
}

215
sys/arch/x68k/dev/mfp.h Normal file
View File

@ -0,0 +1,215 @@
/* $NetBSD: mfp.h,v 1.2 1999/03/16 16:30:19 minoura Exp $ */
/*
*
* Copyright (c) 1998 NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles D. Cranor and
* Washington University.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define MFP_ADDR 0x00e88000
#define MFP_INTR 0x40
struct mfp_softc {
struct device sc_dev;
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bht;
int sc_intr;
};
/*
* MFP registers
*/
#define MFP_GPIP 0x01
#define MFP_AER 0x03
#define MFP_DDR 0x05
#define MFP_IERA 0x07
#define MFP_IERB 0x09
#define MFP_IPRA 0x0b
#define MFP_IPRB 0x0d
#define MFP_ISRA 0x0f
#define MFP_ISRB 0x11
#define MFP_IMRA 0x13
#define MFP_IMRB 0x15
#define MFP_VR 0x17
#define MFP_TACR 0x19
#define MFP_TIMERA_STOP 0
#define MFP_TIMERA_RESET 0x10
#define MFP_TBCR 0x1b
#define MFP_TIMERB_STOP 0
#define MFP_TIMERB_RESET 0x10
#define MFP_TCDCR 0x1d
#define MFP_TADR 0x1f
#define MFP_TBDR 0x21
#define MFP_TCDR 0x23
#define MFP_TDDR 0x25
#define MFP_UCR 0x29
#define MFP_UCR_EVENP 0x02
#define MFP_UCR_PARENB 0x04
#define MFP_UCR_SYNCMODE 0x00
#define MFP_UCR_ONESB 0x08
#define MFP_UCR_1P5SB 0x10
#define MFP_UCR_TWOSB 0x18
#define MFP_UCR_RW_5 0x60
#define MFP_UCR_RW_6 0x40
#define MFP_UCR_RW_7 0x20
#define MFP_UCR_RW_8 0x00
#define MFP_UCR_CLKX16 0x80
#define MFP_RSR 0x2b
#define MFP_RSR_BF 0x80
#define MFP_RSR_OE 0x40
#define MFP_RSR_PE 0x20
#define MFP_RSR_FE 0x10
#define MFP_RSR_SS 0x02
#define MFP_RSR_RE 0x01
#define MFP_TSR 0x2d
#define MFP_TSR_BE 0x80
#define MFP_TSR_TE 0x01
#define MFP_UDR 0x2f
/*
* machine dependent definitions
*/
/* GPIP port bitmap */
#define MFP_GPIP_HSYNC 0x80
#define MFP_GPIP_CRTC 0x40
#define MFP_GPIP_UNUSED1 0x20
#define MFP_GPIP_VDISP 0x10
#define MFP_GPIP_OPM 0x08
#define MFP_GPIP_FRONT_SWITCH 0x04
#define MFP_GPIP_EXPWON 0x02
#define MFP_GPIP_RTC_ALARM 0x01
/* interrupt A */
#define MFP_INTR_HSYNC 0x80
#define MFP_INTR_CRTC 0x40
#define MFP_INTR_TIMER_A 0x20
#define MFP_INTR_RCV_FULL 0x10
#define MFP_INTR_RCV_ERROR 0x08
#define MFP_INTR_XMIT_EMPTY 0x04
#define MFP_INTR_XMIT_ERROR 0x02
#define MFP_INTR_TIMER_B 0x01
/* interrupt B */
#define MFP_INTR_VDISP 0x40
#define MFP_INTR_TIMER_C 0x20
#define MFP_INTR_TIMER_D 0x10
#define MFP_INTR_OPM 0x08
#define MFP_INTR_FRONT_SWITCH 0x04
#define MFP_INTR_EXPWON 0x02
#define MFP_INTR_RTC_ALARM 0x01
/* XXX */
#include <arch/x68k/dev/intiovar.h>
#define mfp_base INTIO_ADDR(MFP_ADDR)
#define mfp_set_aer(a) \
mfp_base[MFP_AER] = ((u_int8_t) (a))
#define mfp_set_ddr(a) \
mfp_base[MFP_DDR] = ((u_int8_t) (a))
#define mfp_set_iera(a) \
mfp_base[MFP_IERA] = ((u_int8_t) (a))
#define mfp_set_ierb(a) \
mfp_base[MFP_IERB] = ((u_int8_t) (a))
#define mfp_set_ipra(a) \
mfp_base[MFP_IPRA] = ((u_int8_t) (a))
#define mfp_set_iprb(a) \
mfp_base[MFP_IPRB] = ((u_int8_t) (a))
#define mfp_set_isra(a) \
mfp_base[MFP_ISRA] = ((u_int8_t) (a))
#define mfp_set_isrb(a) \
mfp_base[MFP_ISRB] = ((u_int8_t) (a))
#define mfp_set_imra(a) \
mfp_base[MFP_IMRA] = ((u_int8_t) (a))
#define mfp_set_imrb(a) \
mfp_base[MFP_IMRB] = ((u_int8_t) (a))
#define mfp_set_vr(a) \
mfp_base[MFP_VR] = ((u_int8_t) (a))
#define mfp_set_tacr(a) \
mfp_base[MFP_TACR] = ((u_int8_t) (a))
#define mfp_set_tbcr(a) \
mfp_base[MFP_TBCR] = ((u_int8_t) (a))
#define mfp_set_tcdcr(a) \
mfp_base[MFP_TCDCR] = ((u_int8_t) (a))
#define mfp_set_tadr(a) \
mfp_base[MFP_TADR] = ((u_int8_t) (a))
#define mfp_set_tbdr(a) \
mfp_base[MFP_TBDR] = ((u_int8_t) (a))
#define mfp_set_tcdr(a) \
mfp_base[MFP_TCDR] = ((u_int8_t) (a))
#define mfp_set_tddr(a) \
mfp_base[MFP_TDDR] = ((u_int8_t) (a))
#define mfp_set_ucr(a) \
mfp_base[MFP_UCR] = ((u_int8_t) (a))
#define mfp_set_rsr(a) \
mfp_base[MFP_RSR] = ((u_int8_t) (a))
#define mfp_set_tsr(a) \
mfp_base[MFP_TSR] = ((u_int8_t) (a))
#define mfp_set_udr(a) \
mfp_base[MFP_UDR] = ((u_int8_t) (a))
#define mfp_get_gpip() (mfp_base[MFP_GPIP])
#define mfp_get_aer() (mfp_base[MFP_AER])
#define mfp_get_ddr() (mfp_base[MFP_DDR])
#define mfp_get_iera() (mfp_base[MFP_IERA])
#define mfp_get_ierb() (mfp_base[MFP_IERB])
#define mfp_get_ipra() (mfp_base[MFP_IPRA])
#define mfp_get_iprb() (mfp_base[MFP_IPRB])
#define mfp_get_isra() (mfp_base[MFP_ISRA])
#define mfp_get_isrb() (mfp_base[MFP_ISRB])
#define mfp_get_imra() (mfp_base[MFP_IMRA])
#define mfp_get_imrb() (mfp_base[MFP_IMRB])
#define mfp_get_vr() (mfp_base[MFP_VR])
#define mfp_get_tacr() (mfp_base[MFP_TACR])
#define mfp_get_tbcr() (mfp_base[MFP_TBCR])
#define mfp_get_tcdcr() (mfp_base[MFP_TCDCR])
#define mfp_get_tadr() (mfp_base[MFP_TADR])
#define mfp_get_tbdr() (mfp_base[MFP_TBDR])
#define mfp_get_tcdr() (mfp_base[MFP_TCDR])
#define mfp_get_tddr() (mfp_base[MFP_TDDR])
#define mfp_get_ucr() (mfp_base[MFP_UCR])
#define mfp_get_rsr() (mfp_base[MFP_RSR])
#define mfp_get_tsr() (mfp_base[MFP_TSR])
#define mfp_get_udr() (mfp_base[MFP_UDR])
#define mfp_bit_set(reg,bits) (mfp_base[(reg)] |= (bits))
#define mfp_bit_clear(reg,bits) (mfp_base[(reg)] &= (~(bits)))
#define mfp_bit_set_gpip(bits) mfp_bit_set(MFP_GPIP, (bits))
#define mfp_bit_clear_gpip(bits) mfp_bit_clear(MFP_GPIP, (bits))
#define mfp_bit_set_iera(bits) mfp_bit_set(MFP_IERA, (bits))
#define mfp_bit_clear_iera(bits) mfp_bit_clear(MFP_IERA, (bits))
#define mfp_bit_set_ierb(bits) mfp_bit_set(MFP_IERB, (bits))
#define mfp_bit_clear_ierb(bits) mfp_bit_clear(MFP_IERB, (bits))
void mfp_wait_for_hsync __P((void));
int mfp_send_usart __P((int));
int mfp_recieve_usart __P((void));

125
sys/arch/x68k/dev/mha.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: mha.c,v 1.12 1999/02/07 15:18:58 minoura Exp $ */
/* $NetBSD: mha.c,v 1.13 1999/03/16 16:30:19 minoura Exp $ */
/*
* Copyright (c) 1996 Masaru Oki, Takumi Nakamura and Masanobu Saitoh. All rights reserved.
@ -89,6 +89,8 @@
#include <sys/user.h>
#include <sys/queue.h>
#include <machine/bus.h>
#include <dev/scsipi/scsi_all.h>
#include <dev/scsipi/scsipi_all.h>
#include <dev/scsipi/scsi_message.h>
@ -97,7 +99,8 @@
#include <x68k/x68k/iodevice.h>
#include <x68k/dev/mb86601reg.h>
#include <x68k/dev/mhavar.h>
#include <x68k/dev/dmavar.h>
#include <x68k/dev/intiovar.h>
#include <x68k/dev/scsiromvar.h>
#if 0
#define WAIT {if (sc->sc_pc[2]) {printf("[W_%d", __LINE__); while (sc->sc_pc[2] & 0x40);printf("]");}}
@ -233,7 +236,7 @@ int mha_scsi_cmd __P((struct scsipi_xfer *));
int mha_poll __P((struct mha_softc *, struct acb *));
void mha_sched __P((struct mha_softc *));
void mha_done __P((struct mha_softc *, struct acb *));
int mhaintr __P((int));
int mhaintr __P((void*));
void mha_timeout __P((void *));
void mha_minphys __P((struct buf *));
void mha_dequeue __P((struct mha_softc *, struct acb *));
@ -244,7 +247,6 @@ void mha_show_scsi_cmd __P((struct acb *));
void mha_print_active_acb __P((void));
void mha_dump_driver __P((struct mha_softc *));
#endif
volatile void * mha_find __P((int));
static int mha_dataio_dma __P((int, int, struct mha_softc *, u_char *, int));
@ -270,34 +272,28 @@ mhamatch(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
if (strcmp(aux, "mha") || mha_find(cf->cf_unit) == 0)
struct intio_attach_args *ia = aux;
bus_space_tag_t iot = ia->ia_bst;
bus_space_handle_t ioh;
ia->ia_size=0x20;
if (ia->ia_addr != 0xea0000)
return 0;
if (intio_map_allocate_region(parent->dv_parent, ia,
INTIO_MAP_TESTONLY) < 0) /* FAKE */
return 0;
if (bus_space_map(iot, ia->ia_addr, 0x20, BUS_SPACE_MAP_SHIFTED,
&ioh) < 0)
return 0;
if (!badaddr (INTIO_ADDR(ia->ia_addr + 0)))
return 0;
bus_space_unmap(iot, ioh, 0x20);
return 1;
}
/*
* Find the board
*/
volatile void *
mha_find(unit)
int unit;
{
volatile void *addr;
if (unit > 1)
return 0;
/* Find only on-board ROM */
if (badaddr(IODEVbase->exscsirom)
|| bcmp((void *)&IODEVbase->exscsirom[0x24], "SCSIEX", 6))
return 0;
/* If bdid exists, this board is ``CZ-6BS1'' */
if (!badbaddr(&IODEVbase->io_exspc.bdid))
return 0;
return (void *)(&IODEVbase->exscsirom[0x60]);
}
/*
*/
@ -309,12 +305,15 @@ mhaattach(parent, self, aux)
void *aux;
{
struct mha_softc *sc = (void *)self;
struct intio_attach_args *ia = aux;
tmpsc = sc; /* XXX */
SPC_TRACE(("mhaattach "));
sc->sc_state = SPC_INIT;
sc->sc_iobase = mha_find(sc->sc_dev.dv_unit); /* XXX */
sc->sc_iobase = INTIO_ADDR(ia->ia_addr + 0x80); /* XXX */
intio_map_allocate_region (parent->dv_parent, ia, INTIO_MAP_ALLOCATE);
/* XXX: FAKE */
sc->sc_pc = (volatile u_char *)sc->sc_iobase;
sc->sc_ps = (volatile u_short *)sc->sc_iobase;
@ -322,6 +321,8 @@ mhaattach(parent, self, aux)
sc->sc_id = IODEVbase->io_sram[0x70] & 0x7; /* XXX */
intio_intr_establish (ia->ia_intr, "mha", mhaintr, sc);
mha_init(sc); /* Init chip and driver */
printf("\n%s: Resetting SCSI bus... ", self->dv_xname);
@ -362,7 +363,7 @@ mhaattach(parent, self, aux)
ATR = 0x01;
PER = 0xc9;
#endif
IER = IE_ALL; /* $B$9$Y$F$N3d$j9~$_$r5v2D(B */
IER = IE_ALL; /* すべての割り込みを許可 */
#if 1
GLR = 0x00;
DMR = 0x30;
@ -381,7 +382,7 @@ mhaattach(parent, self, aux)
SPC_TRACE(("waiting for intr..."));
while (!(SSR & SS_IREQUEST))
delay(10);
mhaintr (sc->sc_dev.dv_unit);
mhaintr (sc);
tmpsc = NULL;
@ -547,7 +548,7 @@ mhaselect(sc, target, lun, cmd, clen)
SPC_TRACE(("[mhaselect(t%d,l%d,cmd:%x)] ", target, lun, *(u_char *)cmd));
/* CDB $B$r(B SPC $B$N(B MCS REG $B$K%;%C%H$9$k(B */
/* CDB を SPC の MCS REG にセットする */
/* Now the command into the FIFO */
WAIT;
#if 1
@ -706,7 +707,7 @@ mha_scsi_cmd(xs)
#endif
/*
* $B%-%e!<$N=hM}Cf$G$J$1$l$P!"%9%1%8%e!<%j%s%03+;O$9$k(B
* キューの処理中でなければ、スケジューリング開始する
*/
if (sc->sc_state == SPC_IDLE)
mha_sched(sc);
@ -754,7 +755,7 @@ mha_poll(sc, acb)
* have got an interrupt?
*/
if (SSR & SS_IREQUEST)
mhaintr(sc->sc_dev.dv_unit);
mhaintr(sc);
if ((xs->flags & ITSDONE) != 0)
break;
DELAY(10);
@ -1566,7 +1567,7 @@ mha_datain_pio(sc, p, n)
sc->sc_ps[3] = 1;
sc->sc_ps[4] = n >> 8;
sc->sc_pc[10] = n;
/* $BHa$7$-%=%U%HE>Aw(B */
/* 悲しきソフト転送 */
CMR = CMD_RECEIVE_TO_MPU;
for (;;) {
a = SSR;
@ -1604,7 +1605,7 @@ mha_dataout_pio(sc, p, n)
sc->sc_ps[3] = 1;
sc->sc_ps[4] = n >> 8;
sc->sc_pc[10] = n;
/* $BHa$7$-%=%U%HE>Aw(B */
/* 悲しきソフト転送 */
CMR = CMD_SEND_FROM_MPU;
for (;;) {
a = SSR;
@ -1673,7 +1674,7 @@ mha_dataio_dma(dw, cw, sc, p, n)
sc->sc_ps[3] = 1;
sc->sc_ps[4] = ts >> 8;
sc->sc_pc[10] = ts;
/* DMA $BE>Aw@)8f$O0J2<$NDL$j!#(B
/* DMA 転送制御は以下の通り。
3 ... short bus cycle
2 ... MAXIMUM XFER.
1 ... BURST XFER.
@ -1726,10 +1727,10 @@ mha_datain(sc, p, n)
* 1) always uses programmed I/O
*/
int
mhaintr(unit)
int unit;
mhaintr(arg)
void *arg;
{
struct mha_softc *sc;
struct mha_softc *sc = arg;
u_char ints;
struct acb *acb;
struct scsipi_link *sc_link;
@ -1745,18 +1746,12 @@ mhaintr(unit)
} else {
#endif
/* return if not configured */
if (!mha_cd.cd_devs) /* Check if at least one unit is attached. */
return; /* XXX should check if THE unit exists. */
sc = mha_cd.cd_devs[unit];
#if 1 /* XXX */
}
#endif
/*
* $B3d$j9~$_6X;_$K$9$k(B
* 割り込み禁止にする
*/
#if 0
SCTL &= ~SCTL_INTR_ENAB;
@ -1766,7 +1761,7 @@ mhaintr(unit)
loop:
/*
* $BA4E>Aw$,40A4$K=*N;$9$k$^$G%k!<%W$9$k(B
* 全転送が完全に終了するまでループする
*/
/*
* First check for abnormal conditions, such as reset.
@ -1814,7 +1809,7 @@ loop:
if (ph & PSNS_ACK)
{
int s;
/* $B$U$D!<$N%3%^%s%I$,=*N;$7$?$i$7$$(B */
/* ふつーのコマンドが終了したらしい */
SPC_MISC(("0x60)phase = %x(ought to be %x)\n", ph & PHASE_MASK, sc->sc_phase));
# if 0
switch (sc->sc_phase)
@ -1851,19 +1846,19 @@ SPC_MISC(("0x60)phase = %x(ought to be %x)\n", ph & PHASE_MASK, sc->sc_phase));
#if 1
if (sc->sc_state == SPC_SELECTING) /* XXX msaitoh */
sc->sc_state = SPC_HASNEXUS;
/* $B%U%'!<%:$N7h$aBG$A$r$9$k(B
$B30$l$?$i!"(Binitial-phase error(0x54) $B$,(B
$BJV$C$F$/$k$s$GCm0U$7$?$^$(!#(B
$B$G$b$J$<$+(B 0x65 $B$,JV$C$F$-$?$j$7$F$M!<$+(B? */
/* フェーズの決め打ちをする
外れたら、initial-phase error(0x54) が
返ってくるんで注意したまえ。
でもなぜか 0x65 が返ってきたりしてねーか? */
WAIT;
if (SSR & SS_IREQUEST)
continue;
switch (sc->sc_phase)
{
default:
panic("$B8+CN$i$L(B phase $B$,Mh$A$^$C$?$@$h(B");
panic("見知らぬ phase が来ちまっただよ");
case MESSAGE_IN_PHASE:
/* $B2?$b$7$J$$(B */
/* 何もしない */
continue;
case STATUS_PHASE:
sc->sc_phase = MESSAGE_IN_PHASE;
@ -1873,8 +1868,8 @@ SPC_MISC(("0x60)phase = %x(ought to be %x)\n", ph & PHASE_MASK, sc->sc_phase));
sc->sc_prevphase = DATA_IN_PHASE;
if (sc->sc_dleft == 0)
{
/* $BE>Aw%G!<%?$O$b$&$J$$$N$G(B
$B%9%F!<%?%9%U%'!<%:$r4|BT$7$h$&(B */
/* 転送データはもうないので
ステータスフェーズを期待しよう */
sc->sc_phase = STATUS_PHASE;
CMR = CMD_RECEIVE_STS; /* receive sts */
continue;
@ -1887,22 +1882,22 @@ SPC_MISC(("0x60)phase = %x(ought to be %x)\n", ph & PHASE_MASK, sc->sc_phase));
sc->sc_prevphase = DATA_OUT_PHASE;
if (sc->sc_dleft == 0)
{
/* $BE>Aw%G!<%?$O$b$&$J$$$N$G(B
$B%9%F!<%?%9%U%'!<%:$r4|BT$7$h$&(B */
/* 転送データはもうないので
ステータスフェーズを期待しよう */
sc->sc_phase = STATUS_PHASE;
CMR = CMD_RECEIVE_STS; /* receive sts */
continue;
}
/* data phase $B$NB3$-$r$d$m$&(B */
/* data phase の続きをやろう */
n = mha_dataout(sc, sc->sc_dp, sc->sc_dleft);
sc->sc_dp += n;
sc->sc_dleft -= n;
continue;
case COMMAND_PHASE:
/* $B:G=i$O(B CMD PHASE $B$H$$$&$3$H$i$7$$(B */
/* 最初は CMD PHASE ということらしい */
if (acb->dleft)
{
/* $B%G!<%?E>Aw$,$"$j$&$k>l9g(B */
/* データ転送がありうる場合 */
if (acb->xs->flags & SCSI_DATA_IN)
{
sc->sc_phase = DATA_IN_PHASE;
@ -1921,7 +1916,7 @@ SPC_MISC(("0x60)phase = %x(ought to be %x)\n", ph & PHASE_MASK, sc->sc_phase));
}
else
{
/* $B%G!<%?E>Aw$O$J$$$i$7$$(B?! */
/* データ転送はないらしい?! */
WAIT;
sc->sc_phase = STATUS_PHASE;
CMR = CMD_RECEIVE_STS; /* receive sts */
@ -1950,8 +1945,8 @@ SPC_MISC(("0x60)phase = %x(ought to be %x)\n", ph & PHASE_MASK, sc->sc_phase));
case 0x32: /* phase error in xfer progress. */
SPC_MISC(("[0x32]"));
case 0x65: /* invalid command.
$B$J$<$3$s$J$b$N$,=P$k$N$+(B
$B26$K$OA4$/M}2r$G$-$J$$(B */
なぜこんなものが出るのか
俺には全く理解できない */
#if 1
SPC_MISC(("[0x%04x]", r));
#endif

4
sys/arch/x68k/dev/mhavar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: mhavar.h,v 1.2 1998/11/19 21:50:30 thorpej Exp $ */
/* $NetBSD: mhavar.h,v 1.3 1999/03/16 16:30:19 minoura Exp $ */
/*
* Copyright (c) 1994 Peter Galbavy. All rights reserved.
@ -86,7 +86,7 @@ struct spc_tinfo {
struct mha_softc {
struct device sc_dev; /* us as a device */
volatile struct mb86601 *sc_iobase;
volatile void *sc_iobase;
volatile u_char *sc_pc;
volatile u_short *sc_ps;
volatile u_char *sc_pcx;

22
sys/arch/x68k/dev/ms.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ms.c,v 1.6 1999/02/03 20:22:28 mycroft Exp $ */
/* $NetBSD: ms.c,v 1.7 1999/03/16 16:30:19 minoura Exp $ */
/*
* Copyright (c) 1992, 1993
@ -63,6 +63,7 @@
#include <arch/x68k/dev/event_var.h>
#include <machine/vuid_event.h>
#include <arch/x68k/dev/mfp.h>
#include "locators.h"
@ -92,8 +93,8 @@
* where b is the button state, encoded as 0x80|(buttons)---there are
* two buttons (2=left, 1=right)---and dx,dy are X and Y delta values.
*
* It needs trigger for the transmission. When zs RTS negated, the mouse
* begins the sequence. RTS assertion has no effect.
* It needs a trigger for the transmission. When zs RTS negated, the
* mouse begins the sequence. RTS assertion has no effect.
*/
struct ms_softc {
struct device ms_dev; /* required first: base device */
@ -161,8 +162,10 @@ ms_match(parent, cf, aux)
return 0;
if (args->channel != 1)
return 0;
if (&zsc->zsc_addr->zs_chan_b != (struct zschan *) ZSMS_PHYSADDR)
return 0;
return 1;
return 2;
}
void
@ -215,8 +218,8 @@ msopen(dev, flags, mode, p)
{
struct ms_softc *ms;
int unit;
int s;
printf ("msopen\n");
unit = minor(dev);
if (unit >= ms_cd.cd_ndevs)
return (ENXIO);
@ -232,7 +235,9 @@ printf ("msopen\n");
ms->ms_ready = 1; /* start accepting events */
ms->ms_rts = 1;
s = splzs();
ms_trigger(ms->ms_cs, 1); /* set MSCTR high (standby) */
splx(s);
ms->ms_byteno = -1;
ms->ms_nodata = 0;
return (0);
@ -641,8 +646,7 @@ ms_trigger (cs, onoff)
zs_write_reg(cs, 5, cs->cs_preg[5]);
/* for keyborad connected one */
while (!(mfp.tsr & MFP_TSR_BE));
mfp.udr = onoff | 0x40;
mfp_send_usart (onoff | 0x40);
}
/*
@ -653,8 +657,8 @@ void
ms_modem(void)
{
struct ms_softc *ms = ms_cd.cd_devs[0];
int s;
/* we are in higher intr. level than splzs. no need splzs(). */
if (!ms->ms_ready)
return;
if (ms->ms_nodata++ > 300) { /* XXX */
@ -667,7 +671,6 @@ ms_modem(void)
return;
}
s = splzs();
if (ms->ms_rts) {
if (ms->ms_byteno == -1) {
/* start next sequence */
@ -679,5 +682,4 @@ ms_modem(void)
ms->ms_rts = 1;
ms_trigger(ms->ms_cs, ms->ms_rts);
}
splx(s);
}

216
sys/arch/x68k/dev/neptune.c Normal file
View File

@ -0,0 +1,216 @@
/* $NetBSD: neptune.c,v 1.2 1999/03/16 16:30:20 minoura Exp $ */
/*
*
* Copyright (c) 1998 NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Minoura Makoto.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles D. Cranor and
* Washington University.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Neptune-X -- X68k-ISA Bus Bridge
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/frame.h>
#include <arch/x68k/dev/intiovar.h>
#include <arch/x68k/dev/neptunevar.h>
/* bus_space stuff */
static int neptune_bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t,
int, bus_space_handle_t*));
static void neptune_bus_space_unmap __P((bus_space_tag_t,
bus_space_handle_t, bus_size_t));
static int neptune_bus_space_subregion __P((bus_space_tag_t, bus_space_handle_t,
bus_size_t, bus_size_t,
bus_space_handle_t*));
static struct x68k_bus_space neptune_bus = {
#if 0
X68K_NEPUTUNE_BUS,
#endif
neptune_bus_space_map, neptune_bus_space_unmap,
neptune_bus_space_subregion,
x68k_bus_space_alloc, x68k_bus_space_free,
};
static int neptune_match __P((struct device *, struct cfdata *, void *));
static void neptune_attach __P((struct device *, struct device *, void *));
static int neptune_search __P((struct device *, struct cfdata *cf, void *));
static int neptune_print __P((void *, const char *));
struct cfattach neptune_ca = {
sizeof(struct neptune_softc), neptune_match, neptune_attach
};
static int
neptune_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct intio_attach_args *ia = aux;
if (strcmp(ia->ia_name, "neptune") != 0)
return 0;
ia->ia_size = 0x400;
if (intio_map_allocate_region (parent, ia, INTIO_MAP_TESTONLY))
return 0;
/* Neptune is a virtual device. Always there. */
return (1);
}
static void
neptune_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct neptune_softc *sc = (struct neptune_softc *)self;
struct intio_attach_args *ia = aux;
struct neptune_attach_args na;
int r;
struct cfdata *cf;
ia->ia_size = 0x400;
r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
#ifdef DIAGNOSTIC
if (r)
panic ("IO map for Neptune corruption??");
#endif
sc->sc_bst = malloc(sizeof(struct x68k_bus_space), M_DEVBUF, M_NOWAIT);
if (sc->sc_bst == NULL)
panic("neptune_attach: can't allocate bus_space structure");
*sc->sc_bst = neptune_bus;
sc->sc_bst->x68k_bus_device = self;
sc->sc_addr = (vaddr_t) (ia->ia_addr - PHYS_INTIODEV + intiobase);
na.na_bst = sc->sc_bst;
na.na_intr = ia->ia_intr;
cf = config_search (neptune_search, self, &na);
if (cf) {
printf (": Neptune-X ISA bridge\n");
config_attach(self, cf, &na, neptune_print);
} else {
printf (": no device found.\n");
intio_map_free_region(parent, ia);
}
}
static int
neptune_search(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct neptune_attach_args *na = aux;
na->na_addr = cf->neptune_cf_addr;
return (*cf->cf_attach->ca_match)(parent, cf, na);
}
static int
neptune_print(aux, name)
void *aux;
const char *name;
{
struct neptune_attach_args *na = aux;
/* if (na->na_addr > 0) */
printf (" addr 0x%06x", na->na_addr);
return (QUIET);
}
/*
* neptune bus space stuff.
*/
static int
neptune_bus_space_map(t, bpa, size, flags, bshp)
bus_space_tag_t t;
bus_addr_t bpa;
bus_size_t size;
int flags;
bus_space_handle_t *bshp;
{
vaddr_t start = ((struct neptune_softc*) ((struct x68k_bus_space*) t)
->x68k_bus_device)->sc_addr;
/*
* Neptune bus is mapped permanently.
*/
*bshp = (bus_space_handle_t) ((u_int)start + ((u_int)bpa - 0x200) * 2);
if (badaddr(*bshp)) {
return 1;
}
*bshp |= 0x80000000; /* higher byte (= even address) only */
return (0);
}
static void
neptune_bus_space_unmap(t, bsh, size)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t size;
{
return;
}
static int
neptune_bus_space_subregion(t, bsh, offset, size, nbshp)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset, size;
bus_space_handle_t *nbshp;
{
*nbshp = bsh + offset*2;
return (0);
}

67
sys/arch/x68k/dev/neptunevar.h Normal file
View File

@ -0,0 +1,67 @@
/* $NetBSD: neptunevar.h,v 1.2 1999/03/16 16:30:20 minoura Exp $ */
/*
*
* Copyright (c) 1998 NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Minoura Makoto.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles D. Cranor and
* Washington University.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Neptune-X -- X68k-ISA Bus Bridge
*/
#ifndef _NEPTUNEVAR_H_
#define _NEPTUNEVAR_H_
#include <machine/frame.h>
#include <sys/malloc.h>
#include <sys/extent.h>
#include "locators.h"
#define neptune_cf_addr cf_loc[NEPTUNECF_ADDR]
struct neptune_attach_args {
bus_space_tag_t na_bst; /* bus_space tag */
int na_addr; /* addr */
int na_intr; /* intr */
};
struct neptune_softc {
struct device sc_dev;
bus_space_tag_t sc_bst;
vaddr_t sc_addr;
};
#define neptune_intr_establish intio_intr_establish
#endif

125
sys/arch/x68k/dev/opm.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: opm.c,v 1.3 1997/10/12 18:06:25 oki Exp $ */
/* $NetBSD: opm.c,v 1.4 1999/03/16 16:30:20 minoura Exp $ */
/*
* Copyright (c) 1995 Masanobu Saitoh, Takuya Harakawa.
@ -32,20 +32,90 @@
* SUCH DAMAGE.
*/
#include "fd.h"
/*#include "bsdaudio.h"*/
#include "bell.h"
#if ((NBSDAUDIO > 0) || (NFD > 0) || (NBELL > 0))
/*
* Temporary implementation: not fully bus.h'fied.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <x68k/dev/opmreg.h>
#include <x68k/dev/bsd_audioreg.h>
#include <x68k/x68k/iodevice.h>
#include <sys/device.h>
static u_char opmreg[0x100];
static struct opm_voice vdata[8];
#include <machine/bus.h>
#include <machine/cpu.h>
#include <arch/x68k/dev/opmreg.h>
#include <arch/x68k/dev/intiovar.h>
struct opm_softc {
struct device sc_dev;
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bht;
u_int8_t sc_regs[0x100];
struct opm_voice sc_vdata[8];
};
struct opm_softc *opm0; /* XXX */
static int opm_match __P((struct device *, struct cfdata *, void *));
static void opm_attach __P((struct device *, struct device *, void *));
struct cfattach opm_ca = {
sizeof (struct opm_softc), opm_match, opm_attach
};
static int
opm_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct intio_attach_args *ia = aux;
if (strcmp(ia->ia_name, "opm") != 0)
return 0;
if (ia->ia_addr == INTIOCF_ADDR_DEFAULT)
ia->ia_addr = 0xe90000;
ia->ia_size = 0x2000;
if (intio_map_allocate_region (parent, ia, INTIO_MAP_TESTONLY))
return 0;
return 1;
}
static void
opm_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct opm_softc *sc = (struct opm_softc *)self;
struct intio_attach_args *ia = aux;
int r;
printf ("\n");
ia->ia_size = 0x2000;
r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
#ifdef DIAGNOSTIC
if (r)
panic ("IO map for OPM corruption??");
#endif
sc->sc_bst = ia->ia_bst;
r = bus_space_map (sc->sc_bst,
ia->ia_addr, ia->ia_size,
BUS_SPACE_MAP_SHIFTED,
&sc->sc_bht);
#ifdef DIAGNOSTIC
if (r)
panic ("Cannot map IO space for OPM.");
#endif
if (sc->sc_dev.dv_unit == 0)
opm0 = sc; /* XXX */
return;
}
void opm_set_volume __P((int, int));
void opm_set_key __P((int, int));
@ -62,38 +132,47 @@ __inline static void
writeopm(reg, dat)
int reg, dat;
{
while (OPM.data & 0x80);
OPM.reg = reg;
while (OPM.data & 0x80);
OPM.data = opmreg[reg] = dat;
while (bus_space_read_1 (opm0->sc_bst, opm0->sc_bht, OPM_DATA) & 0x80);
bus_space_write_1 (opm0->sc_bst, opm0->sc_bht, OPM_REG, reg);
while (bus_space_read_1 (opm0->sc_bst, opm0->sc_bht, OPM_DATA) & 0x80);
bus_space_write_1 (opm0->sc_bst, opm0->sc_bht, OPM_DATA, dat);
opm0->sc_regs[reg] = dat;
}
__inline static int
readopm(reg)
int reg;
{
return opmreg[reg];
return opm0->sc_regs[reg];
}
#include "fd.h"
#include "bell.h"
#if 0
void
adpcm_chgclk(clk)
u_char clk;
{
writeopm(0x1b, readopm(0x1b) & ~OPM1B_CT1MSK | clk);
}
#endif
#if NFD > 0
void
fdc_force_ready(rdy)
u_char rdy;
{
writeopm(0x1b, readopm(0x1b) & ~OPM1B_CT2MSK | rdy);
}
#endif
#if NBELL > 0
void
opm_key_on(channel)
u_char channel;
{
writeopm(0x08, vdata[channel].sm << 3 | channel);
writeopm(0x08, opm0->sc_vdata[channel].sm << 3 | channel);
}
void
@ -108,7 +187,7 @@ opm_set_voice(channel, voice)
int channel;
struct opm_voice *voice;
{
bcopy(voice, &vdata[channel], sizeof(struct opm_voice));
bcopy(voice, &opm0->sc_vdata[channel], sizeof(struct opm_voice));
opm_set_voice_sub(0x40 + channel, &voice->m1);
opm_set_voice_sub(0x48 + channel, &voice->m2);
@ -148,22 +227,22 @@ opm_set_volume(channel, volume)
{
int value;
switch (vdata[channel].con) {
switch (opm0->sc_vdata[channel].con) {
case 7:
value = vdata[channel].m1.tl + volume;
value = opm0->sc_vdata[channel].m1.tl + volume;
writeopm(0x60 + channel, ((value > 0x7f) ? 0x7f : value));
case 6:
case 5:
value = vdata[channel].m2.tl + volume;
value = opm0->sc_vdata[channel].m2.tl + volume;
writeopm(0x68 + channel, ((value > 0x7f) ? 0x7f : value));
case 4:
value = vdata[channel].c1.tl + volume;
value = opm0->sc_vdata[channel].c1.tl + volume;
writeopm(0x70 + channel, ((value > 0x7f) ? 0x7f : value));
case 3:
case 2:
case 1:
case 0:
value = vdata[channel].c2.tl + volume;
value = opm0->sc_vdata[channel].c2.tl + volume;
writeopm(0x78 + channel, ((value > 0x7f) ? 0x7f : value));
}
}

5
sys/arch/x68k/dev/opmreg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: opmreg.h,v 1.1.1.1 1996/05/05 12:17:03 oki Exp $ */
/* $NetBSD: opmreg.h,v 1.2 1999/03/16 16:30:20 minoura Exp $ */
/*
* Copyright (c) 1995 Masanobu Saitoh, Takuya Harakawa.
@ -72,4 +72,7 @@ struct opm_voice {
void adpcm_chgclk __P((u_char));
void fdc_force_ready __P((u_char));
#define OPM_REG 0
#define OPM_DATA 1
#endif /* !_OPMREG_H_ */

122
sys/arch/x68k/dev/rtclock.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: rtclock.c,v 1.3 1997/10/12 12:13:52 oki Exp $ */
/* $NetBSD: rtclock.c,v 1.4 1999/03/16 16:30:20 minoura Exp $ */
/*
* Copyright 1993, 1994 Masaru Oki
@ -43,13 +43,75 @@
#include <sys/reboot.h>
#include <sys/file.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <x68k/dev/rtclock_var.h>
#include <x68k/x68k/iodevice.h>
#include <machine/bus.h>
#include <arch/x68k/dev/rtclock_var.h>
#include <arch/x68k/dev/intiovar.h>
static u_long rtgettod __P((void));
static int rtsettod __P((long));
static int rtc_match __P((struct device *, struct cfdata *, void *));
static void rtc_attach __P((struct device *, struct device *, void *));
struct cfattach rtc_ca = {
sizeof(struct rtc_softc), rtc_match, rtc_attach
};
static int
rtc_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct intio_attach_args *ia = aux;
if (strcmp (ia->ia_name, "rtc") != 0)
return (0);
if (cf->cf_unit != 0)
return (0);
/* fixed address */
if (ia->ia_addr != RTC_ADDR)
return (0);
if (ia->ia_intr != -1)
return (0);
return (1);
}
static struct rtc_softc *rtc; /* XXX: softc cache */
static void
rtc_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct rtc_softc *sc = (struct rtc_softc *)self;
struct intio_attach_args *ia = aux;
int r;
ia->ia_size = 0x20;
r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
#ifdef DIAGNOSTIC
if (r)
panic ("IO map for RTC corruption??");
#endif
sc->sc_bst = ia->ia_bst;
bus_space_map(sc->sc_bst, ia->ia_addr, 0x2000, 0, &sc->sc_bht);
rtc = sc;
rtclockinit();
printf (": RP5C15\n");
}
/*
* x68k/clock.c calls thru this vector, if it is set, to read
* the realtime clock.
@ -57,14 +119,11 @@ static int rtsettod __P((long));
u_long (*gettod) __P((void));
int (*settod) __P((long));
static volatile union rtc *rtc_addr = 0;
int rtclockinit __P((void));
int
rtclockinit()
{
rtc_addr = &IODEVbase->io_rtc;
if (rtgettod()) {
gettod = rtgettod;
settod = rtsettod;
@ -86,18 +145,18 @@ rtgettod()
int year, month, day, hour, min, sec;
/* hold clock */
RTC_WRITE(rtc_addr, mode, RTC_HOLD_CLOCK);
RTC_WRITE(RTC_MODE, RTC_HOLD_CLOCK);
/* read it */
sec = RTC_REG(sec10) * 10 + RTC_REG(sec);
min = RTC_REG(min10) * 10 + RTC_REG(min);
hour = RTC_REG(hour10) * 10 + RTC_REG(hour);
day = RTC_REG(day10) * 10 + RTC_REG(day);
month = RTC_REG(mon10) * 10 + RTC_REG(mon);
year = RTC_REG(year10) * 10 + RTC_REG(year) + 1980;
sec = RTC_REG(RTC_SEC10) * 10 + RTC_REG(RTC_SEC);
min = RTC_REG(RTC_MIN10) * 10 + RTC_REG(RTC_MIN);
hour = RTC_REG(RTC_HOUR10) * 10 + RTC_REG(RTC_HOUR);
day = RTC_REG(RTC_DAY10) * 10 + RTC_REG(RTC_DAY);
month = RTC_REG(RTC_MON10) * 10 + RTC_REG(RTC_MON);
year = RTC_REG(RTC_YEAR10) * 10 + RTC_REG(RTC_YEAR) + 1980;
/* let it run again.. */
RTC_WRITE(rtc_addr, mode, RTC_FREE_CLOCK);
RTC_WRITE(RTC_MODE, RTC_FREE_CLOCK);
range_test(hour, 0, 23);
range_test(day, 1, 31);
@ -139,13 +198,6 @@ rtsettod (tim)
u_char mon1, mon2;
u_char year1, year2;
/*
* there seem to be problems with the bitfield addressing
* currently used..
*/
if (!rtc_addr)
return 0;
tim -= (rtc_offset * 60);
/* prepare values to be written to clock */
@ -185,20 +237,20 @@ rtsettod (tim)
day1 = day / 10;
day2 = day % 10;
RTC_WRITE(rtc_addr, mode, RTC_HOLD_CLOCK);
RTC_WRITE(rtc_addr, sec10, sec1);
RTC_WRITE(rtc_addr, sec, sec2);
RTC_WRITE(rtc_addr, min10, min1);
RTC_WRITE(rtc_addr, min, min2);
RTC_WRITE(rtc_addr, hour10, hour1);
RTC_WRITE(rtc_addr, hour, hour2);
RTC_WRITE(rtc_addr, day10, day1);
RTC_WRITE(rtc_addr, day, day2);
RTC_WRITE(rtc_addr, mon10, mon1);
RTC_WRITE(rtc_addr, mon, mon2);
RTC_WRITE(rtc_addr, year10, year1);
RTC_WRITE(rtc_addr, year, year2);
RTC_WRITE(rtc_addr, mode, RTC_FREE_CLOCK);
RTC_WRITE(RTC_MODE, RTC_HOLD_CLOCK);
RTC_WRITE(RTC_SEC10, sec1);
RTC_WRITE(RTC_SEC, sec2);
RTC_WRITE(RTC_MIN10, min1);
RTC_WRITE(RTC_MIN, min2);
RTC_WRITE(RTC_HOUR10, hour1);
RTC_WRITE(RTC_HOUR, hour2);
RTC_WRITE(RTC_DAY10, day1);
RTC_WRITE(RTC_DAY, day2);
RTC_WRITE(RTC_MON10, mon1);
RTC_WRITE(RTC_MON, mon2);
RTC_WRITE(RTC_YEAR10, year1);
RTC_WRITE(RTC_YEAR, year2);
RTC_WRITE(RTC_MODE, RTC_FREE_CLOCK);
return 1;
}

49
sys/arch/x68k/dev/rtclock_var.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: rtclock_var.h,v 1.1.1.1 1996/05/05 12:17:03 oki Exp $ */
/* $NetBSD: rtclock_var.h,v 1.2 1999/03/16 16:30:20 minoura Exp $ */
/*
* Copyright 1993, 1994 Masaru Oki
@ -33,6 +33,13 @@
#ifndef _RTCLOCKVAR_H_
#define _RTCLOCKVAR_H_
struct rtc_softc {
struct device sc_dev;
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bht;
};
/*
* commands written to mode, HOLD before reading the clock,
* FREE after done reading.
@ -41,8 +48,44 @@
#define RTC_HOLD_CLOCK 0
#define RTC_FREE_CLOCK 8
#define RTC_REG(x) (rtc_addr->bank0.x & 0x0f)
#define RTC_WRITE(r,x,v) (r)->bank0.x = (v)
#define RTC_REG(x) (bus_space_read_1(rtc->sc_bst, rtc->sc_bht, (x)) & 0x0f)
#define RTC_WRITE(x,v) bus_space_write_1(rtc->sc_bst, rtc->sc_bht, (x), (v))
#define RTC_ADDR 0xe8a000
/* RTC register bank 0 */
#define RTC_SEC 0x01
#define RTC_SEC10 0x03
#define RTC_MIN 0x05
#define RTC_MIN10 0x07
#define RTC_HOUR 0x09
#define RTC_HOUR10 0x0b
#define RTC_WEEK 0x0d
#define RTC_DAY 0x0f
#define RTC_DAY10 0x11
#define RTC_MON 0x13
#define RTC_MON10 0x15
#define RTC_YEAR 0x17
#define RTC_YEAR10 0x19
#define RTC_MODE 0x1b
#define RTC_TEST 0x1d
#define RTC_RESET 0x1f
/* RTC register bank 1 */
#define RTC_CLKOUT 0x01
#define RTC_ADJUST 0x03
#define RTC_AL_MIN 0x05
#define RTC_AL_MIN10 0x07
#define RTC_AL_HOUR 0x09
#define RTC_AL_HOUR10 0x0b
#define RTC_AL_WEEK 0x0d
#define RTC_AL_DAY 0x0f
#define RTC_AL_DAY10 0x11
#define RTC_UNUSED1 0x13
#define RTC_AMPM 0x15
#define RTC_LEAP 0x17
#define RTC_UNUSED2 0x19
#define FEBRUARY 2
#define STARTOFTIME 1970

172
sys/arch/x68k/dev/scsirom.c Normal file
View File

@ -0,0 +1,172 @@
/* $NetBSD: scsirom.c,v 1.2 1999/03/16 16:30:20 minoura Exp $ */
/*
*
* Copyright (c) 1999 NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles D. Cranor and
* Washington University.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* SCSI BIOS ROM.
* Used to probe the board.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <arch/x68k/dev/intiovar.h>
#include <arch/x68k/dev/scsiromvar.h>
struct {
paddr_t addr, devaddr;
int intr;
const char id[7];
} scsirom_descr[] = {{
0x00fc0000, 0x00e96020, 108, "SCSIIN"
}, {
0x00ea0020, 0x00ea0000, 246, "SCSIEX"
}};
#define SCSIROM_ID 0x24
/*
* autoconf stuff
*/
static int scsirom_find __P((struct device *, struct intio_attach_args *));
static int scsirom_match __P((struct device *, struct cfdata *, void *));
static void scsirom_attach __P((struct device *, struct device *, void *));
struct cfattach scsirom_ca = {
sizeof(struct scsirom_softc), scsirom_match, scsirom_attach
};
static int
scsirom_find (parent, ia)
struct device *parent;
struct intio_attach_args *ia;
{
bus_space_handle_t ioh;
char buf[10];
int which;
int r = -1;
if (ia->ia_addr == scsirom_descr[INTERNAL].addr)
which = INTERNAL;
else if (ia->ia_addr == scsirom_descr[EXTERNAL].addr)
which = EXTERNAL;
else
return -1;
ia->ia_size = 0x1fe0;
if (intio_map_allocate_region (parent, ia, INTIO_MAP_TESTONLY))
return -1;
if (bus_space_map (ia->ia_bst, ia->ia_addr, ia->ia_size, 0, &ioh) < 0)
return -1;
bus_space_read_region_1 (ia->ia_bst, ioh, SCSIROM_ID, buf, 6);
if (memcmp(buf, scsirom_descr[which].id, 6) == 0)
r = which;
bus_space_unmap (ia->ia_bst, ioh, ia->ia_size);
return r;
}
static int
scsirom_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct intio_attach_args *ia = aux;
int r;
if (strcmp (ia->ia_name, "scsirom") != 0)
return 0;
if (ia->ia_addr == INTIOCF_ADDR_DEFAULT) {
ia->ia_addr = scsirom_descr[0].addr;
r = scsirom_find (parent, ia);
if (r == INTERNAL)
return 1;
ia->ia_addr = scsirom_descr[1].addr;
r = scsirom_find (parent, ia);
if (r == EXTERNAL)
return 1;
return 0;
} else if (scsirom_find(parent, ia) >= 0)
return 1;
else
return 0;
}
static void
scsirom_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct scsirom_softc *sc = (struct scsirom_softc *)self;
struct intio_attach_args *ia = aux;
int r;
struct cfdata *cf;
sc->sc_addr = ia->ia_addr;
sc->sc_which = scsirom_find (parent, ia);
#ifdef DIAGNOSTIC
if (sc->sc_which < 0)
panic ("SCSIROM curruption??");
#endif
r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
#ifdef DIAGNOSTIC
if (r)
panic ("IO map for SCSIROM corruption??");
#endif
ia->ia_addr = scsirom_descr[sc->sc_which].devaddr;
if (ia->ia_intr == INTIOCF_INTR_DEFAULT)
ia->ia_intr = scsirom_descr[sc->sc_which].intr;
if (sc->sc_which == INTERNAL)
printf (": On-board at %p\n", ia->ia_addr);
else
printf (": External at %p\n", ia->ia_addr);
cf = config_search (NULL, self, ia);
if (cf) {
config_attach(self, cf, ia, NULL);
} else {
printf ("%s: no matching device; ignored.\n",
self->dv_xname);
}
return;
}

49
sys/arch/x68k/dev/scsiromvar.h Normal file
View File

@ -0,0 +1,49 @@
/* $NetBSD: scsiromvar.h,v 1.2 1999/03/16 16:30:20 minoura Exp $ */
/*
*
* Copyright (c) 1998 NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles D. Cranor and
* Washington University.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* SCSI BIOS ROM.
* Used to probe the board.
*/
struct scsirom_softc {
struct device sc_dev;
enum {
INTERNAL = 0, /* onboard */
EXTERNAL = 1, /* optional */
} sc_which;
paddr_t sc_addr;
};
int scsirom_find_rom __P((int));

2289
sys/arch/x68k/dev/spc.c
View File

File diff suppressed because it is too large Load Diff

224
sys/arch/x68k/dev/xel.c Normal file
View File

@ -0,0 +1,224 @@
/* $NetBSD: xel.c,v 1.2 1999/03/16 16:30:20 minoura Exp $ */
/*
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Minoura Makoto.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* TSR Xellent30 driver.
* Detect Xellent30, and reserve its I/O area.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <machine/cpu.h>
#include <machine/bus.h>
#include <arch/x68k/dev/intiovar.h>
static paddr_t xel_addr __P((struct device *, struct cfdata *,
struct intio_attach_args *));
static int xel_probe __P((paddr_t));
static int xel_match __P((struct device *, struct cfdata *, void *));
static void xel_attach __P((struct device *, struct device *, void *));
struct xel_softc {
struct device dev;
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bh;
};
struct cfattach xel_ca = {
sizeof (struct xel_softc), xel_match, xel_attach
};
static paddr_t xel_addrs[] = { 0xec0000, 0xec4000, 0xec8000, 0xecc000 };
#define XEL_MODE_RAM_LOWER 0x00
#define XEL_MODE_RAM_HIGHER 0x01
#define XEL_MODE_UNMAP_RAM 0x00
#define XEL_MODE_MAP_RAM 0x02
#define XEL_MODE_MPU_000 0x00
#define XEL_MODE_MPU_030 0x04
#define XEL_RAM_ADDR_LOWER 0xbc0000
#define XEL_RAM_ADDR_HIGHER 0xfc0000
static paddr_t
xel_addr (parent, match, ia)
struct device *parent;
struct cfdata *match;
struct intio_attach_args *ia;
{
paddr_t addr = 0;
if (match->cf_addr == INTIOCF_ADDR_DEFAULT) {
int i;
for (i=0; i<sizeof(xel_addrs)/sizeof(xel_addrs[0]); i++) {
if (xel_probe(xel_addrs[i])) {
addr = xel_addrs[i];
break;
}
}
} else {
if (xel_probe((paddr_t) match->cf_addr))
addr = (paddr_t) match->cf_addr;
}
if (addr) {
/* found! */
ia->ia_addr = (int) addr;
ia->ia_size = 0x4000;
if (intio_map_allocate_region (parent, ia, INTIO_MAP_TESTONLY)
< 0)
return 0;
else
return addr;
}
return 0;
}
extern int *nofault;
static int
xel_probe(addr)
paddr_t addr;
{
u_int32_t b1, b2;
u_int16_t *start = (void*) INTIO_ADDR(addr);
label_t faultbuf;
volatile u_int32_t *sram = (void*) INTIO_ADDR(XEL_RAM_ADDR_HIGHER);
if (badaddr(start))
return 0;
nofault = (int *) &faultbuf;
if (setjmp(&faultbuf)) {
nofault = (int *) 0;
return 0;
}
b1 = sram[0];
b2 = sram[1];
/* Try to map the Xellent local memory. */
start[0] = XEL_MODE_RAM_HIGHER | XEL_MODE_MAP_RAM | XEL_MODE_MPU_030;
#if 0
/* the contents should be deferent. */
if (b1 == sram[0] && b2 == sram[1]) {
nofault = (int *) 0;
return 0;
}
#else
/* Try to write to the local memory. */
sram[0] = 0x55555555;
sram[1] = 0xaaaaaaaa;
if (sram[0] != 0x55555555 || sram[1] != 0xaaaaaaaa) {
sram[0] = b1;
sram[1] = b2;
nofault = (int *) 0;
return 0;
}
sram[0] = 0xaaaaaaaa;
sram[1] = 0x55555555;
if (sram[0] != 0xaaaaaaaa || sram[1] != 0x55555555) {
sram[0] = b1;
sram[1] = b2;
nofault = (int *) 0;
return 0;
}
sram[0] = b1;
sram[1] = b2;
#endif
/* Unmap. */
start[0] = XEL_MODE_UNMAP_RAM | XEL_MODE_MPU_030;
nofault = (int *) 0;
return 1;
}
static int
xel_match (parent, match, aux)
struct device *parent;
struct cfdata *match;
void *aux;
{
struct intio_attach_args *ia = aux;
if (strcmp (ia->ia_name, "xel") != 0)
return 0;
if (xel_addr(parent, match, ia)) {
#ifdef DIAGNOSTIC
if (cputype != CPU_68030)
panic ("Non-030 Xellent???");
#endif
return 1;
}
return 0;
}
static void
xel_attach (parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct xel_softc *sc = (void*)self;
struct intio_attach_args *ia = aux;
struct cfdata *cf = self->dv_cfdata;
paddr_t addr;
int r;
addr = xel_addr(parent, cf, aux);
sc->sc_bst = ia->ia_bst;
ia->ia_addr = (int) addr;
ia->ia_size = 0x4000;
r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
#ifdef DIAGNOSTIC
if (r)
panic ("IO map for Xellent30 corruption??");
#endif
printf (": Xellent30 MPU Accelerator.\n");
return;
}

314
sys/arch/x68k/dev/zs.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: zs.c,v 1.14 1999/02/11 15:28:06 mycroft Exp $ */
/* $NetBSD: zs.c,v 1.15 1999/03/16 16:30:20 minoura Exp $ */
/*-
* Copyright (c) 1998 Minoura Makoto
@ -42,8 +42,8 @@
*
* X68k uses one Z8530 built-in. Channel A is for RS-232C serial port;
* while channel B is dedicated to the mouse.
* Extra Z8530's can be installed. This driver supports up to 5 chips
* including the built-in one.
* Extra Z8530's can be installed for serial ports. This driver
* supports up to 5 chips including the built-in one.
*/
#include <sys/param.h>
@ -59,15 +59,19 @@
#include <sys/syslog.h>
#include <machine/cpu.h>
#include <machine/bus.h>
#include <arch/x68k/dev/intiovar.h>
#include <machine/z8530var.h>
/*#include <arch/x68k/x68k/iodevice.h>*/
#include <dev/ic/z8530reg.h>
#include "zsc.h" /* NZSC */
#include "opt_zsc.h"
#ifndef ZSCN_SPEED
#define ZSCN_SPEED 9600
#endif
#include "zstty.h"
/* Make life easier for the initialized arrays here. */
extern void Debugger __P((void));
@ -77,13 +81,24 @@ extern void Debugger __P((void));
* or you can not see messages done with printf during boot-up...
*/
int zs_def_cflag = (CREAD | CS8 | HUPCL);
int zscn_def_cflag = (CREAD | CS8 | HUPCL);
int zs_major = 12;
/*
* X68k provides a 5.0 MHz clock to the ZS chips.
* XXX: use 4.9152MHz constant for now!!!
*/
#define PCLK (9600 * 512) /* PCLK pin input clock rate */
#define PCLK (5 * 1000 * 1000) /* PCLK pin input clock rate */
/* Default physical addresses. */
#define ZS_MAXDEV 5
static bus_addr_t zs_physaddr[ZS_MAXDEV] = {
0x00e98000,
0x00eafc00,
0x00eafc10,
0x00eafc20,
0x00eafc30
};
static u_char zs_init_reg[16] = {
0, /* 0: CMD (reset, etc.) */
@ -122,43 +137,42 @@ struct cfattach zsc_ca = {
extern struct cfdriver zsc_cd;
static volatile struct zsdevice *findzs(int);
int zshard __P((void));
static int zshard __P((void *));
int zssoft __P((void *));
static int zs_get_speed __P((struct zs_chanstate *));
/*
* find zs address for x68k architecture
*/
static volatile struct zsdevice *
findzs(zs)
int zs;
{
if (zs == 0)
return &IODEVbase->io_inscc;
if (1 <= zs && zs <= 4)
return &(IODEVbase->io_exscc)[zs - 1];
/* none */
return 0;
}
/*
* Is the zs chip present?
*/
static int
zs_match(parent, cfp, aux)
zs_match(parent, cf, aux)
struct device *parent;
struct cfdata *cfp;
struct cfdata *cf;
void *aux;
{
volatile void *addr;
struct intio_attach_args *ia = aux;
int unit = cf->cf_unit;
struct zsdevice *zsaddr = (void*) ia->ia_addr;
int i;
if(strcmp("zs", aux) || (addr = findzs(cfp->cf_unit)) == 0)
return(0);
if (badaddr(addr))
if (strcmp (ia->ia_name, "zsc") != 0)
return 0;
return(1);
for (i = 0; i < ZS_MAXDEV; i++)
if (zsaddr == (void*) zs_physaddr[i]) /* XXX */
break;
ia->ia_size = 8;
if (intio_map_allocate_region (parent, ia, INTIO_MAP_TESTONLY))
return 0;
if (zsaddr != (void*) zs_physaddr[i])
return 0;
if (badaddr(INTIO_ADDR(zsaddr)))
return 0;
return (1);
}
/*
@ -171,13 +185,21 @@ zs_attach(parent, self, aux)
void *aux;
{
struct zsc_softc *zsc = (void *) self;
struct intio_attach_args *ia = aux;
struct zsc_attach_args zsc_args;
volatile struct zschan *zc;
struct zs_chanstate *cs;
int s, zs_unit, channel;
int r, s, zs_unit, channel;
zs_unit = zsc->zsc_dev.dv_unit;
zsc->zsc_addr = (void*) findzs (zs_unit);
zsc->zsc_addr = (void*) ia->ia_addr;
ia->ia_size = 8;
r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
#ifdef DIAGNOSTIC
if (r)
panic ("zs: intio IO map corruption");
#endif
printf("\n");
@ -198,18 +220,24 @@ zs_attach(parent, self, aux)
cs->cs_brg_clk = PCLK / 16;
if (channel == 0)
zc = (void*) &zsc->zsc_addr->zs_chan_a;
zc = (void*) INTIO_ADDR(&zsc->zsc_addr->zs_chan_a);
else
zc = (void*) &zsc->zsc_addr->zs_chan_b;
zc = (void*) INTIO_ADDR(&zsc->zsc_addr->zs_chan_b);
cs->cs_reg_csr = &zc->zc_csr;
cs->cs_reg_data = &zc->zc_data;
zs_init_reg[2] = 0x70 + zs_unit;
zs_init_reg[2] = ia->ia_intr;
bcopy(zs_init_reg, cs->cs_creg, 16);
bcopy(zs_init_reg, cs->cs_preg, 16);
cs->cs_defspeed = 9600;
cs->cs_defcflag = zs_def_cflag;
if (zc == conschan) {
zsc_args.hwflags |= ZS_HWFLAG_CONSOLE;
cs->cs_defspeed = zs_get_speed(cs);
cs->cs_defcflag = zscn_def_cflag;
} else {
cs->cs_defspeed = 9600;
cs->cs_defcflag = zs_def_cflag;
}
/* Make these correspond to cs_defcflag (-crtscts) */
cs->cs_rr0_dcd = ZSRR0_DCD;
@ -233,6 +261,12 @@ zs_attach(parent, self, aux)
* The child attach will setup the hardware.
*/
child = config_found(self, (void *)&zsc_args, zs_print);
#if ZSTTY > 0
if (zc == conschan &&
((child && strcmp (child->dv_xname, "zstty0")) ||
child == NULL)) /* XXX */
panic ("zs_attach: console device mismatch");
#endif
if (child == NULL) {
/* No sub-driver. Just reset it. */
u_char reset = (channel == 0) ?
@ -243,6 +277,13 @@ zs_attach(parent, self, aux)
}
}
/*
* Now safe to install interrupt handlers.
*/
if (intio_intr_establish(ia->ia_intr, "zs", zshard, zsc))
panic("zs_attach: interrupt vector busy");
/* XXX; evcnt_attach() ? */
/*
* Set the master interrupt enable and interrupt vector.
* (common to both channels, do it on A)
@ -250,7 +291,7 @@ zs_attach(parent, self, aux)
cs = zsc->zsc_cs[0];
s = splzs();
/* interrupt vector */
zs_write_reg(cs, 2, 0x70 + zs_unit);
zs_write_reg(cs, 2, ia->ia_intr);
/* master interrupt control (enable) */
zs_write_reg(cs, 9, zs_init_reg[9]);
splx(s);
@ -272,38 +313,37 @@ zs_print(aux, name)
return UNCONF;
}
static volatile int zssoftpending;
/*
* Our ZS chips all share a common, autovectored interrupt,
* so we have to look at all of them on each interrupt.
* For x68k-port, we don't use autovectored interrupt.
* We do not need to look at all of the zs chips.
*/
int
zshard(void)
static int
zshard(arg)
void *arg;
{
register struct zsc_softc *zsc;
register int unit, rval, softreq;
register struct zsc_softc *zsc = arg;
register int rval;
int s;
rval = softreq = 0;
for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
zsc = zsc_cd.cd_devs[unit];
if (zsc == NULL)
continue;
rval |= zsc_intr_hard(zsc);
softreq |= zsc->zsc_cs[0]->cs_softreq;
softreq |= zsc->zsc_cs[1]->cs_softreq;
}
/*
* Actually, zs hardware ipl is 5.
* Here we disable all interrupts to shorten the zshard
* handling time. Otherwise, too many characters are
* dropped.
*/
s = splhigh();
rval = zsc_intr_hard(zsc);
/* We are at splzs here, so no need to lock. */
if (softreq && (zssoftpending == 0)) {
zssoftpending = 1;
if (zsc->zsc_cs[0]->cs_softreq || zsc->zsc_cs[1]->cs_softreq)
setsoftserial();
}
return (rval);
}
/*
* Similar scheme as for zshard (look at all of them)
* Shared among the all chips. We have to look at all of them.
*/
int
zssoft(arg)
@ -312,12 +352,6 @@ zssoft(arg)
register struct zsc_softc *zsc;
register int s, unit;
/* This is not the only ISR on this IPL. */
if (zssoftpending == 0)
return (0);
zssoftpending = 0;
/* Make sure we call the tty layer at spltty. */
s = spltty();
for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
@ -327,6 +361,7 @@ zssoft(arg)
(void) zsc_intr_soft(zsc);
}
splx(s);
return (1);
}
@ -370,9 +405,18 @@ zs_set_speed(cs, bps)
/* Convert back to make sure we can do it. */
real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
#if 0 /* XXX */
/* XXX - Allow some tolerance here? */
if (real_bps != bps)
return (EINVAL);
#else
/*
* Since our PCLK has somewhat strange value,
* we have to allow tolerance here.
*/
if (BPS_TO_TCONST(cs->cs_brg_clk, real_bps) != tconst)
return (EINVAL);
#endif
cs->cs_preg[12] = tconst;
cs->cs_preg[13] = tconst >> 8;
@ -485,6 +529,16 @@ void zs_write_data(cs, val)
ZS_DELAY();
}
static struct zs_chanstate zscn_cs;
/****************************************************************
* Console support functions (x68k specific!)
* Note: this code is allowed to know about the layout of
* the chip registers, and uses that to keep things simple.
* XXX - I think I like the mvme167 code better. -gwr
****************************************************************/
/*
* Handle user request to enter kernel debugger.
*/
@ -507,3 +561,133 @@ zs_abort(cs)
printf ("BREAK!!\n");
#endif
}
#if NZSTTY > 0
#include <dev/cons.h>
cons_decl(zs);
static int zs_getc __P((void));
static void zs_putc __P((int));
/*
* Polled input char.
*/
static int
zs_getc(void)
{
register int s, c, rr0;
s = splzs();
/* Wait for a character to arrive. */
do {
rr0 = zs_read_csr(&zscn_cs);
} while ((rr0 & ZSRR0_RX_READY) == 0);
c = zs_read_data (&zscn_cs);
splx(s);
/*
* This is used by the kd driver to read scan codes,
* so don't translate '\r' ==> '\n' here...
*/
return (c);
}
/*
* Polled output char.
*/
static void
zs_putc(c)
int c;
{
register int s, rr0;
s = splzs();
/* Wait for transmitter to become ready. */
do {
rr0 = zs_read_csr (&zscn_cs);
} while ((rr0 & ZSRR0_TX_READY) == 0);
zs_write_data(&zscn_cs, c);
splx(s);
}
void
zscninit(cn)
struct consdev *cn;
{
volatile struct zschan *cnchan = (void*) INTIO_ADDR(ZSCN_PHYSADDR);
int s;
bzero (&zscn_cs, sizeof (struct zs_chanstate));
zscn_cs.cs_reg_csr = &cnchan->zc_csr;
zscn_cs.cs_reg_data = &cnchan->zc_data;
zscn_cs.cs_channel = 0;
zscn_cs.cs_brg_clk = PCLK / 16;
bcopy (zs_init_reg, zscn_cs.cs_preg, 16);
zscn_cs.cs_preg[4] = ZSWR4_CLK_X16 | ZSWR4_ONESB; /* XXX */
zscn_cs.cs_preg[9] = 0;
zs_set_speed(&zscn_cs, ZSCN_SPEED);
s = splzs();
zs_loadchannelregs(&zscn_cs);
splx(s);
conschan = cnchan;
}
/*
* Polled console input putchar.
*/
int
zscngetc(dev)
dev_t dev;
{
return (zs_getc());
}
/*
* Polled console output putchar.
*/
void
zscnputc(dev, c)
dev_t dev;
int c;
{
zs_putc(c);
}
extern int zsopen(dev_t, int, int, struct proc *);
void
zscnprobe(cd)
struct consdev *cd;
{
int maj;
/* locate the major number */
for (maj = 0; maj < nchrdev; maj++)
if (cdevsw[maj].d_open == zsopen)
break;
/* XXX: minor number is 0 */
if (cdevsw[maj].d_open != zsopen)
cd->cn_pri = CN_DEAD;
else {
#ifdef ZSCONSOLE
cd->cn_pri = CN_REMOTE; /* higher than ITE (CN_INTERNAL) */
#else
cd->cn_pri = CN_NORMAL;
#endif
cd->cn_dev = makedev(maj, 0);
}
}
void
zscnpollc(dev, on)
dev_t dev;
int on;
{
}
#endif

10
sys/arch/x68k/include/Makefile
View File

@ -1,12 +1,12 @@
# $NetBSD: Makefile,v 1.8 1999/03/15 11:55:55 minoura Exp $
# $NetBSD: Makefile,v 1.9 1999/03/16 16:30:21 minoura Exp $
KDIR= /sys/arch/x68k/include
INCSDIR= /usr/include/x68k
INCS= ansi.h aout_machdep.h asm.h bootinfo.h bswap.h bsd_audioio.h cdefs.h \
cpu.h cpufunc.h db_machdep.h disklabel.h elf_machdep.h endian.h \
float.h frame.h grfioctl.h ieee.h ieeefp.h intr.h iteioctl.h kbd.h \
kbio.h kcore.h limits.h opmbellio.h param.h parioctl.h pcb.h \
INCS= ansi.h aout_machdep.h asm.h bootinfo.h bswap.h bsd_audioio.h bus.h \
cdefs.h cpu.h cpufunc.h db_machdep.h disklabel.h elf_machdep.h \
endian.h float.h frame.h grfioctl.h ieee.h ieeefp.h intr.h iteioctl.h \
kbd.h kbio.h kcore.h limits.h opmbellio.h param.h parioctl.h pcb.h \
pci_machdep.h pmap.h powioctl.h proc.h profile.h psl.h pte.h ptrace.h \
reg.h remote-sl.h setjmp.h signal.h sram.h stdarg.h trap.h types.h \
varargs.h vmparam.h vuid_event.h

2
sys/arch/x68k/include/bswap.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: bswap.h,v 1.1 1999/01/15 13:31:28 bouyer Exp $ */
/* $NetBSD: bswap.h,v 1.2 1999/03/16 16:30:21 minoura Exp $ */
#ifndef _MACHINE_BSWAP_H_
#define _MACHINE_BSWAP_H_

814
sys/arch/x68k/include/bus.h Normal file
View File

@ -0,0 +1,814 @@
/* $NetBSD: bus.h,v 1.2 1999/03/16 16:30:21 minoura Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* bus_space(9) and bus_dma(9) interface for NetBSD/x68k.
*/
#ifndef _X68K_BUS_H_
#define _X68K_BUS_H_
/*
* Bus address and size types
*/
typedef u_long bus_addr_t;
typedef u_long bus_size_t;
typedef u_long bus_space_handle_t;
/*
* Bus space descripter
*/
typedef struct x68k_bus_space *bus_space_tag_t;
struct x68k_bus_space {
#if 0
enum {
X68K_INTIO_BUS,
X68K_PCI_BUS,
X68K_NEPTUNE_BUS
} x68k_bus_type;
#endif
int (*x68k_bus_space_map) __P((
bus_space_tag_t,
bus_addr_t,
bus_size_t,
int, /* flags */
bus_space_handle_t *));
void (*x68k_bus_space_unmap) __P((
bus_space_tag_t,
bus_space_handle_t,
bus_size_t));
int (*x68k_bus_space_subregion) __P((
bus_space_tag_t,
bus_space_handle_t,
bus_size_t, /* offset */
bus_size_t, /* size */
bus_space_handle_t *));
int (*x68k_bus_space_alloc) __P((
bus_space_tag_t,
bus_addr_t, /* reg_start */
bus_addr_t, /* reg_end */
bus_size_t,
bus_size_t, /* alignment */
bus_size_t, /* boundary */
int, /* flags */
bus_addr_t *,
bus_space_handle_t *));
void (*x68k_bus_space_free) __P((
bus_space_tag_t,
bus_space_handle_t,
bus_size_t));
#if 0
void (*x68k_bus_space_barrier) __P((
bus_space_tag_t,
bus_space_handle_t,
bus_size_t, /* offset */
bus_size_t, /* length */
int)); /* flags */
#endif
struct device *x68k_bus_device;
};
int x68k_bus_space_alloc __P((bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *));
void x68k_bus_space_free __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
/*
* bus_space(9) interface
*/
#define bus_space_map(t,a,s,f,h) \
((*((t)->x68k_bus_space_map)) ((t),(a),(s),(f),(h)))
#define bus_space_unmap(t,h,s) \
((*((t)->x68k_bus_space_unmap)) ((t),(h),(s)))
#define bus_space_subregion(t,h,o,s,p) \
((*((t)->x68k_bus_space_subregion)) ((t),(h),(o),(s),(p)))
#define BUS_SPACE_MAP_CACHEABLE 0x0001
#define BUS_SPACE_MAP_LINEAR 0x0002
/*
* For simpler hadware, many x68k devices are mapped with shifted address
* i.e. only on even or odd addresses.
*/
#define BUS_SPACE_MAP_SHIFTED 0x1001
#define bus_space_alloc(t,rs,re,s,a,b,f,r,h) \
((*((t)->x68k_bus_space_alloc)) ((t),(rs),(re),(s),(a),(b),(f),(r),(h)))
#define bus_space_free(t,h,s) \
((*((t)->x68k_bus_space_free)) ((t),(h),(s)))
/*
* Note: the 680x0 does not currently require barriers, but we must
* provide the flags to MI code.
*/
#define bus_space_barrier(t, h, o, l, f) \
((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
#define bus_space_read_1(t,h,o) _bus_space_read_1(t,h,o)
#define bus_space_read_2(t,h,o) _bus_space_read_2(t,h,o)
#define bus_space_read_4(t,h,o) _bus_space_read_4(t,h,o)
#define bus_space_read_multi_1(t,h,o,p,c) _bus_space_read_multi_1(t,h,o,p,c)
#define bus_space_read_multi_2(t,h,o,p,c) _bus_space_read_multi_2(t,h,o,p,c)
#define bus_space_read_multi_4(t,h,o,p,c) _bus_space_read_multi_4(t,h,o,p,c)
#define bus_space_read_region_1(t,h,o,p,c) _bus_space_read_region_1(t,h,o,p,c)
#define bus_space_read_region_2(t,h,o,p,c) _bus_space_read_region_2(t,h,o,p,c)
#define bus_space_read_region_4(t,h,o,p,c) _bus_space_read_region_4(t,h,o,p,c)
#define bus_space_write_1(t,h,o,v) _bus_space_write_1(t,h,o,v)
#define bus_space_write_2(t,h,o,v) _bus_space_write_2(t,h,o,v)
#define bus_space_write_4(t,h,o,v) _bus_space_write_4(t,h,o,v)
#define bus_space_write_multi_1(t,h,o,p,c) _bus_space_write_multi_1(t,h,o,p,c)
#define bus_space_write_multi_2(t,h,o,p,c) _bus_space_write_multi_2(t,h,o,p,c)
#define bus_space_write_multi_4(t,h,o,p,c) _bus_space_write_multi_4(t,h,o,p,c)
#define bus_space_write_region_1(t,h,o,p,c) \
_bus_space_write_region_1(t,h,o,p,c)
#define bus_space_write_region_2(t,h,o,p,c) \
_bus_space_write_region_2(t,h,o,p,c)
#define bus_space_write_region_4(t,h,o,p,c) \
_bus_space_write_region_4(t,h,o,p,c)
#define bus_space_set_region_1(t,h,o,v,c) _bus_space_set_region_1(t,h,o,v,c)
#define bus_space_set_region_2(t,h,o,v,c) _bus_space_set_region_2(t,h,o,v,c)
#define bus_space_set_region_4(t,h,o,v,c) _bus_space_set_region_4(t,h,o,v,c)
#define bus_space_copy_region_1(t,sh,so,dh,do,c) \
_bus_space_copy_region_1(t,sh,so,dh,do,c)
#define bus_space_copy_region_2(t,sh,so,dh,do,c) \
_bus_space_copy_region_2(t,sh,so,dh,do,c)
#define bus_space_copy_region_4(t,sh,so,dh,do,c) \
_bus_space_copy_region_4(t,sh,so,dh,do,c)
static inline u_int8_t _bus_space_read_1
__P((bus_space_tag_t, bus_space_handle_t bsh, bus_size_t offset));
static inline u_int16_t _bus_space_read_2
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
static inline u_int32_t _bus_space_read_4
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
static inline void _bus_space_read_multi_1
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int8_t *, bus_size_t));
static inline void _bus_space_read_multi_2
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int16_t *, bus_size_t));
static inline void _bus_space_read_multi_4
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int32_t *, bus_size_t));
static inline void _bus_space_read_region_1
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int8_t *, bus_size_t));
static inline void _bus_space_read_region_2
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int16_t *, bus_size_t));
static inline void _bus_space_read_region_4
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int32_t *, bus_size_t));
static inline void _bus_space_write_1
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int8_t));
static inline void _bus_space_write_2
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int16_t));
static inline void _bus_space_write_4
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int32_t));
static inline void _bus_space_write_multi_1
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int8_t *, bus_size_t));
static inline void _bus_space_write_multi_2
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int16_t *, bus_size_t));
static inline void _bus_space_write_multi_4
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int32_t *, bus_size_t));
static inline void _bus_space_write_region_1
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int8_t *, bus_size_t));
static inline void _bus_space_write_region_2
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int16_t *, bus_size_t));
static inline void _bus_space_write_region_4
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int32_t *, bus_size_t));
static inline void _bus_space_set_region_1
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int8_t, bus_size_t));
static inline void _bus_space_set_region_2
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int16_t, bus_size_t));
static inline void _bus_space_set_region_4
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
u_int32_t, bus_size_t));
static inline void _bus_space_copy_region_1
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t));
static inline void _bus_space_copy_region_2
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t));
static inline void _bus_space_copy_region_4
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t));
static inline u_int8_t
_bus_space_read_1(t, bsh, offset)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
{
return (*((volatile u_int8_t *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset)));
}
static inline u_int16_t
_bus_space_read_2(t, bsh, offset)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
{
return (*((volatile u_int16_t *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset)));
}
static inline u_int32_t
_bus_space_read_4(t, bsh, offset)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
{
return (*((volatile u_int32_t *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset)));
}
static inline void
_bus_space_read_multi_1(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int8_t *datap;
bus_size_t count;
{
while (count-- > 0) {
*datap++ = *(volatile u_int8_t *) ((bsh&0x80000000)
? ((bsh&0x7fffffff)
+ offset*2)
: bsh + offset);
}
}
static inline void
_bus_space_read_multi_2(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int16_t *datap;
bus_size_t count;
{
while (count-- > 0) {
*datap++ = *(volatile u_int16_t *) ((bsh&0x80000000)
? ((bsh&0x7fffffff)
+ offset*2)
: bsh + offset);
}
}
static inline void
_bus_space_read_multi_4(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int32_t *datap;
bus_size_t count;
{
while (count-- > 0) {
*datap++ = *(volatile u_int32_t *) ((bsh&0x80000000)
? ((bsh&0x7fffffff)
+ offset*2)
: bsh + offset);
}
}
static inline void
_bus_space_read_region_1(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int8_t *datap;
bus_size_t count;
{
volatile u_int8_t *addr = (void *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset);
while (count-- > 0) {
*datap++ = *addr++;
}
}
static inline void
_bus_space_read_region_2(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int16_t *datap;
bus_size_t count;
{
volatile u_int16_t *addr = (void *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset);
while (count-- > 0) {
*datap++ = *addr++;
}
}
static inline void
_bus_space_read_region_4(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int32_t *datap;
bus_size_t count;
{
volatile u_int32_t *addr = (void *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset);
while (count-- > 0) {
*datap++ = *addr++;
}
}
static inline void
_bus_space_write_1(t, bsh, offset, value)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int8_t value;
{
*(volatile u_int8_t *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset) = value;
}
static inline void
_bus_space_write_2(t, bsh, offset, value)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int16_t value;
{
*(volatile u_int16_t *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset) = value;
}
static inline void
_bus_space_write_4(t, bsh, offset, value)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int32_t value;
{
*(volatile u_int32_t *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset) = value;
}
static inline void
_bus_space_write_multi_1(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int8_t *datap;
bus_size_t count;
{
while (count-- > 0) {
*(volatile u_int8_t *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset) = *datap++;
}
}
static inline void
_bus_space_write_multi_2(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int16_t *datap;
bus_size_t count;
{
while (count-- > 0) {
*(volatile u_int16_t *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset) = *datap++;
}
}
static inline void
_bus_space_write_multi_4(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int32_t *datap;
bus_size_t count;
{
while (count-- > 0) {
*(volatile u_int32_t *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset) = *datap++;
}
}
static inline void
_bus_space_write_region_1(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int8_t *datap;
bus_size_t count;
{
volatile u_int8_t *addr = (void *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset);
while (count-- > 0) {
*addr++ = *datap++;
}
}
static inline void
_bus_space_write_region_2(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int16_t *datap;
bus_size_t count;
{
volatile u_int16_t *addr = (void *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset);
while (count-- > 0) {
*addr++ = *datap++;
}
}
static inline void
_bus_space_write_region_4(t, bsh, offset, datap, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int32_t *datap;
bus_size_t count;
{
volatile u_int32_t *addr = (void *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset);
while (count-- > 0) {
*addr++ = *datap++;
}
}
static inline void
_bus_space_set_region_1(t, bsh, offset, value, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int8_t value;
bus_size_t count;
{
volatile u_int8_t *addr = (void *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset);
while (count-- > 0) {
*addr++ = value;
}
}
static inline void
_bus_space_set_region_2(t, bsh, offset, value, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int16_t value;
bus_size_t count;
{
volatile u_int16_t *addr = (void *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset);
while (count-- > 0) {
*addr++ = value;
}
}
static inline void
_bus_space_set_region_4(t, bsh, offset, value, count)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset;
u_int32_t value;
bus_size_t count;
{
volatile u_int32_t *addr = (void *) ((bsh&0x80000000)
? (bsh&0x7fffffff) + offset*2
: bsh + offset);
while (count-- > 0) {
*addr++ = value;
}
}
static inline void
_bus_space_copy_region_1(t, sbsh, soffset, dbsh, doffset, count)
bus_space_tag_t t;
bus_space_handle_t sbsh;
bus_size_t soffset;
bus_space_handle_t dbsh;
bus_size_t doffset;
bus_size_t count;
{
volatile u_int8_t *saddr = (void *) (sbsh + soffset);
volatile u_int8_t *daddr = (void *) (dbsh + doffset);
if ((u_int32_t) saddr >= (u_int32_t) daddr)
while (count-- > 0)
*daddr++ = *saddr++;
else {
saddr += count;
daddr += count;
while (count-- > 0)
*--daddr = *--saddr;
}
}
static inline void
_bus_space_copy_region_2(t, sbsh, soffset, dbsh, doffset, count)
bus_space_tag_t t;
bus_space_handle_t sbsh;
bus_size_t soffset;
bus_space_handle_t dbsh;
bus_size_t doffset;
bus_size_t count;
{
volatile u_int16_t *saddr = (void *) (sbsh + soffset);
volatile u_int16_t *daddr = (void *) (dbsh + doffset);
if ((u_int32_t) saddr >= (u_int32_t) daddr)
while (count-- > 0)
*daddr++ = *saddr++;
else {
saddr += count;
daddr += count;
while (count-- > 0)
*--daddr = *--saddr;
}
}
static inline void
_bus_space_copy_region_4(t, sbsh, soffset, dbsh, doffset, count)
bus_space_tag_t t;
bus_space_handle_t sbsh;
bus_size_t soffset;
bus_space_handle_t dbsh;
bus_size_t doffset;
bus_size_t count;
{
volatile u_int32_t *saddr = (void *) (sbsh + soffset);
volatile u_int32_t *daddr = (void *) (dbsh + doffset);
if ((u_int32_t) saddr >= (u_int32_t) daddr)
while (count-- > 0)
*daddr++ = *saddr++;
else {
saddr += count;
daddr += count;
while (count-- > 0)
*--daddr = *--saddr;
}
}
/*
* DMA segment
*/
struct x68k_bus_dma_segment {
bus_addr_t ds_addr;
bus_size_t ds_len;
};
typedef struct x68k_bus_dma_segment bus_dma_segment_t;
/*
* DMA descriptor
*/
/* Forwards needed by prototypes below. */
struct mbuf;
struct uio;
typedef struct x68k_bus_dma *bus_dma_tag_t;
typedef struct x68k_bus_dmamap *bus_dmamap_t;
struct x68k_bus_dma {
/*
* The `bounce threshold' is checked while we are loading
* the DMA map. If the physical address of the segment
* exceeds the threshold, an error will be returned. The
* caller can then take whatever action is necessary to
* bounce the transfer. If this value is 0, it will be
* ignored.
*/
bus_addr_t _bounce_thresh;
/*
* DMA mapping methods.
*/
int (*x68k_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
bus_size_t, bus_size_t, int, bus_dmamap_t *));
void (*x68k_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
int (*x68k_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
bus_size_t, struct proc *, int));
int (*x68k_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
struct mbuf *, int));
int (*x68k_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
struct uio *, int));
int (*x68k_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
bus_dma_segment_t *, int, bus_size_t, int));
void (*x68k_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
void (*x68k_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
bus_addr_t, bus_size_t, int));
/*
* DMA memory utility functions.
*/
int (*x68k_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
bus_size_t, bus_dma_segment_t *, int, int *, int));
void (*x68k_dmamem_free) __P((bus_dma_tag_t,
bus_dma_segment_t *, int));
int (*x68k_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
int, size_t, caddr_t *, int));
void (*x68k_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
int (*x68k_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
int, int, int, int));
};
/*
* bus_dmamap_t
*
* Describes a DMA mapping.
*/
struct x68k_bus_dmamap {
/*
* PRIVATE MEMBERS: not for use my machine-independent code.
*/
bus_size_t x68k_dm_size; /* largest DMA transfer mappable */
int x68k_dm_segcnt; /* number of segs this map can map */
bus_size_t x68k_dm_maxsegsz; /* largest possible segment */
bus_size_t x68k_dm_boundary; /* don't cross this */
bus_addr_t x68k_dm_bounce_thresh; /* bounce threshold */
int x68k_dm_flags; /* misc. flags */
void *x68k_dm_cookie; /* cookie for bus-specific functions */
/*
* PUBLIC MEMBERS: these are used by machine-independent code.
*/
bus_size_t dm_mapsize; /* size of the mapping */
int dm_nsegs; /* # valid segments in mapping */
bus_dma_segment_t dm_segs[1]; /* segments; variable length */
};
int x68k_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
bus_size_t, int, bus_dmamap_t *));
void x68k_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
int x68k_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
bus_size_t, struct proc *, int));
int x68k_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
struct mbuf *, int));
int x68k_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
struct uio *, int));
int x68k_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
bus_dma_segment_t *, int, bus_size_t, int));
void x68k_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
void x68k_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
bus_size_t, int));
int x68k_bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
bus_size_t alignment, bus_size_t boundary,
bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
void x68k_bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs));
int x68k_bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs, size_t size, caddr_t *kvap, int flags));
void x68k_bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
size_t size));
int x68k_bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs, int off, int prot, int flags));
int x68k_bus_dmamap_load_buffer __P((bus_dmamap_t, void *,
bus_size_t buflen, struct proc *, int, paddr_t *, int *, int));
int x68k_bus_dmamem_alloc_range __P((bus_dma_tag_t tag, bus_size_t size,
bus_size_t alignment, bus_size_t boundary,
bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
paddr_t low, paddr_t high));
#define bus_dmamap_create(t,s,n,m,b,f,p) \
((*((t)->x68k_dmamap_create)) ((t),(s),(n),(m),(b),(f),(p)))
#define bus_dmamap_destroy(t,p) \
((*((t)->x68k_dmamap_destroy)) ((t),(p)))
#define bus_dmamap_load(t,m,b,s,p,f) \
((*((t)->x68k_dmamap_load)) ((t),(m),(b),(s),(p),(f)))
#define bus_dmamap_load_mbuf(t,m,b,f) \
((*((t)->x68k_dmamap_load_mbuf)) ((t),(m),(b),(f)))
#define bus_dmamap_load_uio(t,m,u,f) \
((*((t)->x68k_dmamap_load_uio)) ((t),(m),(u),(f)))
#define bus_dmamap_load_raw(t,m,sg,n,s,f) \
((*((t)->x68k_dmamap_load_raw)) ((t),(m),(sg),(n),(s),(f)))
#define bus_dmamap_unload(t,p) \
((*((t)->x68k_dmamap_unload)) ((t),(p)))
#define bus_dmamap_sync(t,p,o,l,ops) \
((*((t)->x68k_dmamap_sync)) ((t),(p),(o),(l),(ops)))
#define bus_dmamem_alloc(t,s,a,b,sg,n,r,f) \
((*((t)->x68k_dmamem_alloc)) ((t),(s),(a),(b),(sg),(n),(r),(f)))
#define bus_dmamem_free(t,sg,n) \
((*((t)->x68k_dmamem_free)) ((t),(sg),(n)))
#define bus_dmamem_map(t,sg,n,s,k,f) \
((*((t)->x68k_dmamem_map)) ((t),(sg),(n),(s),(k),(f)))
#define bus_dmamem_unmap(t,k,s) \
((*((t)->x68k_dmamem_unmap)) ((t),(k),(s)))
#define bus_dmamem_mmap(t,sg,n,o,p,f) \
((*((t)->x68k_dmamem_mmap)) ((t),(sg),(n),(o),(p),(f)))
/*
* Flags used in various bus DMA methods.
*/
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
#define BUS_DMA_COHERENT 0x04 /* hint: map memory DMA coherent */
#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
#define BUS_DMA_BUS2 0x20
#define BUS_DMA_BUS3 0x40
#define BUS_DMA_BUS4 0x80
/*
* Operations performed by bus_dmamap_sync().
*/
#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
#endif /* _X68K_BUS_H_ */

2
sys/arch/x68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.15 1999/02/26 22:37:58 is Exp $ */
/* $NetBSD: cpu.h,v 1.16 1999/03/16 16:30:21 minoura Exp $ */
/*
* Copyright (c) 1988 University of Utah.

2
sys/arch/x68k/include/endian.h
View File

@ -1,3 +1,3 @@
/* $NetBSD: endian.h,v 1.2 1999/01/24 12:56:52 mycroft Exp $ */
/* $NetBSD: endian.h,v 1.3 1999/03/16 16:30:21 minoura Exp $ */
#include <m68k/endian.h>

2
sys/arch/x68k/include/intr.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.1 1998/12/13 15:04:01 minoura Exp $ */
/* $NetBSD: intr.h,v 1.2 1999/03/16 16:30:21 minoura Exp $ */
/*
*

2
sys/arch/x68k/include/pmap.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: pmap.h,v 1.12 1999/02/26 16:07:07 is Exp $ */
/* $NetBSD: pmap.h,v 1.13 1999/03/16 16:30:21 minoura Exp $ */
/*
* Copyright (c) 1987 Carnegie-Mellon University

2
sys/arch/x68k/include/stdarg.h
View File

@ -1,3 +1,3 @@
/* $NetBSD: stdarg.h,v 1.2 1999/01/22 14:12:07 mycroft Exp $ */
/* $NetBSD: stdarg.h,v 1.3 1999/03/16 16:30:21 minoura Exp $ */
#include <m68k/stdarg.h>

2
sys/arch/x68k/include/vmparam.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: vmparam.h,v 1.8 1999/01/18 07:39:52 itohy Exp $ */
/* $NetBSD: vmparam.h,v 1.9 1999/03/16 16:30:21 minoura Exp $ */
/*
* Copyright (c) 1988 University of Utah.

23
sys/arch/x68k/include/z8530var.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: z8530var.h,v 1.1 1998/08/07 11:19:13 minoura Exp $ */
/* $NetBSD: z8530var.h,v 1.2 1999/03/16 16:30:21 minoura Exp $ */
/*
* Copyright (c) 1998 Minoura Makoto
@ -46,12 +46,25 @@
* @(#)zsvar.h 8.1 (Berkeley) 6/11/93
*/
#include <arch/x68k/x68k/iodevice.h>
#include <machine/bus.h>
#include <dev/ic/z8530sc.h>
#define ZS_DELAY() delay(2)
/* The layout of this is hardware-dependent (padding, order). */
struct zschan {
u_char zc_xxx0;
volatile u_char zc_csr; /* ctrl,status, and indirect access */
u_char zc_xxx1;
volatile u_char zc_data; /* data */
};
struct zsdevice {
/* Yes, they are backwards. */
struct zschan zs_chan_b;
struct zschan zs_chan_a;
};
struct zsc_softc {
struct device zsc_dev; /* required first: base device */
struct zs_chanstate *zsc_cs[2]; /* channel A and B soft state */
@ -75,3 +88,9 @@ u_char zs_read_data __P((struct zs_chanstate *cs));
void zs_write_reg __P((struct zs_chanstate *cs, u_char reg, u_char val));
void zs_write_csr __P((struct zs_chanstate *cs, u_char val));
void zs_write_data __P((struct zs_chanstate *cs, u_char val));
/*
* Physical address for built-in ZS.
*/
#define ZSCN_PHYSADDR 0xe98004 /* for serial console */
#define ZSMS_PHYSADDR 0xe98000 /* for mouse */

2
sys/arch/x68k/stand/aout2hux/aout2hux.c
View File

@ -20,7 +20,7 @@
* % cc -N -static -Wl,-T,10203040 -o aout2 *.o
* % aout2hux -o foo.x aout1 0 aout2 10203040
*
* $NetBSD: aout2hux.c,v 1.2 1999/02/02 10:00:18 itohy Exp $
* $NetBSD: aout2hux.c,v 1.3 1999/03/16 16:30:21 minoura Exp $
*/
#include <sys/types.h>

2
sys/arch/x68k/stand/aout2hux/hux.h
View File

@ -4,7 +4,7 @@
* written by Yasha (ITOH Yasufumi)
* public domain
*
* $NetBSD: hux.h,v 1.2 1999/02/02 10:00:18 itohy Exp $
* $NetBSD: hux.h,v 1.3 1999/03/16 16:30:21 minoura Exp $
*/
/*
* Human68k ".x" executable format

2
sys/arch/x68k/stand/libdos/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.2 1999/02/13 02:54:49 lukem Exp $
# $NetBSD: Makefile,v 1.3 1999/03/16 16:30:21 minoura Exp $
LIB= dos

2
sys/arch/x68k/stand/libiocs/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.2 1999/02/13 02:54:50 lukem Exp $
# $NetBSD: Makefile,v 1.3 1999/03/16 16:30:21 minoura Exp $
LIB= iocs

2
sys/arch/x68k/stand/loadbsd/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.3 1999/02/13 02:54:50 lukem Exp $
# $NetBSD: Makefile,v 1.4 1999/03/16 16:30:21 minoura Exp $
BASE= loadbsd
PROG= ${BASE}.x # Human68k ".x" executable

2
sys/arch/x68k/stand/xxboot/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.2 1999/02/13 02:54:50 lukem Exp $
# $NetBSD: Makefile,v 1.3 1999/03/16 16:30:22 minoura Exp $
BOOT= xxboot
VERSION=0.3

2
sys/arch/x68k/stand/xxboot/gunzip/Makefile.test
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile.test,v 1.2 1999/02/13 02:54:50 lukem Exp $
# $NetBSD: Makefile.test,v 1.3 1999/03/16 16:30:22 minoura Exp $
#
# Makefile for test

2
sys/arch/x68k/usr.bin/bellctrl/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.6 1999/02/13 02:54:50 lukem Exp $
# $NetBSD: Makefile,v 1.7 1999/03/16 16:30:22 minoura Exp $
#
# Makefile for bellctrl

2
sys/arch/x68k/usr.bin/loadfont/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.3 1999/02/13 02:54:50 lukem Exp $
# $NetBSD: Makefile,v 1.4 1999/03/16 16:30:22 minoura Exp $
PROG=loadfont
MKMAN= no

2
sys/arch/x68k/usr.bin/loadkmap/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.4 1999/02/13 02:54:50 lukem Exp $
# $NetBSD: Makefile,v 1.5 1999/03/16 16:30:22 minoura Exp $
# Makefile for loadkmap
PROG= loadkmap

2
sys/arch/x68k/usr.bin/palette/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.3 1999/02/13 02:54:51 lukem Exp $
# $NetBSD: Makefile,v 1.4 1999/03/16 16:30:22 minoura Exp $
PROG=palette
MKMAN=no

2
sys/arch/x68k/usr.bin/rtcalarm/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.3 1999/02/13 02:54:51 lukem Exp $
# $NetBSD: Makefile,v 1.4 1999/03/16 16:30:22 minoura Exp $
PROG=rtcalarm
MKMAN=no

2
sys/arch/x68k/usr.bin/tvctrl/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.3 1999/02/13 02:54:51 lukem Exp $
# $NetBSD: Makefile,v 1.4 1999/03/16 16:30:22 minoura Exp $
PROG=tvctrl
MKMAN=no

2
sys/arch/x68k/usr.bin/tvctrl/tvctrl.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: tvctrl.c,v 1.4 1999/01/13 10:23:40 itohy Exp $ */
/* $NetBSD: tvctrl.c,v 1.5 1999/03/16 16:30:22 minoura Exp $ */
#include <sys/types.h>
#include <sys/ioctl.h>

2
sys/arch/x68k/usr.sbin/poffd/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.3 1999/02/13 02:54:51 lukem Exp $
# $NetBSD: Makefile,v 1.4 1999/03/16 16:30:22 minoura Exp $
PROG= poffd
MKMAN= no

18
sys/arch/x68k/x68k/autoconf.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: autoconf.c,v 1.16 1998/09/09 16:42:51 minoura Exp $ */
/* $NetBSD: autoconf.c,v 1.17 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1995 Leo Weppelman
@ -51,8 +51,9 @@
void configure __P((void));
static void findroot __P((struct device **, int *));
void mbattach __P((struct device *, struct device *, void *));
int mbprint __P((void *, const char *));
int mbmatch __P((struct device *, struct cfdata*, void*));
int x68k_config_found __P((struct cfdata *, struct device *,
void *, cfprint_t));
static int simple_devprint __P((void *, const char *));
static struct device *scsi_find __P((dev_t));
@ -158,6 +159,7 @@ config_console()
cf = config_rootsearch(NULL, "mainbus", "mainbus");
if (cf == NULL)
panic("no mainbus");
x68k_config_found(cf, NULL, "intio", NULL);
x68k_config_found(cf, NULL, "grfbus", NULL);
}
@ -303,7 +305,7 @@ mbattach(pdp, dp, auxp)
void *auxp;
{
printf ("\n");
config_found(dp, "clock" , simple_devprint);
config_found(dp, "intio" , simple_devprint);
config_found(dp, "grfbus" , simple_devprint);
config_found(dp, "par" , simple_devprint);
config_found(dp, "fdc" , simple_devprint);
@ -316,13 +318,3 @@ mbattach(pdp, dp, auxp)
config_found(dp, "adpcm" , simple_devprint);
config_found(dp, "*" , simple_devprint);
}
int
mbprint(auxp, pnp)
void *auxp;
const char *pnp;
{
if (pnp)
printf("%s at %s", (char *)auxp, pnp);
return(UNCONF);
}

677
sys/arch/x68k/x68k/bus.c Normal file
View File

@ -0,0 +1,677 @@
/* $NetBSD: bus.c,v 1.2 1999/03/16 16:30:23 minoura Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* bus_space(9) and bus_dma(9) implementation for NetBSD/x68k.
* These are default implementations; some buses may use their own.
*/
#include "opt_uvm.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/mbuf.h>
#include <sys/kernel.h>
#include <sys/conf.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <vm/vm_page.h>
#if defined(UVM)
#include <uvm/uvm_extern.h>
#endif
#include <machine/bus.h>
int
x68k_bus_space_alloc(t, rstart, rend, size, alignment, boundary, flags,
bpap, bshp)
bus_space_tag_t t;
bus_addr_t rstart, rend;
bus_size_t size, alignment, boundary;
int flags;
bus_addr_t *bpap;
bus_space_handle_t *bshp;
{
return (EINVAL);
}
void
x68k_bus_space_free(t, bsh, size)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t size;
{
panic("bus_space_free: shouldn't be here");
}
extern paddr_t avail_end;
/*
* Common function for DMA map creation. May be called by bus-specific
* DMA map creation functions.
*/
int
x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
bus_dma_tag_t t;
bus_size_t size;
int nsegments;
bus_size_t maxsegsz;
bus_size_t boundary;
int flags;
bus_dmamap_t *dmamp;
{
struct x68k_bus_dmamap *map;
void *mapstore;
size_t mapsize;
/*
* Allocate and initialize the DMA map. The end of the map
* is a variable-sized array of segments, so we allocate enough
* room for them in one shot.
*
* Note we don't preserve the WAITOK or NOWAIT flags. Preservation
* of ALLOCNOW notifies others that we've reserved these resources,
* and they are not to be freed.
*
* The bus_dmamap_t includes one bus_dma_segment_t, hence
* the (nsegments - 1).
*/
mapsize = sizeof(struct x68k_bus_dmamap) +
(sizeof(bus_dma_segment_t) * (nsegments - 1));
if ((mapstore = malloc(mapsize, M_DMAMAP,
(flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
return (ENOMEM);
memset(mapstore, 0, mapsize);
map = (struct x68k_bus_dmamap *)mapstore;
map->x68k_dm_size = size;
map->x68k_dm_segcnt = nsegments;
map->x68k_dm_maxsegsz = maxsegsz;
map->x68k_dm_boundary = boundary;
map->x68k_dm_bounce_thresh = t->_bounce_thresh;
map->x68k_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
map->dm_mapsize = 0; /* no valid mappings */
map->dm_nsegs = 0;
*dmamp = map;
return (0);
}
/*
* Common function for DMA map destruction. May be called by bus-specific
* DMA map destruction functions.
*/
void
x68k_bus_dmamap_destroy(t, map)
bus_dma_tag_t t;
bus_dmamap_t map;
{
free(map, M_DMAMAP);
}
/*
* Common function for loading a DMA map with a linear buffer. May
* be called by bus-specific DMA map load functions.
*/
int
x68k_bus_dmamap_load(t, map, buf, buflen, p, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
void *buf;
bus_size_t buflen;
struct proc *p;
int flags;
{
paddr_t lastaddr;
int seg, error;
/*
* Make sure that on error condition we return "no valid mappings".
*/
map->dm_mapsize = 0;
map->dm_nsegs = 0;
if (buflen > map->x68k_dm_size)
return (EINVAL);
seg = 0;
error = x68k_bus_dmamap_load_buffer(map, buf, buflen, p, flags,
&lastaddr, &seg, 1);
if (error == 0) {
map->dm_mapsize = buflen;
map->dm_nsegs = seg + 1;
}
return (error);
}
/*
* Like x68k_bus_dmamap_load(), but for mbufs.
*/
int
x68k_bus_dmamap_load_mbuf(t, map, m0, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
struct mbuf *m0;
int flags;
{
paddr_t lastaddr;
int seg, error, first;
struct mbuf *m;
/*
* Make sure that on error condition we return "no valid mappings."
*/
map->dm_mapsize = 0;
map->dm_nsegs = 0;
#ifdef DIAGNOSTIC
if ((m0->m_flags & M_PKTHDR) == 0)
panic("x68k_bus_dmamap_load_mbuf: no packet header");
#endif
if (m0->m_pkthdr.len > map->x68k_dm_size)
return (EINVAL);
first = 1;
seg = 0;
error = 0;
for (m = m0; m != NULL && error == 0; m = m->m_next) {
error = x68k_bus_dmamap_load_buffer(map, m->m_data, m->m_len,
NULL, flags, &lastaddr, &seg, first);
first = 0;
}
if (error == 0) {
map->dm_mapsize = m0->m_pkthdr.len;
map->dm_nsegs = seg + 1;
}
return (error);
}
/*
* Like x68k_bus_dmamap_load(), but for uios.
*/
int
x68k_bus_dmamap_load_uio(t, map, uio, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
struct uio *uio;
int flags;
{
#if 0
paddr_t lastaddr;
int seg, i, error, first;
bus_size_t minlen, resid;
struct proc *p = NULL;
struct iovec *iov;
caddr_t addr;
/*
* Make sure that on error condition we return "no valid mappings."
*/
map->dm_mapsize = 0;
map->dm_nsegs = 0;
resid = uio->uio_resid;
iov = uio->uio_iov;
if (uio->uio_segflg == UIO_USERSPACE) {
p = uio->uio_procp;
#ifdef DIAGNOSTIC
if (p == NULL)
panic("_bus_dmamap_load_uio: USERSPACE but no proc");
#endif
}
first = 1;
seg = 0;
error = 0;
for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
/*
* Now at the first iovec to load. Load each iovec
* until we have exhausted the residual count.
*/
minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
addr = (caddr_t)iov[i].iov_base;
error = x68k_bus_dmamap_load_buffer(map, addr, minlen,
p, flags, &lastaddr, &seg, first);
first = 0;
resid -= minlen;
}
if (error == 0) {
map->dm_mapsize = uio->uio_resid;
map->dm_nsegs = seg + 1;
}
return (error);
#else
panic ("x68k_bus_dmamap_load_uio: not implemented");
#endif
}
/*
* Like x68k_bus_dmamap_load(), but for raw memory allocated with
* bus_dmamem_alloc().
*/
int
x68k_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_dma_segment_t *segs;
int nsegs;
bus_size_t size;
int flags;
{
panic("x68k_bus_dmamap_load_raw: not implemented");
}
/*
* Common function for unloading a DMA map. May be called by
* bus-specific DMA map unload functions.
*/
void
x68k_bus_dmamap_unload(t, map)
bus_dma_tag_t t;
bus_dmamap_t map;
{
/*
* No resources to free; just mark the mappings as
* invalid.
*/
map->dm_mapsize = 0;
map->dm_nsegs = 0;
}
/*
* Common function for DMA map synchronization. May be called
* by bus-specific DMA map synchronization functions.
*/
void
x68k_bus_dmamap_sync(t, map, offset, len, ops)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_addr_t offset;
bus_size_t len;
int ops;
{
/* Nothing to do here. */
}
/*
* Common function for DMA-safe memory allocation. May be called
* by bus-specific DMA memory allocation functions.
*/
int
x68k_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
bus_dma_tag_t t;
bus_size_t size, alignment, boundary;
bus_dma_segment_t *segs;
int nsegs;
int *rsegs;
int flags;
{
return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
segs, nsegs, rsegs, flags, 0, trunc_page(avail_end)));
}
/*
* Common function for freeing DMA-safe memory. May be called by
* bus-specific DMA memory free functions.
*/
void
x68k_bus_dmamem_free(t, segs, nsegs)
bus_dma_tag_t t;
bus_dma_segment_t *segs;
int nsegs;
{
vm_page_t m;
bus_addr_t addr;
struct pglist mlist;
int curseg;
/*
* Build a list of pages to free back to the VM system.
*/
TAILQ_INIT(&mlist);
for (curseg = 0; curseg < nsegs; curseg++) {
for (addr = segs[curseg].ds_addr;
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
addr += PAGE_SIZE) {
m = PHYS_TO_VM_PAGE(addr);
TAILQ_INSERT_TAIL(&mlist, m, pageq);
}
}
#if defined(UVM)
uvm_pglistfree(&mlist);
#else
vm_page_free_memory(&mlist);
#endif
}
/*
* Common function for mapping DMA-safe memory. May be called by
* bus-specific DMA memory map functions.
*/
int
x68k_bus_dmamem_map(t, segs, nsegs, size, kvap, flags)
bus_dma_tag_t t;
bus_dma_segment_t *segs;
int nsegs;
size_t size;
caddr_t *kvap;
int flags;
{
vaddr_t va;
bus_addr_t addr;
int curseg;
extern vm_map_t kernel_map;
size = round_page(size);
#if defined(UVM)
va = uvm_km_valloc(kernel_map, size);
#else
va = kmem_alloc_pageable(kernel_map, size);
#endif
if (va == 0)
return (ENOMEM);
*kvap = (caddr_t)va;
for (curseg = 0; curseg < nsegs; curseg++) {
for (addr = segs[curseg].ds_addr;
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
addr += NBPG, va += NBPG, size -= NBPG) {
if (size == 0)
panic("x68k_bus_dmamem_map: size botch");
pmap_enter(pmap_kernel(), va, addr,
VM_PROT_READ | VM_PROT_WRITE, TRUE);
}
}
return (0);
}
/*
* Common function for unmapping DMA-safe memory. May be called by
* bus-specific DMA memory unmapping functions.
*/
void
x68k_bus_dmamem_unmap(t, kva, size)
bus_dma_tag_t t;
caddr_t kva;
size_t size;
{
extern vm_map_t kernel_map;
#ifdef DIAGNOSTIC
if ((u_long)kva & PGOFSET)
panic("x68k_bus_dmamem_unmap");
#endif
size = round_page(size);
#if defined(UVM)
uvm_km_free(kernel_map, (vaddr_t)kva, size);
#else
kmem_free(kernel_map, (vaddr_t)kva, size);
#endif
}
/*
* Common functin for mmap(2)'ing DMA-safe memory. May be called by
* bus-specific DMA mmap(2)'ing functions.
*/
int
x68k_bus_dmamem_mmap(t, segs, nsegs, off, prot, flags)
bus_dma_tag_t t;
bus_dma_segment_t *segs;
int nsegs, off, prot, flags;
{
int i;
for (i = 0; i < nsegs; i++) {
#ifdef DIAGNOSTIC
if (off & PGOFSET)
panic("x68k_bus_dmamem_mmap: offset unaligned");
if (segs[i].ds_addr & PGOFSET)
panic("x68k_bus_dmamem_mmap: segment unaligned");
if (segs[i].ds_len & PGOFSET)
panic("x68k_bus_dmamem_mmap: segment size not multiple"
" of page size");
#endif
if (off >= segs[i].ds_len) {
off -= segs[i].ds_len;
continue;
}
return (m68k_btop((caddr_t)segs[i].ds_addr + off));
}
/* Page not found. */
return (-1);
}
/**********************************************************************
* DMA utility functions
**********************************************************************/
/*
* Utility function to load a linear buffer. lastaddrp holds state
* between invocations (for multiple-buffer loads). segp contains
* the starting segment on entrace, and the ending segment on exit.
* first indicates if this is the first invocation of this function.
*/
int
x68k_bus_dmamap_load_buffer(map, buf, buflen, p, flags,
lastaddrp, segp, first)
bus_dmamap_t map;
void *buf;
bus_size_t buflen;
struct proc *p;
int flags;
paddr_t *lastaddrp;
int *segp;
int first;
{
bus_size_t sgsize;
bus_addr_t curaddr, lastaddr, baddr, bmask;
vaddr_t vaddr = (vaddr_t)buf;
int seg;
pmap_t pmap;
if (p != NULL)
pmap = p->p_vmspace->vm_map.pmap;
else
pmap = pmap_kernel();
lastaddr = *lastaddrp;
bmask = ~(map->x68k_dm_boundary - 1);
for (seg = *segp; buflen > 0 ; ) {
/*
* Get the physical address for this segment.
*/
curaddr = pmap_extract(pmap, vaddr);
/*
* If we're beyond the bounce threshold, notify
* the caller.
*/
if (map->x68k_dm_bounce_thresh != 0 &&
curaddr >= map->x68k_dm_bounce_thresh)
return (EINVAL);
/*
* Compute the segment size, and adjust counts.
*/
sgsize = NBPG - ((u_long)vaddr & PGOFSET);
if (buflen < sgsize)
sgsize = buflen;
/*
* Make sure we don't cross any boundaries.
*/
if (map->x68k_dm_boundary > 0) {
baddr = (curaddr + map->x68k_dm_boundary) & bmask;
if (sgsize > (baddr - curaddr))
sgsize = (baddr - curaddr);
}
/*
* Insert chunk into a segment, coalescing with
* previous segment if possible.
*/
if (first) {
map->dm_segs[seg].ds_addr = curaddr;
map->dm_segs[seg].ds_len = sgsize;
first = 0;
} else {
if (curaddr == lastaddr &&
(map->dm_segs[seg].ds_len + sgsize) <=
map->x68k_dm_maxsegsz &&
(map->x68k_dm_boundary == 0 ||
(map->dm_segs[seg].ds_addr & bmask) ==
(curaddr & bmask)))
map->dm_segs[seg].ds_len += sgsize;
else {
if (++seg >= map->x68k_dm_segcnt)
break;
map->dm_segs[seg].ds_addr = curaddr;
map->dm_segs[seg].ds_len = sgsize;
}
}
lastaddr = curaddr + sgsize;
vaddr += sgsize;
buflen -= sgsize;
}
*segp = seg;
*lastaddrp = lastaddr;
/*
* Did we fit?
*/
if (buflen != 0)
return (EFBIG); /* XXX better return value here? */
return (0);
}
/*
* Allocate physical memory from the given physical address range.
* Called by DMA-safe memory allocation methods.
*/
int
x68k_bus_dmamem_alloc_range(t, size, alignment, boundary, segs, nsegs, rsegs,
flags, low, high)
bus_dma_tag_t t;
bus_size_t size, alignment, boundary;
bus_dma_segment_t *segs;
int nsegs;
int *rsegs;
int flags;
paddr_t low;
paddr_t high;
{
paddr_t curaddr, lastaddr;
vm_page_t m;
struct pglist mlist;
int curseg, error;
/* Always round the size. */
size = round_page(size);
/*
* Allocate pages from the VM system.
*/
TAILQ_INIT(&mlist);
#if defined(UVM)
error = uvm_pglistalloc(size, low, high, alignment, boundary,
&mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
#else
error = vm_page_alloc_memory(size, low, high,
alignment, boundary, &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
#endif
if (error)
return (error);
/*
* Compute the location, size, and number of segments actually
* returned by the VM code.
*/
m = mlist.tqh_first;
curseg = 0;
lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
segs[curseg].ds_len = PAGE_SIZE;
m = m->pageq.tqe_next;
for (; m != NULL; m = m->pageq.tqe_next) {
curaddr = VM_PAGE_TO_PHYS(m);
#ifdef DIAGNOSTIC
if (curaddr < low || curaddr >= high) {
printf("vm_page_alloc_memory returned non-sensical"
" address 0x%lx\n", curaddr);
panic("x68k_bus_dmamem_alloc_range");
}
#endif
if (curaddr == (lastaddr + PAGE_SIZE))
segs[curseg].ds_len += PAGE_SIZE;
else {
curseg++;
segs[curseg].ds_addr = curaddr;
segs[curseg].ds_len = PAGE_SIZE;
}
lastaddr = curaddr;
}
*rsegs = curseg + 1;
return (0);
}

82
sys/arch/x68k/x68k/clock.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: clock.c,v 1.6 1998/08/22 14:38:39 minoura Exp $ */
/* $NetBSD: clock.c,v 1.7 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -42,6 +42,10 @@
* @(#)clock.c 8.2 (Berkeley) 1/12/94
*/
#include "clock.h"
#if NCLOCK > 0
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
@ -49,13 +53,48 @@
#include <machine/psl.h>
#include <machine/cpu.h>
#include <machine/bus.h>
#include <x68k/x68k/iodevice.h>
#include <x68k/dev/rtclock_var.h>
#include <arch/x68k/dev/mfp.h>
#include <arch/x68k/dev/rtclock_var.h>
struct clock_softc {
struct device sc_dev;
};
static int clock_match __P((struct device *, struct cfdata *, void *));
static void clock_attach __P((struct device *, struct device *, void *));
struct cfattach clock_ca = {
sizeof(struct clock_softc), clock_match, clock_attach
};
static int
clock_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
if (strcmp (aux, "clock") != 0)
return (0);
if (cf->cf_unit != 0)
return (0);
return 1;
}
static void
clock_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
printf (": MFP timer C\n");
return;
}
#ifdef GPROF
#include <sys/gmon.h>
#endif
/* We're using a 100 Hz clock. */
@ -89,13 +128,11 @@ static int clkread __P((void));
void
cpu_initclocks()
{
/* stop timer-C */
mfp.tcdcr &= 0x0f;
mfp.tcdr = CLK_INTERVAL;
mfp_set_tcdcr(mfp_get_tcdcr() & 0x0f); /* stop timer C */
mfp_set_tcdr(CLK_INTERVAL);
/* enable interrupts for timer-C */
mfp.tcdcr |= 0x70; /* prescale 1/200 */
mfp.ierb |= 0x20;
mfp_set_tcdcr(mfp_get_tcdcr() | 0x70); /* 1/200 delay mode */
mfp_bit_set_ierb(MFP_INTR_TIMER_C);
}
/*
@ -116,9 +153,10 @@ setstatclockrate(hz)
int
clkread()
{
return (mfp.tcdr * CLOCKS_PER_SEC) / CLK_INTERVAL;
return (mfp_get_tcdr() * CLOCKS_PER_SEC) / CLK_INTERVAL;
}
#if 0
void
DELAY(mic)
@ -155,8 +193,6 @@ DELAY(mic)
/* implement this later. I'd suggest using both timers in CIA-A, they're
not yet used. */
#include "clock.h"
#if NCLOCK > 0
/*
* /dev/clock: mappable high resolution timer.
*
@ -198,13 +234,13 @@ clockopen(dev, flags)
*/
if (profiling)
return(EBUSY);
#endif
#endif /* PROF */
/*
* If any user processes are profiling, give up.
*/
if (profprocs)
return(EBUSY);
#endif
#endif /* PROFTIMER */
if (!clockon) {
startclock();
clockon++;
@ -316,9 +352,8 @@ stopclock()
clk->clk_cr2 = CLK_CR1;
clk->clk_cr1 = CLK_IENAB;
}
#endif
#endif
#endif /* notyet */
#ifdef PROFTIMER
@ -346,7 +381,6 @@ char profon = 0; /* Is profiling clock on? */
initprofclock()
{
#if NCLOCK > 0
struct proc *p = curproc; /* XXX */
/*
@ -372,7 +406,6 @@ initprofclock()
profprocs++;
else
profprocs--;
#endif
/*
* The profile interrupt interval must be an even divisor
* of the CLK_INTERVAL so that scaling from a system clock
@ -429,8 +462,8 @@ profclock(pc, ps)
stopprofclock();
}
}
#endif
#endif
#endif /* PROF */
#endif /* PROFTIMER */
/*
* Return the best possible estimate of the current time.
@ -497,3 +530,6 @@ resettodr()
if (settod (time.tv_sec) != 1)
printf("Cannot set battery backed clock\n");
}
#else /* NCLOCK */
#error loose.
#endif

13
sys/arch/x68k/x68k/conf.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: conf.c,v 1.16 1998/11/13 04:47:10 oster Exp $ */
/* $NetBSD: conf.c,v 1.17 1999/03/16 16:30:23 minoura Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@ -159,6 +159,7 @@ cdev_decl(vnd);
cdev_decl(md);
cdev_decl(st);
cdev_decl(fd);
#include "kbd.h"
cdev_decl(kbd);
#include "ms.h"
cdev_decl(ms);
@ -206,7 +207,11 @@ struct cdevsw cdevsw[] =
cdev_par_init(NPAR,par), /* 11: parallel interface */
cdev_tty_init(NZSTTY,zs), /* 12: zs serial */
cdev_ite_init(NITE,ite), /* 13: console terminal emulator */
#if NKBD > 0
cdev_gen_init(1,kbd), /* 14: /dev/kbd */
#else
cdev_notdef(),
#endif
#if NMS > 0
cdev_gen_init(1,ms), /* 15: /dev/mouse */
#else
@ -328,10 +333,14 @@ chrtoblk(dev)
#define itecnpollc nullcnpollc
cons_decl(ite);
cons_decl(zs);
struct consdev constab[] = {
#if NITE > 0
#if NITE > 0 && NKBD > 0
cons_init(ite),
#endif
#if NZSTTY > 0
cons_init(zs),
#endif
{ 0 },
};

2
sys/arch/x68k/x68k/disksubr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: disksubr.c,v 1.8 1999/01/09 19:55:58 itohy Exp $ */
/* $NetBSD: disksubr.c,v 1.9 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1982, 1986, 1988 Regents of the University of California.

4
sys/arch/x68k/x68k/iodevice.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: iodevice.h,v 1.5 1998/08/05 16:08:37 minoura Exp $ */
/* $NetBSD: iodevice.h,v 1.6 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1993, 1994, 1995 Masaru Oki
@ -370,6 +370,7 @@ volatile struct IODEVICE *IODEVbase;
#define ioctlr (IODEVbase->io_ctlr)
#endif
#if 0
/*
* devices that need to configure before console use this
* *and know it* (i.e. everything is really tight certain params won't be
@ -378,3 +379,4 @@ volatile struct IODEVICE *IODEVbase;
#include <sys/device.h>
int x68k_config_found __P((struct cfdata *, struct device *,
void *, cfprint_t));
#endif

193
sys/arch/x68k/x68k/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.39 1999/02/26 16:07:08 is Exp $ */
/* $NetBSD: locore.s,v 1.40 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -47,11 +47,8 @@
#include "opt_uvm.h"
#include "ite.h"
#include "spc.h"
#include "mha.h"
#include "fd.h"
#include "par.h"
#include "adpcm.h"
#include "assym.h"
#include <machine/asm.h>
@ -512,125 +509,21 @@ Lbrkpt3:
.globl _intrhand, _hardclock
ENTRY_NOPROFILE(spurintr) /* level 0 */
addql #1,_C_LABEL(intrcnt)+0
rte | XXX mfpcure (x680x0 hardware bug)
_zstrap:
#include "zsc.h"
#if NZSC > 0
INTERRUPT_SAVEREG
movw sp@(22),sp@- | push exception vector info
movw sr,d0
movw #PSL_HIGHIPL,sr
movw d0,sp@-
jbsr _C_LABEL(zshard)
addql #4,sp
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+48
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
addql #1,_C_LABEL(cnt)+V_INTR
#endif
rte
_kbdtrap:
INTERRUPT_SAVEREG
jbsr _kbdintr
INTERRUPT_RESTOREREG
addql #1,_C_LABEL(intrcnt)+40
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
addql #1,_C_LABEL(cnt)+V_INTR
#endif
/* jra rei*/
rte
_kbdtimer:
rte
_fdctrap:
#if NFD > 0
INTERRUPT_SAVEREG
jbsr _C_LABEL(fdcintr)
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+20
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
addql #1,_C_LABEL(cnt)+V_INTR
#endif
jra rei
_fdcdmatrap:
#if NFD > 0
INTERRUPT_SAVEREG
jbsr _C_LABEL(fdcdmaintr)
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+20
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
addql #1,_C_LABEL(cnt)+V_INTR
#endif
jra rei
_fdcdmaerrtrap:
#if NFD > 0
INTERRUPT_SAVEREG
jbsr _C_LABEL(fdcdmaerrintr)
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+20
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
addql #1,_C_LABEL(cnt)+V_INTR
#endif
jra rei
#ifdef SCSIDMA
_spcdmatrap:
#if NSPC > 0
INTERRUPT_SAVEREG
jbsr _C_LABEL(spcdmaintr)
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+20
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
addql #1,_C_LABEL(cnt)+V_INTR
#endif
jra rei
_spcdmaerrtrap:
#if NSPC > 0
INTERRUPT_SAVEREG
jbsr _C_LABEL(spcdmaerrintr)
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+20
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
addql #1,_C_LABEL(cnt)+V_INTR
#endif
jra rei
#endif
_audiotrap:
#if 0
#if NADPCM > 0
INTERRUPT_SAVEREG
jbsr _audiointr
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+52
#endif
addql #1,_C_LABEL(intrcnt)+44
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
@ -646,7 +539,7 @@ _partrap:
addql #4,sp
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+56
addql #1,_C_LABEL(intrcnt)+48
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
@ -660,44 +553,7 @@ _audioerrtrap:
jbsr _audioerrintr
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+20
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
addql #1,_C_LABEL(cnt)+V_INTR
#endif
jra rei
_spctrap:
#if NSPC > 0
INTERRUPT_SAVEREG
movel #0,sp@-
jbsr _spcintr | handle interrupt
addql #4,sp
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+44
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
addql #1,_C_LABEL(cnt)+V_INTR
#endif
jra rei
_exspctrap:
INTERRUPT_SAVEREG
#if NMHA > 0
movel #0,sp@-
jbsr _mhaintr | handle interrupt
addql #4,sp
#endif
#if NSPC > 1
movel #1,sp@-
jbsr _spcintr | handle interrupt
addql #4,sp
#endif
INTERRUPT_RESTOREREG
addql #1,_C_LABEL(intrcnt)+44
addql #1,_C_LABEL(intrcnt)+32
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
@ -712,7 +568,7 @@ _powtrap:
jbsr _C_LABEL(powintr)
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+60
addql #1,_C_LABEL(intrcnt)+52
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
@ -729,7 +585,7 @@ _com0trap:
addql #4,sp
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+68
addql #1,_C_LABEL(intrcnt)+56
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
@ -745,7 +601,7 @@ _com1trap:
addql #4,sp
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+68
addql #1,_C_LABEL(intrcnt)+56
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
@ -753,16 +609,15 @@ _com1trap:
#endif
jra rei
_edtrap:
#include "ed.h"
#if NED > 0
_intiotrap:
INTERRUPT_SAVEREG
movel #0,sp@-
jbsr _edintr
#if 0
movw #PSL_HIGHIPL,sr | XXX
#endif
pea sp@(16-(FR_HW)) | XXX
jbsr _C_LABEL(intio_intr)
addql #4,sp
INTERRUPT_RESTOREREG
#endif
addql #1,_C_LABEL(intrcnt)+64
#if defined(UVM)
addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS
#else
@ -797,7 +652,7 @@ Lnotdma:
_timertrap:
movw #SPL4,sr | XXX?
moveml #0xC0C0,sp@- | save scratch registers
addql #1,_C_LABEL(intrcnt)+28 | count hardclock interrupts
addql #1,_C_LABEL(intrcnt)+36 | count hardclock interrupts
lea sp@(16),a1 | a1 = &clockframe
movl a1,sp@-
jbsr _hardclock | hardclock(&frame)
@ -815,7 +670,7 @@ _timertrap:
jra rei | all done
_lev7intr:
addql #1,_C_LABEL(intrcnt)+36
addql #1,_C_LABEL(intrcnt)+28
clrl sp@-
moveml #0xFFFF,sp@- | save registers
movl usp,a0 | and save
@ -1084,6 +939,7 @@ Lstploaddone:
RELOC(_mmutype, a0)
cmpl #MMU_68040,a0@ | 68040?
jne Lmotommu2 | no, skip
#include "opt_jupiter.h"
#ifdef JUPITER
/* JUPITER-X: set system register "SUPER" bit */
movl #0x0200a240,d0 | translate DRAM area transparently
@ -1977,19 +1833,18 @@ _intrnames:
.asciz "lev4"
.asciz "lev5"
.asciz "lev6"
.asciz "clock"
.asciz "statclock"
.asciz "nmi"
.asciz "kbd"
.asciz "audioerr"
.asciz "clock"
.asciz "scsi"
.asciz "zs"
.asciz "audio"
.asciz "ppi"
.asciz "pow"
.asciz "ed"
.asciz "com"
.space 200
_eintrnames:
.even
_intrcnt:
.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.space 50
_eintrcnt:

16
sys/arch/x68k/x68k/machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.48 1999/02/27 06:39:38 scottr Exp $ */
/* $NetBSD: machdep.c,v 1.49 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -52,6 +52,9 @@
#include "opt_uvm.h"
#include "opt_compat_hpux.h"
#include "opt_compat_netbsd.h"
#include "opt_fpuemulate.h"
#include "opt_m060sp.h"
#include "opt_panicbutton.h"
#include "opt_sysv.h"
#include <sys/param.h>
@ -109,7 +112,9 @@
#include <sys/sysctl.h>
#include <sys/device.h>
#include <x68k/x68k/iodevice.h>
#include <machine/bus.h>
#include <arch/x68k/dev/intiovar.h>
void initcpu __P((void));
void identifycpu __P((void));
@ -277,7 +282,9 @@ cpu_startup()
pmapdebug = 0;
#endif
#if 0
rtclockinit(); /* XXX */
#endif
/*
* Initialize error message buffer (at end of core).
@ -612,7 +619,7 @@ identifycpu()
/*
* check machine type constant
*/
switch (IODEVbase->io_sysport.mpustat) {
switch (intio_get_sysport_mpustat()) {
case 0xdc:
/*
* CPU Type == 68030, Clock == 25MHz
@ -1245,7 +1252,8 @@ void
nmihand(frame)
struct frame frame;
{
sysport.keyctrl = sysport.keyctrl | 0x04;
intio_set_sysport_keyctrl(intio_get_sysport_keyctrl() | 0x04);
if (1) {
#ifdef PANICBUTTON
static int innmihand = 0;

2
sys/arch/x68k/x68k/pmap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pmap.c,v 1.25 1999/03/02 18:18:38 itohy Exp $ */
/* $NetBSD: pmap.c,v 1.26 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1991, 1993

9
sys/arch/x68k/x68k/pmap_bootstrap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pmap_bootstrap.c,v 1.14 1999/01/18 07:39:52 itohy Exp $ */
/* $NetBSD: pmap_bootstrap.c,v 1.15 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1991, 1993
@ -65,6 +65,8 @@ extern int protection_codes[];
extern int pmap_aliasmask;
#endif
u_int8_t *intiobase = (u_int8_t *) PHYS_IODEV;
void pmap_bootstrap __P((paddr_t, paddr_t));
#ifdef MACHINE_NONCONTIG
@ -79,6 +81,10 @@ u_long low[8];
u_long high[8];
#endif
#ifndef EIOMAPSIZE
#define EIOMAPSIZE 0
#endif
/*
* Special purpose kernel virtual addresses, used for mapping
* physical pages for a variety of temporary or permanent purposes:
@ -409,6 +415,7 @@ pmap_bootstrap(nextpa, firstpa)
*/
RELOC(IODEVbase, char *) =
(char *)m68k_ptob(nptpages*NPTEPG - (IIOMAPSIZE+EIOMAPSIZE));
RELOC(intiobase, u_int8_t *) = RELOC(IODEVbase, u_int8_t *); /* XXX */
RELOC(intiolimit, char *) =
(char *)m68k_ptob(nptpages*NPTEPG - EIOMAPSIZE);
/*

2
sys/arch/x68k/x68k/sys_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: sys_machdep.c,v 1.14 1999/02/26 22:37:59 is Exp $ */
/* $NetBSD: sys_machdep.c,v 1.15 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1982, 1986, 1993

7
sys/arch/x68k/x68k/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.26 1998/12/15 19:37:17 itohy Exp $ */
/* $NetBSD: trap.c,v 1.27 1999/03/16 16:30:23 minoura Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -288,7 +288,7 @@ trap(type, code, v, frame)
struct proc *p;
int i, s;
u_int ucode;
u_quad_t sticks;
u_quad_t sticks = 0 /* XXX initializer works around compiler bug */;
#if defined(UVM)
uvmexp.traps++;
@ -579,7 +579,10 @@ trap(type, code, v, frame)
#else
cnt.v_soft++;
#endif
#include "kbd.h"
#if NKBD > 0
kbdsoftint();
#endif
}
/*
* If this was not an AST trap, we are all done.

189
sys/arch/x68k/x68k/vectors.s
View File

@ -1,4 +1,4 @@
| $NetBSD: vectors.s,v 1.7 1998/10/18 04:42:38 itohy Exp $
| $NetBSD: vectors.s,v 1.8 1999/03/16 16:30:24 minoura Exp $
| Copyright (c) 1988 University of Utah
| Copyright (c) 1990, 1993
@ -69,14 +69,14 @@ _vectab:
.long _coperr /* 13: coprocessor protocol violation */
.long _fmterr /* 14: format error */
.long _badtrap /* 15: uninitialized interrupt vector */
.long _badtrap /* 16: unassigned, reserved */
.long _badtrap /* 17: unassigned, reserved */
.long _badtrap /* 18: unassigned, reserved */
.long _badtrap /* 19: unassigned, reserved */
.long _badtrap /* 20: unassigned, reserved */
.long _badtrap /* 21: unassigned, reserved */
.long _badtrap /* 22: unassigned, reserved */
.long _badtrap /* 23: unassigned, reserved */
.long _intiotrap /* 16: unassigned, reserved */
.long _intiotrap /* 17: unassigned, reserved */
.long _intiotrap /* 18: unassigned, reserved */
.long _intiotrap /* 19: unassigned, reserved */
.long _intiotrap /* 20: unassigned, reserved */
.long _intiotrap /* 21: unassigned, reserved */
.long _intiotrap /* 22: unassigned, reserved */
.long _intiotrap /* 23: unassigned, reserved */
.long _spurintr /* 24: spurious interrupt */
.long _lev1intr /* 25: level 1 interrupt autovector */
.long _lev2intr /* 26: level 2 interrupt autovector */
@ -127,86 +127,81 @@ _vectab:
.long _fpunsupp /* 55: FPCP unimplemented data type */
.long _badtrap /* 56: MMU configuration error */
.long _badtrap /* 57: unassigned, reserved */
.long _badtrap /* 58: unassigned, reserved */
.long _badtrap /* 59: unassigned, reserved */
.long _badtrap /* 60: unassigned, reserved */
.long _badtrap /* 61: unassigned, reserved */
.long _badtrap /* 62: unassigned, reserved */
.long _badtrap /* 63: unassigned, reserved */
.long _mfptrap /* 64: MFP GPIP0 RTC alarm */
.long _intiotrap /* 57: unassigned, reserved */
.long _intiotrap /* 58: unassigned, reserved */
.long _intiotrap /* 59: unassigned, reserved */
.long _intiotrap /* 60: unassigned, reserved */
.long _intiotrap /* 61: unassigned, reserved */
.long _intiotrap /* 62: unassigned, reserved */
.long _intiotrap /* 63: unassigned, reserved */
.long _intiotrap /* 64: MFP GPIP0 RTC alarm */
.long _powtrap /* 65: MFP GPIP1 ext. power switch */
.long _powtrap /* 66: MFP GPIP2 front power switch */
.long _mfptrap /* 67: MFP GPIP3 FM sound generator */
.long _mfptrap /* 68: MFP timer-D */
.long _intiotrap /* 67: MFP GPIP3 FM sound generator */
.long _intiotrap /* 68: MFP timer-D */
.long _timertrap /* 69: MFP timer-C */
.long _mfptrap /* 70: MFP GPIP4 VBL */
.long _mfptrap /* 71: MFP GPIP5 unassigned */
.long _intiotrap /* 70: MFP GPIP4 VBL */
.long _intiotrap /* 71: MFP GPIP5 unassigned */
.long _kbdtimer /* 72: MFP timer-B */
.long _mfptrap /* 73: MFP MPSC send error */
.long _mfptrap /* 74: MFP MPSC transmit buffer empty */
.long _mfptrap /* 75: MFP MPSC receive error */
.long _kbdtrap /* 76: MFP MPSC receive buffer full */
.long _mfptrap /* 77: MFP timer-A */
.long _mfptrap /* 78: MFP CRTC raster */
.long _mfptrap /* 79: MFP H-SYNC */
.long _badtrap /* 80: unassigned, reserved */
.long _badtrap /* 81: unassigned, reserved */
.long _badtrap /* 82: unassigned, reserved */
.long _badtrap /* 83: unassigned, reserved */
.long _badtrap /* 84: unassigned, reserved */
.long _badtrap /* 85: unassigned, reserved */
.long _badtrap /* 86: unassigned, reserved */
.long _badtrap /* 87: unassigned, reserved */
.long _badtrap /* 88: unassigned, reserved */
.long _badtrap /* 89: unassigned, reserved */
.long _badtrap /* 90: unassigned, reserved */
.long _badtrap /* 91: unassigned, reserved */
.long _badtrap /* 92: unassigned, reserved */
.long _badtrap /* 93: unassigned, reserved */
.long _badtrap /* 94: unassigned, reserved */
.long _badtrap /* 95: unassigned, reserved */
.long _fdctrap /* 96: FDC */
.long _intiotrap /* 73: MFP MPSC send error */
.long _intiotrap /* 74: MFP MPSC transmit buffer empty */
.long _intiotrap /* 75: MFP MPSC receive error */
.long _intiotrap /* 76: MFP MPSC receive buffer full */
.long _intiotrap /* 77: MFP timer-A */
.long _intiotrap /* 78: MFP CRTC raster */
.long _intiotrap /* 79: MFP H-SYNC */
.long _intiotrap /* 80: unassigned, reserved */
.long _intiotrap /* 81: unassigned, reserved */
.long _intiotrap /* 82: unassigned, reserved */
.long _intiotrap /* 83: unassigned, reserved */
.long _intiotrap /* 84: unassigned, reserved */
.long _intiotrap /* 85: unassigned, reserved */
.long _intiotrap /* 86: unassigned, reserved */
.long _intiotrap /* 87: unassigned, reserved */
.long _intiotrap /* 88: unassigned, reserved */
.long _intiotrap /* 89: unassigned, reserved */
.long _intiotrap /* 90: unassigned, reserved */
.long _intiotrap /* 91: unassigned, reserved */
.long _intiotrap /* 92: unassigned, reserved */
.long _intiotrap /* 93: unassigned, reserved */
.long _intiotrap /* 94: unassigned, reserved */
.long _intiotrap /* 95: unassigned, reserved */
.long _intiotrap /* 96: FDC */
.long _fdeject /* 97: floppy ejection */
.long _badtrap /* 98: unassigned, reserved */
.long _intiotrap /* 98: unassigned, reserved */
.long _partrap /* 99: parallel port */
.long _fdcdmatrap /* 100: FDC DMA */
.long _fdcdmaerrtrap /* 101: FDC DMA (error) */
#ifdef SCSIDMA
.long _spcdmatrap /* 102: SCSI DMA */
.long _spcdmaerrtrap /* 103: SCSI DMA (error) */
#else
.long _badtrap /* 102: unassigned, reserved */
.long _badtrap /* 103: unassigned, reserved */
#endif
.long _badtrap /* 104: unassigned, reserved */
.long _badtrap /* 105: unassigned, reserved */
.long _audiotrap /* 106: ADPCM DMA */
.long _audioerrtrap /* 107: ADPCM DMA */
.long _spctrap /* 108: internal SPC */
.long _badtrap /* 109: unassigned, reserved */
.long _badtrap /* 110: unassigned, reserved */
.long _badtrap /* 111: unassigned, reserved */
.long _zstrap /* 112: Z8530 SCC (onboard) */
.long _zstrap /* 113: Z8530 SCC */
.long _zstrap /* 114: Z8530 SCC */
.long _badtrap /* 115: unassigned, reserved */
.long _badtrap /* 116: unassigned, reserved */
.long _badtrap /* 117: unassigned, reserved */
.long _badtrap /* 118: unassigned, reserved */
.long _badtrap /* 119: unassigned, reserved */
.long _badtrap /* 129: unassigned, reserved */
.long _badtrap /* 121: unassigned, reserved */
.long _badtrap /* 122: unassigned, reserved */
.long _badtrap /* 123: unassigned, reserved */
.long _badtrap /* 124: unassigned, reserved */
.long _badtrap /* 125: unassigned, reserved */
.long _badtrap /* 126: unassigned, reserved */
.long _badtrap /* 127: unassigned, reserved */
#define BADTRAP16 .long _badtrap,_badtrap,_badtrap,_badtrap,\
_badtrap,_badtrap,_badtrap,_badtrap,\
_badtrap,_badtrap,_badtrap,_badtrap,\
_badtrap,_badtrap,_badtrap,_badtrap
.long _intiotrap /* 100: FDC DMA */
.long _intiotrap /* 101: FDC DMA (error) */
.long _intiotrap /* 102: unassigned, reserved */
.long _intiotrap /* 103: unassigned, reserved */
.long _intiotrap /* 104: unassigned, reserved */
.long _intiotrap /* 105: unassigned, reserved */
.long _intiotrap /* 106: ADPCM DMA */
.long _intiotrap /* 107: ADPCM DMA */
.long _intiotrap /* 108: internal SPC */
.long _intiotrap /* 109: unassigned, reserved */
.long _intiotrap /* 110: unassigned, reserved */
.long _intiotrap /* 111: unassigned, reserved */
.long _intiotrap /* 112: Z8530 SCC (onboard) */
.long _intiotrap /* 113: Z8530 SCC */
.long _intiotrap /* 114: Z8530 SCC */;
.long _intiotrap /* 115: unassigned, reserved */
.long _intiotrap /* 116: unassigned, reserved */
.long _intiotrap /* 117: unassigned, reserved */
.long _intiotrap /* 118: unassigned, reserved */
.long _intiotrap /* 119: unassigned, reserved */
.long _intiotrap /* 129: unassigned, reserved */
.long _intiotrap /* 121: unassigned, reserved */
.long _intiotrap /* 122: unassigned, reserved */
.long _intiotrap /* 123: unassigned, reserved */
.long _intiotrap /* 124: unassigned, reserved */
.long _intiotrap /* 125: unassigned, reserved */
.long _intiotrap /* 126: unassigned, reserved */
.long _intiotrap /* 127: unassigned, reserved */
#define BADTRAP16 .long _intiotrap,_intiotrap,_intiotrap,_intiotrap,\
_intiotrap,_intiotrap,_intiotrap,_intiotrap,\
_intiotrap,_intiotrap,_intiotrap,_intiotrap,\
_intiotrap,_intiotrap,_intiotrap,_intiotrap
BADTRAP16 /* 128-143: user interrupt vectors */
BADTRAP16 /* 144-159: user interrupt vectors */
BADTRAP16 /* 160-175: user interrupt vectors */
@ -216,17 +211,17 @@ _vectab:
BADTRAP16 /* 224-239: user interrupt vectors */
.long _com0trap /* 240: unassigned, reserved */
.long _com1trap /* 241: unassigned, reserved */
.long _badtrap /* 242: unassigned, reserved */
.long _badtrap /* 243: unassigned, reserved */
.long _badtrap /* 244: unassigned, reserved */
.long _badtrap /* 245: unassigned, reserved */
.long _exspctrap /* 246: external SPC */
.long _badtrap /* 247: unassigned, reserved */
.long _badtrap /* 248: unassigned, reserved */
.long _edtrap /* 249: Neptune-X */
.long _badtrap /* 250: unassigned, reserved */
.long _badtrap /* 251: unassigned, reserved */
.long _badtrap /* 252: unassigned, reserved */
.long _badtrap /* 253: unassigned, reserved */
.long _badtrap /* 254: unassigned, reserved */
.long _badtrap /* 255: unassigned, reserved */
.long _intiotrap /* 242: unassigned, reserved */
.long _intiotrap /* 243: unassigned, reserved */
.long _intiotrap /* 244: unassigned, reserved */
.long _intiotrap /* 245: unassigned, reserved */
.long _intiotrap /* 246: external SPC */
.long _intiotrap /* 247: unassigned, reserved */
.long _intiotrap /* 248: unassigned, reserved */
.long _intiotrap /* 249: Neptune-X */
.long _intiotrap /* 250: unassigned, reserved */
.long _intiotrap /* 251: unassigned, reserved */
.long _intiotrap /* 252: unassigned, reserved */
.long _intiotrap /* 253: unassigned, reserved */
.long _intiotrap /* 254: unassigned, reserved */
.long _intiotrap /* 255: unassigned, reserved */

6
sys/arch/x68k/x68k/vm_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: vm_machdep.c,v 1.16 1998/11/18 10:05:35 itohy Exp $ */
/* $NetBSD: vm_machdep.c,v 1.17 1999/03/16 16:30:24 minoura Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -195,13 +195,13 @@ cpu_coredump(p, vp, cred, chdr)
error = vn_rdwr(UIO_WRITE, vp, (caddr_t)&cseg, chdr->c_seghdrsize,
(off_t)chdr->c_hdrsize, UIO_SYSSPACE, IO_NODELOCKED|IO_UNIT, cred,
NULL, p);
(int *)0, p);
if (error)
return error;
error = vn_rdwr(UIO_WRITE, vp, (caddr_t)&md_core, sizeof(md_core),
(off_t)(chdr->c_hdrsize + chdr->c_seghdrsize), UIO_SYSSPACE,
IO_NODELOCKED|IO_UNIT, cred, NULL, p);
IO_NODELOCKED|IO_UNIT, cred, (int *)0, p);
if (error)
return error;

18
sys/arch/x68k/x68k/x68k_init.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: x68k_init.c,v 1.5 1998/08/05 16:08:39 minoura Exp $ */
/* $NetBSD: x68k_init.c,v 1.6 1999/03/16 16:30:24 minoura Exp $ */
/*
* Copyright (c) 1996 Masaru Oki.
@ -31,7 +31,12 @@
*/
#include <sys/param.h>
#include <sys/device.h>
#include <machine/bus.h>
#include <arch/x68k/dev/intiovar.h>
#include <arch/x68k/dev/mfp.h>
#include <x68k/x68k/iodevice.h>
#define zsdev IODEVbase->io_inscc
@ -39,6 +44,8 @@ volatile struct IODEVICE *IODEVbase = (volatile struct IODEVICE *) PHYS_IODEV;
void intr_reset __P((void));
extern int iera;
extern int ierb;
/*
* disable all interrupt.
*/
@ -59,10 +66,11 @@ intr_reset()
asm("nop");
zsdev.zs_chan_b.zc_csr = 0;
asm("nop");
while(!(mfp.tsr & MFP_TSR_BE))
;
mfp.udr = 0x41;
mfp_send_usart(0x41);
/* MFP (hard coded interrupt vector XXX) */
mfp.vr = 0x40;
mfp_set_vr(0x40);
mfp_set_iera(0);
mfp_set_ierb(0);
}