NetBSD/sys/arch/mips
nisimura 56a9b84b91 - MIPS processors do not impose inclusive (nesting) interrupt levels with
their interrupt lines.  The notion and implemention of 'spl' are left
for how target ports approach to it.
1999-04-26 09:42:14 +00:00
..
conf Nuke register and remove trailling white space. 1999-04-24 08:01:01 +00:00
include - MIPS processors do not impose inclusive (nesting) interrupt levels with 1999-04-26 09:42:14 +00:00
mips g/c REAL_CLISTS. 1999-04-25 02:56:26 +00:00
Makefile Rework the way kernel include files are installed. In the new method, 1998-06-12 23:22:30 +00:00
Makefile.inc GC some bogus definitions. 1997-10-11 16:12:55 +00:00