104 lines
2.7 KiB
ArmAsm
104 lines
2.7 KiB
ArmAsm
/* $NetBSD: pxa2x0_a4x_io.S,v 1.1 2002/10/19 19:31:39 bsh Exp $ */
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/*
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* Copyright (c) 2002 Genetec Corporation. All rights reserved.
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* Written by Hiroyuki Bessho for Genetec Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Genetec Corporation.
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* 4. The name of Genetec Corporation may not be used to endorse or
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* promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* There are simple bus space functions for IO registers mapped at
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* 32-bit aligned positions. offset is multiplied by 4.
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*/
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#include <machine/asm.h>
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/*
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* bus_space I/O functions with offset*4
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*/
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/*
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* read single
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*/
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ENTRY(a4x_bs_r_1)
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ldrb r0, [r1, r2, LSL #2]
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mov pc, lr
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ENTRY(a4x_bs_r_2)
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mov r2, r2, LSL #2
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ldrh r0, [r1, r2]
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mov pc, lr
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ENTRY(a4x_bs_r_4)
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ldr r0, [r1, r2, LSL #2]
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mov pc, lr
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/*
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* write single
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*/
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ENTRY(a4x_bs_w_1)
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strb r3, [r1, r2, LSL #2]
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mov pc, lr
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ENTRY(a4x_bs_w_2)
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mov r2, r2, LSL #2
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strh r3, [r1, r2]
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mov pc, lr
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ENTRY(a4x_bs_w_4)
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str r3, [r1, r2, LSL #2]
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mov pc, lr
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/*
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* read multiple
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*/
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ENTRY(a4x_bs_rm_1)
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mov r2, r2, LSL #2
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b generic_bs_rm_1
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ENTRY(a4x_bs_rm_2)
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mov r2, r2, LSL #2
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b generic_armv4_bs_rm_2
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/*
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* write multiple
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*/
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ENTRY(a4x_bs_wm_1)
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mov r2, r2, LSL #2
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b generic_bs_wm_1
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ENTRY(a4x_bs_wm_2)
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mov r2, r2, LSL #2
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b generic_armv4_bs_wm_2
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