skrll 8a04118d2b Pretty print plic attachment		2024-03-24 08:34:20 +00:00
..
compile	Misc changes in RISC-V. Start changing the memory layout, too.	2019-06-01 12:42:27 +00:00
conf	Warn about building a kernel with the wrong toolchain.	2024-02-25 14:27:41 +00:00
dev	Pretty print plic attachment	2024-03-24 08:34:20 +00:00
fdt	Make this compile without MULTIPROCESSOR	2024-01-21 08:48:21 +00:00
include	fix various typos in comments.	2024-02-05 21:46:04 +00:00
riscv	Move the at-shutdown call to resettodr() from cpu_reboot() to kern_reboot().	2024-03-05 14:15:28 +00:00
sifive	risc-v: the SiFive FU[57]40 cache controller is present in the JH71x0 SoCs.	2024-01-14 07:13:15 +00:00
stand	efiboot: Build and install bootriscv64.efi for riscv64 builds.	2021-09-30 20:02:54 +00:00
starfive	Some fixes from Roland Illig	2024-02-08 07:13:10 +00:00
Makefile	riscv: fix build with r/o src tree	2021-10-04 18:16:48 +00:00