msaitoh 1fdbc7c04d Add 0x96(Elkhart Lake) and 0x9c(Jasper Lake). ... Not listed in SDM but listed in those spec update documents.		2021-07-12 12:56:52 +00:00
..
arch	Add 0x96(Elkhart Lake) and 0x9c(Jasper Lake).	2021-07-12 12:56:52 +00:00
Makefile	Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel processors.	2020-04-21 02:56:36 +00:00
cpuctl.8	cpuctl.8: minor fixes	2019-05-17 23:51:35 +00:00
cpuctl.c	Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel processors.	2020-04-21 02:56:36 +00:00
cpuctl.h	Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel processors.	2020-04-21 02:56:36 +00:00