Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel processors.
- If the max CPUID leaf is >= 0x15, take TSC value from CPUID. Some processors can take TSC/core crystal clock ratio but core crystal clock frequency can't be taken. Intel SDM give us the values for some processors. - It also required to change lapic_per_second to make LAPIC timer correctly. - Add new file x86/x86/identcpu_subr.c to share common subroutines between kernel and userland. Some code in x86/x86/identcpu.c and cpuctl/arch/i386.c will be moved to this file in future. - Add comment to clarify.
This commit is contained in:
parent
cd60cc0227
commit
0360a7d374
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@ -1,4 +1,4 @@
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# $NetBSD: files.x86,v 1.107 2019/02/15 08:54:01 nonaka Exp $
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# $NetBSD: files.x86,v 1.108 2020/04/21 02:56:36 msaitoh Exp $
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# options for MP configuration through the MP spec
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defflag opt_mpbios.h MPBIOS MPDEBUG MPBIOS_SCANPCI
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@ -91,6 +91,7 @@ file arch/x86/x86/efi.c machdep
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file arch/x86/x86/errata.c machdep
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file arch/x86/x86/genfb_machdep.c machdep
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file arch/x86/x86/identcpu.c machdep
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file arch/x86/x86/identcpu_subr.c machdep
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file arch/x86/x86/i8259.c machdep
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file arch/x86/x86/intr.c machdep
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file arch/x86/x86/kgdb_machdep.c kgdb
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@ -1,4 +1,4 @@
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/* $NetBSD: apicvar.h,v 1.6 2019/06/14 09:23:42 msaitoh Exp $ */
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/* $NetBSD: apicvar.h,v 1.7 2020/04/21 02:56:37 msaitoh Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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@ -54,4 +54,7 @@ struct apic_attach_args {
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void apic_format_redir(const char *, const char *, int, int, uint32_t,
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uint32_t);
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/* For lapic.c */
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extern uint32_t lapic_per_second;
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#endif /* !_X86_APICVAR_H_ */
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.120 2020/04/13 22:54:11 bouyer Exp $ */
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/* $NetBSD: cpu.h,v 1.121 2020/04/21 02:56:37 msaitoh Exp $ */
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/*
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* Copyright (c) 1990 The Regents of the University of California.
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@ -490,6 +490,9 @@ void cpu_probe(struct cpu_info *);
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void cpu_identify(struct cpu_info *);
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void identify_hypervisor(void);
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/* identcpu_subr.c */
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uint64_t cpu_tsc_freq_cpuid(struct cpu_info *);
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typedef enum vm_guest {
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VM_GUEST_NO = 0,
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VM_GUEST_VM,
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.184 2020/04/20 04:23:23 msaitoh Exp $ */
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/* $NetBSD: cpu.c,v 1.185 2020/04/21 02:56:37 msaitoh Exp $ */
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/*
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* Copyright (c) 2000-2012 NetBSD Foundation, Inc.
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@ -62,7 +62,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.184 2020/04/20 04:23:23 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.185 2020/04/21 02:56:37 msaitoh Exp $");
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#include "opt_ddb.h"
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#include "opt_mpbios.h" /* for MPDEBUG */
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@ -1291,12 +1291,20 @@ cpu_shutdown(device_t dv, int how)
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return cpu_stop(dv);
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}
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/* Get the TSC frequency and set it to ci->ci_data.cpu_cc_freq. */
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void
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cpu_get_tsc_freq(struct cpu_info *ci)
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{
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uint64_t last_tsc;
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uint64_t freq = 0, last_tsc;
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if (cpu_hascounter()) {
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if (cpu_hascounter())
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freq = cpu_tsc_freq_cpuid(ci);
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if (freq != 0) {
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/* Use TSC frequency taken from CPUID. */
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ci->ci_data.cpu_cc_freq = freq;
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} else {
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/* Calibrate TSC frequency. */
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last_tsc = cpu_counter_serializing();
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x86_delay(100000);
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ci->ci_data.cpu_cc_freq =
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@ -1,4 +1,4 @@
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/* $NetBSD: hyperv.c,v 1.6 2019/12/07 11:45:45 nonaka Exp $ */
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/* $NetBSD: hyperv.c,v 1.7 2020/04/21 02:56:37 msaitoh Exp $ */
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/*-
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* Copyright (c) 2009-2012,2016-2017 Microsoft Corp.
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@ -33,7 +33,7 @@
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*/
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#include <sys/cdefs.h>
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#ifdef __KERNEL_RCSID
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__KERNEL_RCSID(0, "$NetBSD: hyperv.c,v 1.6 2019/12/07 11:45:45 nonaka Exp $");
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__KERNEL_RCSID(0, "$NetBSD: hyperv.c,v 1.7 2020/04/21 02:56:37 msaitoh Exp $");
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#endif
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#ifdef __FBSDID
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__FBSDID("$FreeBSD: head/sys/dev/hyperv/vmbus/hyperv.c 331757 2018-03-30 02:25:12Z emaste $");
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@ -67,6 +67,7 @@ __FBSDID("$FreeBSD: head/sys/dev/hyperv/vmbus/hyperv.c 331757 2018-03-30 02:25:1
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#include <machine/cputypes.h>
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#include <machine/cpuvar.h>
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#include <machine/cpu_counter.h>
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#include <x86/apicvar.h>
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#include <x86/efi.h>
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#include <dev/wsfb/genfbvar.h>
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#if NLAPIC > 0
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if ((hyperv_features & CPUID_HV_MSR_TIME_FREQ) &&
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(hyperv_features3 & CPUID3_HV_TIME_FREQ)) {
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extern uint32_t lapic_per_second;
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(hyperv_features3 & CPUID3_HV_TIME_FREQ))
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lapic_per_second = rdmsr(MSR_HV_APIC_FREQUENCY);
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}
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#endif
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return hyperv_init_hypercall();
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@ -0,0 +1,146 @@
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/*-
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* Copyright (c) 2020 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Masanobu SAITOH.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Subroutines for CPU.
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* This file is shared between kernel and userland.
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* See src/usr.sbin/cpuctl/{Makefile, arch/i386.c}).
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: identcpu_subr.c,v 1.1 2020/04/21 02:56:37 msaitoh Exp $");
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#ifdef _KERNEL_OPT
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#include "lapic.h"
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#endif
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#include <sys/param.h>
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#ifdef _KERNEL
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#include <sys/systm.h>
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#include <x86/cpuvar.h>
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#include <x86/apicvar.h>
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#include <machine/cpufunc.h>
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#include <machine/cputypes.h>
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#include <machine/specialreg.h>
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#else
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#include <stdarg.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "cpuctl.h"
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#include "cpuctl_i386.h"
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#endif
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uint64_t
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cpu_tsc_freq_cpuid(struct cpu_info *ci)
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{
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uint64_t freq = 0, khz;
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uint32_t descs[4];
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uint32_t denominator, numerator;
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if (!((ci->ci_max_cpuid >= 0x15) && (cpu_vendor == CPUVENDOR_INTEL)))
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return 0;
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x86_cpuid(0x15, descs);
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denominator = descs[0];
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numerator = descs[1];
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if ((denominator == 0) || numerator == 0) {
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aprint_debug_dev(ci->ci_dev,
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"TSC/core crystal clock ratio is not enumerated\n");
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} else {
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khz = 0;
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if (descs[2] != 0)
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khz = descs[2] / 1000;
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else if (CPUID_TO_FAMILY(ci->ci_signature) == 6) {
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/*
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* Table 18-85 Nominal Core Crystal Clock Frequency,
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* 18.7.3 Determining the Processor Base Frequency,
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* Intel SDM.
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*/
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switch (CPUID_TO_MODEL(ci->ci_signature)) {
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case 0x55: /* Xeon Scalable */
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case 0x5f: /*
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* Atom Goldmont (Denverton). Right?
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* XXX Not documented!
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*/
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khz = 25000; /* 25.0 MHz */
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break;
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case 0x4e: /* 7th gen Core (Skylake) */
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case 0x5e: /* 7th gen Core (Skylake) */
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case 0x8e: /* 8th gen Core (Kaby Lake) */
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case 0x9e: /* 8th gen Core (Kaby Lake) */
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khz = 24000; /* 24.0 MHz */
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break;
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case 0x5c: /* Atom Goldmont */
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khz = 19200; /* 19.2 MHz */
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break;
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default: /* Unknown */
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break;
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}
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}
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freq = khz * 1000 * numerator / denominator;
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if (ci->ci_max_cpuid >= 0x16) {
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x86_cpuid(0x16, descs);
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if (descs[0] != 0) {
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aprint_verbose_dev(ci->ci_dev,
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"CPU base freq %" PRIu64 "\n",
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(uint64_t)descs[0] * 1000000);
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/*
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* If we couldn't get frequency from
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* CPUID 0x15, use CPUID 0x16 EAX.
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*/
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if (freq == 0) {
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khz = (uint64_t)descs[0] * 1000
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* denominator / numerator;
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freq = (uint64_t)descs[0] * 1000000;
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}
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}
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if (descs[1] != 0) {
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aprint_verbose_dev(ci->ci_dev,
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"CPU max freq %" PRIu64 "\n",
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(uint64_t)descs[1] * 1000000);
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}
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}
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#if defined(_KERNEL) && NLAPIC > 0
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if ((khz != 0) && (lapic_per_second == 0)) {
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lapic_per_second = khz * 1000;
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aprint_debug_dev(ci->ci_dev,
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"lapic_per_second set to %" PRIu32 "\n",
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lapic_per_second);
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}
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#endif
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}
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if (freq != 0)
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aprint_verbose_dev(ci->ci_dev, "TSC freq %" PRIu64 "\n",
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freq);
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return freq;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: tsc.c,v 1.40 2020/04/06 09:24:50 msaitoh Exp $ */
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/* $NetBSD: tsc.c,v 1.41 2020/04/21 02:56:37 msaitoh Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.40 2020/04/06 09:24:50 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.41 2020/04/21 02:56:37 msaitoh Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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return invariant;
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}
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/*
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* Initialize timecounter(9) of TSC.
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* This function is called after all secondary processors were up and
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* calculated the drift.
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*/
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void
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tsc_tc_init(void)
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{
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@ -1,4 +1,4 @@
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# $NetBSD: files.xen,v 1.180 2020/04/03 22:45:30 ad Exp $
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# $NetBSD: files.xen,v 1.181 2020/04/21 02:56:37 msaitoh Exp $
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# NetBSD: files.x86,v 1.10 2003/10/08 17:30:00 bouyer Exp
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# NetBSD: files.i386,v 1.254 2004/03/25 23:32:10 jmc Exp
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@ -144,6 +144,7 @@ file arch/x86/x86/bus_space.c machdep
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file arch/xen/x86/consinit.c machdep & xenpv
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file arch/x86/x86/consinit.c machdep & xenpvhvm
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file arch/x86/x86/identcpu.c machdep
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file arch/x86/x86/identcpu_subr.c machdep
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file arch/xen/x86/pintr.c machdep & dom0ops & xenpv
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file arch/xen/x86/xen_ipi.c multiprocessor & xenpv
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file arch/x86/x86/idt.c machdep
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@ -1,4 +1,4 @@
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# $NetBSD: Makefile,v 1.8 2016/01/23 21:22:50 christos Exp $
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# $NetBSD: Makefile,v 1.9 2020/04/21 02:56:37 msaitoh Exp $
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.include <bsd.own.mk>
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@ -19,6 +19,12 @@ SRCS+= noarch.c
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SRCS+= ${MACHINE_ARCH}-asm.S
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.endif
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.if ${MACHINE_ARCH} == "x86_64" || ${MACHINE_ARCH} == "i386"
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CPPFLAGS+= -I${.CURDIR} -I${.CURDIR}/arch
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.PATH.c: ${NETBSDSRCDIR}/sys/arch/x86/x86
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SRCS+= identcpu_subr.c
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.endif
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CPPFLAGS+= -D_KERNTYPES
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LDADD+=-lutil
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DPADD+=${LIBUTIL}
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@ -1,4 +1,50 @@
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/* $NetBSD: cpuctl_i386.h,v 1.4 2019/05/21 05:29:21 mlelstv Exp $ */
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/* $NetBSD: cpuctl_i386.h,v 1.5 2020/04/21 02:56:37 msaitoh Exp $ */
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#include <machine/specialreg.h>
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#include <x86/cputypes.h>
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#include <x86/cacheinfo.h>
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struct cpu_info {
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const char *ci_dev;
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int32_t ci_cpu_type; /* for cpu's without cpuid */
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uint32_t ci_signature; /* X86 cpuid type */
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uint32_t ci_vendor[4]; /* vendor string */
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int32_t ci_max_cpuid; /* highest cpuid supported */
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uint32_t ci_max_ext_cpuid; /* highest cpuid extended func lv */
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uint32_t ci_family; /* from ci_signature */
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uint32_t ci_model; /* from ci_signature */
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uint32_t ci_feat_val[10]; /* X86 CPUID feature bits
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* [0] basic features %edx
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* [1] basic features %ecx
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* [2] extended features %edx
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* [3] extended features %ecx
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* [4] VIA padlock features
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* [5] structure ext. feat. %ebx
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* [6] structure ext. feat. %ecx
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* [7] structure ext. feat. %edx
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* [8] XCR0 bits (d:0 %eax)
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* [9] xsave flags (d:1 %eax)
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*/
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uint32_t ci_cpu_class; /* CPU class */
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uint32_t ci_brand_id; /* Intel brand id */
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uint32_t ci_cpu_serial[3]; /* PIII serial number */
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uint64_t ci_tsc_freq; /* cpu cycles/second */
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uint8_t ci_packageid;
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uint8_t ci_coreid;
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uint8_t ci_smtid;
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uint32_t ci_initapicid; /* our initial APIC ID */
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uint32_t ci_cur_xsave;
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uint32_t ci_max_xsave;
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struct x86_cache_info ci_cinfo[CAI_COUNT];
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void (*ci_info)(struct cpu_info *);
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};
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extern int cpu_vendor;
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/* For x86/x86/identcpu_subr.c */
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uint64_t cpu_tsc_freq_cpuid(struct cpu_info *);
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/* Interfaces to code in i386-asm.S */
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@ -1,4 +1,4 @@
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/* $NetBSD: i386.c,v 1.111 2020/04/16 01:52:34 msaitoh Exp $ */
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/* $NetBSD: i386.c,v 1.112 2020/04/21 02:56:37 msaitoh Exp $ */
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/*-
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* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
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|
@ -57,7 +57,7 @@
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#include <sys/cdefs.h>
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#ifndef lint
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__RCSID("$NetBSD: i386.c,v 1.111 2020/04/16 01:52:34 msaitoh Exp $");
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__RCSID("$NetBSD: i386.c,v 1.112 2020/04/21 02:56:37 msaitoh Exp $");
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#endif /* not lint */
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#include <sys/types.h>
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|
@ -81,7 +81,6 @@ __RCSID("$NetBSD: i386.c,v 1.111 2020/04/16 01:52:34 msaitoh Exp $");
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|
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#include <x86/cpuvar.h>
|
||||
#include <x86/cputypes.h>
|
||||
#include <x86/cacheinfo.h>
|
||||
#include <x86/cpu_ucode.h>
|
||||
|
||||
#include "../cpuctl.h"
|
||||
|
@ -90,43 +89,6 @@ __RCSID("$NetBSD: i386.c,v 1.111 2020/04/16 01:52:34 msaitoh Exp $");
|
|||
/* Size of buffer for printing humanized numbers */
|
||||
#define HUMAN_BUFSIZE sizeof("999KB")
|
||||
|
||||
struct cpu_info {
|
||||
const char *ci_dev;
|
||||
int32_t ci_cpu_type; /* for cpu's without cpuid */
|
||||
uint32_t ci_signature; /* X86 cpuid type */
|
||||
uint32_t ci_vendor[4]; /* vendor string */
|
||||
int32_t ci_max_cpuid; /* highest cpuid supported */
|
||||
uint32_t ci_max_ext_cpuid; /* highest cpuid extended func lv */
|
||||
uint32_t ci_family; /* from ci_signature */
|
||||
uint32_t ci_model; /* from ci_signature */
|
||||
uint32_t ci_feat_val[10]; /* X86 CPUID feature bits
|
||||
* [0] basic features %edx
|
||||
* [1] basic features %ecx
|
||||
* [2] extended features %edx
|
||||
* [3] extended features %ecx
|
||||
* [4] VIA padlock features
|
||||
* [5] structure ext. feat. %ebx
|
||||
* [6] structure ext. feat. %ecx
|
||||
* [7] structure ext. feat. %edx
|
||||
* [8] XCR0 bits (d:0 %eax)
|
||||
* [9] xsave flags (d:1 %eax)
|
||||
*/
|
||||
uint32_t ci_cpu_class; /* CPU class */
|
||||
uint32_t ci_brand_id; /* Intel brand id */
|
||||
uint32_t ci_cpu_serial[3]; /* PIII serial number */
|
||||
uint64_t ci_tsc_freq; /* cpu cycles/second */
|
||||
uint8_t ci_packageid;
|
||||
uint8_t ci_coreid;
|
||||
uint8_t ci_smtid;
|
||||
uint32_t ci_initapicid; /* our initial APIC ID */
|
||||
|
||||
uint32_t ci_cur_xsave;
|
||||
uint32_t ci_max_xsave;
|
||||
|
||||
struct x86_cache_info ci_cinfo[CAI_COUNT];
|
||||
void (*ci_info)(struct cpu_info *);
|
||||
};
|
||||
|
||||
struct cpu_nocpuid_nameclass {
|
||||
int cpu_vendor;
|
||||
const char *cpu_vendorname;
|
||||
|
@ -197,7 +159,7 @@ static const char * const amd_brand[] = {
|
|||
"4" /* AMD Athlon(tm) 4 */
|
||||
};
|
||||
|
||||
static int cpu_vendor;
|
||||
int cpu_vendor;
|
||||
static char cpu_brand_string[49];
|
||||
static char amd_brand_name[48];
|
||||
static int use_pae, largepagesize;
|
||||
|
@ -2164,6 +2126,8 @@ identifycpu(int fd, const char *cpuname)
|
|||
(((uintmax_t)ci->ci_tsc_freq + 4999) / 10000) % 100);
|
||||
aprint_normal("\n");
|
||||
|
||||
(void)cpu_tsc_freq_cpuid(ci);
|
||||
|
||||
aprint_normal_dev(ci->ci_dev, "family %#x model %#x stepping %#x",
|
||||
ci->ci_family, ci->ci_model, CPUID_TO_STEPPING(ci->ci_signature));
|
||||
if (ci->ci_signature != 0)
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: cpuctl.c,v 1.30 2019/05/11 11:59:21 maxv Exp $ */
|
||||
/* $NetBSD: cpuctl.c,v 1.31 2020/04/21 02:56:37 msaitoh Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2007, 2008, 2009, 2012, 2015 The NetBSD Foundation, Inc.
|
||||
|
@ -31,7 +31,7 @@
|
|||
|
||||
#ifndef lint
|
||||
#include <sys/cdefs.h>
|
||||
__RCSID("$NetBSD: cpuctl.c,v 1.30 2019/05/11 11:59:21 maxv Exp $");
|
||||
__RCSID("$NetBSD: cpuctl.c,v 1.31 2020/04/21 02:56:37 msaitoh Exp $");
|
||||
#endif /* not lint */
|
||||
|
||||
#include <sys/param.h>
|
||||
|
@ -382,3 +382,4 @@ aprint_normal_dev(const char *dev, const char *fmt, ...)
|
|||
}
|
||||
__strong_alias(aprint_verbose_dev,aprint_normal_dev)
|
||||
__strong_alias(aprint_error_dev,aprint_normal_dev)
|
||||
__strong_alias(aprint_debug_dev,aprint_normal_dev)
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: cpuctl.h,v 1.6 2018/01/16 08:23:18 mrg Exp $ */
|
||||
/* $NetBSD: cpuctl.h,v 1.7 2020/04/21 02:56:37 msaitoh Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2008 The NetBSD Foundation, Inc.
|
||||
|
@ -26,12 +26,15 @@
|
|||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/cpuio.h>
|
||||
|
||||
int aprint_normal(const char *, ...) __printflike(1, 2);
|
||||
int aprint_verbose(const char *, ...) __printflike(1, 2);
|
||||
int aprint_error(const char *, ...) __printflike(1, 2);
|
||||
int aprint_normal_dev(const char *, const char *, ...) __printflike(2, 3);
|
||||
int aprint_verbose_dev(const char *, const char *, ...) __printflike(2, 3);
|
||||
int aprint_error_dev(const char *, const char *, ...) __printflike(2, 3);
|
||||
int aprint_debug_dev(const char *, const char *, ...) __printflike(2, 3);
|
||||
|
||||
void identifycpu(int, const char *);
|
||||
bool identifycpu_bind(void);
|
||||
|
|
Loading…
Reference in New Issue