Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel processors.

- If the max CPUID leaf is >= 0x15, take TSC value from CPUID. Some processors
   can take TSC/core crystal clock ratio but core crystal clock frequency
   can't be taken. Intel SDM give us the values for some processors.
 - It also required to change lapic_per_second to make LAPIC timer correctly.
 - Add new file x86/x86/identcpu_subr.c to share common subroutines between
   kernel and userland. Some code in x86/x86/identcpu.c and cpuctl/arch/i386.c
   will be moved to this file in future.
 - Add comment to clarify.
This commit is contained in:
msaitoh 2020-04-21 02:56:36 +00:00
parent cd60cc0227
commit 0360a7d374
13 changed files with 247 additions and 62 deletions

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@ -1,4 +1,4 @@
# $NetBSD: files.x86,v 1.107 2019/02/15 08:54:01 nonaka Exp $
# $NetBSD: files.x86,v 1.108 2020/04/21 02:56:36 msaitoh Exp $
# options for MP configuration through the MP spec
defflag opt_mpbios.h MPBIOS MPDEBUG MPBIOS_SCANPCI
@ -91,6 +91,7 @@ file arch/x86/x86/efi.c machdep
file arch/x86/x86/errata.c machdep
file arch/x86/x86/genfb_machdep.c machdep
file arch/x86/x86/identcpu.c machdep
file arch/x86/x86/identcpu_subr.c machdep
file arch/x86/x86/i8259.c machdep
file arch/x86/x86/intr.c machdep
file arch/x86/x86/kgdb_machdep.c kgdb

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@ -1,4 +1,4 @@
/* $NetBSD: apicvar.h,v 1.6 2019/06/14 09:23:42 msaitoh Exp $ */
/* $NetBSD: apicvar.h,v 1.7 2020/04/21 02:56:37 msaitoh Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@ -54,4 +54,7 @@ struct apic_attach_args {
void apic_format_redir(const char *, const char *, int, int, uint32_t,
uint32_t);
/* For lapic.c */
extern uint32_t lapic_per_second;
#endif /* !_X86_APICVAR_H_ */

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@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.120 2020/04/13 22:54:11 bouyer Exp $ */
/* $NetBSD: cpu.h,v 1.121 2020/04/21 02:56:37 msaitoh Exp $ */
/*
* Copyright (c) 1990 The Regents of the University of California.
@ -490,6 +490,9 @@ void cpu_probe(struct cpu_info *);
void cpu_identify(struct cpu_info *);
void identify_hypervisor(void);
/* identcpu_subr.c */
uint64_t cpu_tsc_freq_cpuid(struct cpu_info *);
typedef enum vm_guest {
VM_GUEST_NO = 0,
VM_GUEST_VM,

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@ -1,4 +1,4 @@
/* $NetBSD: cpu.c,v 1.184 2020/04/20 04:23:23 msaitoh Exp $ */
/* $NetBSD: cpu.c,v 1.185 2020/04/21 02:56:37 msaitoh Exp $ */
/*
* Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@ -62,7 +62,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.184 2020/04/20 04:23:23 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.185 2020/04/21 02:56:37 msaitoh Exp $");
#include "opt_ddb.h"
#include "opt_mpbios.h" /* for MPDEBUG */
@ -1291,12 +1291,20 @@ cpu_shutdown(device_t dv, int how)
return cpu_stop(dv);
}
/* Get the TSC frequency and set it to ci->ci_data.cpu_cc_freq. */
void
cpu_get_tsc_freq(struct cpu_info *ci)
{
uint64_t last_tsc;
uint64_t freq = 0, last_tsc;
if (cpu_hascounter()) {
if (cpu_hascounter())
freq = cpu_tsc_freq_cpuid(ci);
if (freq != 0) {
/* Use TSC frequency taken from CPUID. */
ci->ci_data.cpu_cc_freq = freq;
} else {
/* Calibrate TSC frequency. */
last_tsc = cpu_counter_serializing();
x86_delay(100000);
ci->ci_data.cpu_cc_freq =

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@ -1,4 +1,4 @@
/* $NetBSD: hyperv.c,v 1.6 2019/12/07 11:45:45 nonaka Exp $ */
/* $NetBSD: hyperv.c,v 1.7 2020/04/21 02:56:37 msaitoh Exp $ */
/*-
* Copyright (c) 2009-2012,2016-2017 Microsoft Corp.
@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
#ifdef __KERNEL_RCSID
__KERNEL_RCSID(0, "$NetBSD: hyperv.c,v 1.6 2019/12/07 11:45:45 nonaka Exp $");
__KERNEL_RCSID(0, "$NetBSD: hyperv.c,v 1.7 2020/04/21 02:56:37 msaitoh Exp $");
#endif
#ifdef __FBSDID
__FBSDID("$FreeBSD: head/sys/dev/hyperv/vmbus/hyperv.c 331757 2018-03-30 02:25:12Z emaste $");
@ -67,6 +67,7 @@ __FBSDID("$FreeBSD: head/sys/dev/hyperv/vmbus/hyperv.c 331757 2018-03-30 02:25:1
#include <machine/cputypes.h>
#include <machine/cpuvar.h>
#include <machine/cpu_counter.h>
#include <x86/apicvar.h>
#include <x86/efi.h>
#include <dev/wsfb/genfbvar.h>
@ -571,11 +572,8 @@ hyperv_init(void)
#if NLAPIC > 0
if ((hyperv_features & CPUID_HV_MSR_TIME_FREQ) &&
(hyperv_features3 & CPUID3_HV_TIME_FREQ)) {
extern uint32_t lapic_per_second;
(hyperv_features3 & CPUID3_HV_TIME_FREQ))
lapic_per_second = rdmsr(MSR_HV_APIC_FREQUENCY);
}
#endif
return hyperv_init_hypercall();

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@ -0,0 +1,146 @@
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Masanobu SAITOH.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Subroutines for CPU.
* This file is shared between kernel and userland.
* See src/usr.sbin/cpuctl/{Makefile, arch/i386.c}).
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: identcpu_subr.c,v 1.1 2020/04/21 02:56:37 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "lapic.h"
#endif
#include <sys/param.h>
#ifdef _KERNEL
#include <sys/systm.h>
#include <x86/cpuvar.h>
#include <x86/apicvar.h>
#include <machine/cpufunc.h>
#include <machine/cputypes.h>
#include <machine/specialreg.h>
#else
#include <stdarg.h>
#include <stdbool.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "cpuctl.h"
#include "cpuctl_i386.h"
#endif
uint64_t
cpu_tsc_freq_cpuid(struct cpu_info *ci)
{
uint64_t freq = 0, khz;
uint32_t descs[4];
uint32_t denominator, numerator;
if (!((ci->ci_max_cpuid >= 0x15) && (cpu_vendor == CPUVENDOR_INTEL)))
return 0;
x86_cpuid(0x15, descs);
denominator = descs[0];
numerator = descs[1];
if ((denominator == 0) || numerator == 0) {
aprint_debug_dev(ci->ci_dev,
"TSC/core crystal clock ratio is not enumerated\n");
} else {
khz = 0;
if (descs[2] != 0)
khz = descs[2] / 1000;
else if (CPUID_TO_FAMILY(ci->ci_signature) == 6) {
/*
* Table 18-85 Nominal Core Crystal Clock Frequency,
* 18.7.3 Determining the Processor Base Frequency,
* Intel SDM.
*/
switch (CPUID_TO_MODEL(ci->ci_signature)) {
case 0x55: /* Xeon Scalable */
case 0x5f: /*
* Atom Goldmont (Denverton). Right?
* XXX Not documented!
*/
khz = 25000; /* 25.0 MHz */
break;
case 0x4e: /* 7th gen Core (Skylake) */
case 0x5e: /* 7th gen Core (Skylake) */
case 0x8e: /* 8th gen Core (Kaby Lake) */
case 0x9e: /* 8th gen Core (Kaby Lake) */
khz = 24000; /* 24.0 MHz */
break;
case 0x5c: /* Atom Goldmont */
khz = 19200; /* 19.2 MHz */
break;
default: /* Unknown */
break;
}
}
freq = khz * 1000 * numerator / denominator;
if (ci->ci_max_cpuid >= 0x16) {
x86_cpuid(0x16, descs);
if (descs[0] != 0) {
aprint_verbose_dev(ci->ci_dev,
"CPU base freq %" PRIu64 "\n",
(uint64_t)descs[0] * 1000000);
/*
* If we couldn't get frequency from
* CPUID 0x15, use CPUID 0x16 EAX.
*/
if (freq == 0) {
khz = (uint64_t)descs[0] * 1000
* denominator / numerator;
freq = (uint64_t)descs[0] * 1000000;
}
}
if (descs[1] != 0) {
aprint_verbose_dev(ci->ci_dev,
"CPU max freq %" PRIu64 "\n",
(uint64_t)descs[1] * 1000000);
}
}
#if defined(_KERNEL) && NLAPIC > 0
if ((khz != 0) && (lapic_per_second == 0)) {
lapic_per_second = khz * 1000;
aprint_debug_dev(ci->ci_dev,
"lapic_per_second set to %" PRIu32 "\n",
lapic_per_second);
}
#endif
}
if (freq != 0)
aprint_verbose_dev(ci->ci_dev, "TSC freq %" PRIu64 "\n",
freq);
return freq;
}

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@ -1,4 +1,4 @@
/* $NetBSD: tsc.c,v 1.40 2020/04/06 09:24:50 msaitoh Exp $ */
/* $NetBSD: tsc.c,v 1.41 2020/04/21 02:56:37 msaitoh Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.40 2020/04/06 09:24:50 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.41 2020/04/21 02:56:37 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -142,6 +142,11 @@ tsc_is_invariant(void)
return invariant;
}
/*
* Initialize timecounter(9) of TSC.
* This function is called after all secondary processors were up and
* calculated the drift.
*/
void
tsc_tc_init(void)
{

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@ -1,4 +1,4 @@
# $NetBSD: files.xen,v 1.180 2020/04/03 22:45:30 ad Exp $
# $NetBSD: files.xen,v 1.181 2020/04/21 02:56:37 msaitoh Exp $
# NetBSD: files.x86,v 1.10 2003/10/08 17:30:00 bouyer Exp
# NetBSD: files.i386,v 1.254 2004/03/25 23:32:10 jmc Exp
@ -144,6 +144,7 @@ file arch/x86/x86/bus_space.c machdep
file arch/xen/x86/consinit.c machdep & xenpv
file arch/x86/x86/consinit.c machdep & xenpvhvm
file arch/x86/x86/identcpu.c machdep
file arch/x86/x86/identcpu_subr.c machdep
file arch/xen/x86/pintr.c machdep & dom0ops & xenpv
file arch/xen/x86/xen_ipi.c multiprocessor & xenpv
file arch/x86/x86/idt.c machdep

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@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.8 2016/01/23 21:22:50 christos Exp $
# $NetBSD: Makefile,v 1.9 2020/04/21 02:56:37 msaitoh Exp $
.include <bsd.own.mk>
@ -19,6 +19,12 @@ SRCS+= noarch.c
SRCS+= ${MACHINE_ARCH}-asm.S
.endif
.if ${MACHINE_ARCH} == "x86_64" || ${MACHINE_ARCH} == "i386"
CPPFLAGS+= -I${.CURDIR} -I${.CURDIR}/arch
.PATH.c: ${NETBSDSRCDIR}/sys/arch/x86/x86
SRCS+= identcpu_subr.c
.endif
CPPFLAGS+= -D_KERNTYPES
LDADD+=-lutil
DPADD+=${LIBUTIL}

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@ -1,4 +1,50 @@
/* $NetBSD: cpuctl_i386.h,v 1.4 2019/05/21 05:29:21 mlelstv Exp $ */
/* $NetBSD: cpuctl_i386.h,v 1.5 2020/04/21 02:56:37 msaitoh Exp $ */
#include <machine/specialreg.h>
#include <x86/cputypes.h>
#include <x86/cacheinfo.h>
struct cpu_info {
const char *ci_dev;
int32_t ci_cpu_type; /* for cpu's without cpuid */
uint32_t ci_signature; /* X86 cpuid type */
uint32_t ci_vendor[4]; /* vendor string */
int32_t ci_max_cpuid; /* highest cpuid supported */
uint32_t ci_max_ext_cpuid; /* highest cpuid extended func lv */
uint32_t ci_family; /* from ci_signature */
uint32_t ci_model; /* from ci_signature */
uint32_t ci_feat_val[10]; /* X86 CPUID feature bits
* [0] basic features %edx
* [1] basic features %ecx
* [2] extended features %edx
* [3] extended features %ecx
* [4] VIA padlock features
* [5] structure ext. feat. %ebx
* [6] structure ext. feat. %ecx
* [7] structure ext. feat. %edx
* [8] XCR0 bits (d:0 %eax)
* [9] xsave flags (d:1 %eax)
*/
uint32_t ci_cpu_class; /* CPU class */
uint32_t ci_brand_id; /* Intel brand id */
uint32_t ci_cpu_serial[3]; /* PIII serial number */
uint64_t ci_tsc_freq; /* cpu cycles/second */
uint8_t ci_packageid;
uint8_t ci_coreid;
uint8_t ci_smtid;
uint32_t ci_initapicid; /* our initial APIC ID */
uint32_t ci_cur_xsave;
uint32_t ci_max_xsave;
struct x86_cache_info ci_cinfo[CAI_COUNT];
void (*ci_info)(struct cpu_info *);
};
extern int cpu_vendor;
/* For x86/x86/identcpu_subr.c */
uint64_t cpu_tsc_freq_cpuid(struct cpu_info *);
/* Interfaces to code in i386-asm.S */

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@ -1,4 +1,4 @@
/* $NetBSD: i386.c,v 1.111 2020/04/16 01:52:34 msaitoh Exp $ */
/* $NetBSD: i386.c,v 1.112 2020/04/21 02:56:37 msaitoh Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@ -57,7 +57,7 @@
#include <sys/cdefs.h>
#ifndef lint
__RCSID("$NetBSD: i386.c,v 1.111 2020/04/16 01:52:34 msaitoh Exp $");
__RCSID("$NetBSD: i386.c,v 1.112 2020/04/21 02:56:37 msaitoh Exp $");
#endif /* not lint */
#include <sys/types.h>
@ -81,7 +81,6 @@ __RCSID("$NetBSD: i386.c,v 1.111 2020/04/16 01:52:34 msaitoh Exp $");
#include <x86/cpuvar.h>
#include <x86/cputypes.h>
#include <x86/cacheinfo.h>
#include <x86/cpu_ucode.h>
#include "../cpuctl.h"
@ -90,43 +89,6 @@ __RCSID("$NetBSD: i386.c,v 1.111 2020/04/16 01:52:34 msaitoh Exp $");
/* Size of buffer for printing humanized numbers */
#define HUMAN_BUFSIZE sizeof("999KB")
struct cpu_info {
const char *ci_dev;
int32_t ci_cpu_type; /* for cpu's without cpuid */
uint32_t ci_signature; /* X86 cpuid type */
uint32_t ci_vendor[4]; /* vendor string */
int32_t ci_max_cpuid; /* highest cpuid supported */
uint32_t ci_max_ext_cpuid; /* highest cpuid extended func lv */
uint32_t ci_family; /* from ci_signature */
uint32_t ci_model; /* from ci_signature */
uint32_t ci_feat_val[10]; /* X86 CPUID feature bits
* [0] basic features %edx
* [1] basic features %ecx
* [2] extended features %edx
* [3] extended features %ecx
* [4] VIA padlock features
* [5] structure ext. feat. %ebx
* [6] structure ext. feat. %ecx
* [7] structure ext. feat. %edx
* [8] XCR0 bits (d:0 %eax)
* [9] xsave flags (d:1 %eax)
*/
uint32_t ci_cpu_class; /* CPU class */
uint32_t ci_brand_id; /* Intel brand id */
uint32_t ci_cpu_serial[3]; /* PIII serial number */
uint64_t ci_tsc_freq; /* cpu cycles/second */
uint8_t ci_packageid;
uint8_t ci_coreid;
uint8_t ci_smtid;
uint32_t ci_initapicid; /* our initial APIC ID */
uint32_t ci_cur_xsave;
uint32_t ci_max_xsave;
struct x86_cache_info ci_cinfo[CAI_COUNT];
void (*ci_info)(struct cpu_info *);
};
struct cpu_nocpuid_nameclass {
int cpu_vendor;
const char *cpu_vendorname;
@ -197,7 +159,7 @@ static const char * const amd_brand[] = {
"4" /* AMD Athlon(tm) 4 */
};
static int cpu_vendor;
int cpu_vendor;
static char cpu_brand_string[49];
static char amd_brand_name[48];
static int use_pae, largepagesize;
@ -2164,6 +2126,8 @@ identifycpu(int fd, const char *cpuname)
(((uintmax_t)ci->ci_tsc_freq + 4999) / 10000) % 100);
aprint_normal("\n");
(void)cpu_tsc_freq_cpuid(ci);
aprint_normal_dev(ci->ci_dev, "family %#x model %#x stepping %#x",
ci->ci_family, ci->ci_model, CPUID_TO_STEPPING(ci->ci_signature));
if (ci->ci_signature != 0)

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@ -1,4 +1,4 @@
/* $NetBSD: cpuctl.c,v 1.30 2019/05/11 11:59:21 maxv Exp $ */
/* $NetBSD: cpuctl.c,v 1.31 2020/04/21 02:56:37 msaitoh Exp $ */
/*-
* Copyright (c) 2007, 2008, 2009, 2012, 2015 The NetBSD Foundation, Inc.
@ -31,7 +31,7 @@
#ifndef lint
#include <sys/cdefs.h>
__RCSID("$NetBSD: cpuctl.c,v 1.30 2019/05/11 11:59:21 maxv Exp $");
__RCSID("$NetBSD: cpuctl.c,v 1.31 2020/04/21 02:56:37 msaitoh Exp $");
#endif /* not lint */
#include <sys/param.h>
@ -382,3 +382,4 @@ aprint_normal_dev(const char *dev, const char *fmt, ...)
}
__strong_alias(aprint_verbose_dev,aprint_normal_dev)
__strong_alias(aprint_error_dev,aprint_normal_dev)
__strong_alias(aprint_debug_dev,aprint_normal_dev)

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@ -1,4 +1,4 @@
/* $NetBSD: cpuctl.h,v 1.6 2018/01/16 08:23:18 mrg Exp $ */
/* $NetBSD: cpuctl.h,v 1.7 2020/04/21 02:56:37 msaitoh Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@ -26,12 +26,15 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cpuio.h>
int aprint_normal(const char *, ...) __printflike(1, 2);
int aprint_verbose(const char *, ...) __printflike(1, 2);
int aprint_error(const char *, ...) __printflike(1, 2);
int aprint_normal_dev(const char *, const char *, ...) __printflike(2, 3);
int aprint_verbose_dev(const char *, const char *, ...) __printflike(2, 3);
int aprint_error_dev(const char *, const char *, ...) __printflike(2, 3);
int aprint_debug_dev(const char *, const char *, ...) __printflike(2, 3);
void identifycpu(int, const char *);
bool identifycpu_bind(void);