msaitoh 774fa17d8b Add 0xa5 and 0xa6 for Comet Lake.		2020-06-01 08:33:40 +00:00
..
aarch64.c	Teach cpuctl(8) about ARMv8.5-RNG RNDR/RNDRRS support.	2020-05-10 21:42:05 +00:00
arm.c	- enlarge buffer to avoid snprintf() truncation	2019-02-03 10:48:46 +00:00
cpuctl_i386.h	Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel processors.	2020-04-21 02:56:36 +00:00
i386-asm.S	All MSRs can only be read at privilege level 0. The exact APIC ID cannot	2019-05-21 05:29:21 +00:00
i386.c	Add 0xa5 and 0xa6 for Comet Lake.	2020-06-01 08:33:40 +00:00
noarch.c	…
sparc.c	…
sparc64.c	…
x86_64-asm.S	All MSRs can only be read at privilege level 0. The exact APIC ID cannot	2019-05-21 05:29:21 +00:00
x86_64.c	…