165d4e6d83
Because pre-v6 ARM lacks support for an atomic compare-and-swap, we implement _lock_cas() as a restartable atomic squence that is checked in the IRQ handler right before AST processing. (This is safe because, for all practical purposes, there are no SMP pre-v6 ARM systems.) This can serve as a model for other non-MP platforms that lack the necessary atomic operations for mutexes (SuperH, for example). Upshots of this change: - kmutex_t is now down to 8 bytes on ARM; about as good as we can get. - ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes. The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK. That is left as an exercise for the port maintainer. Reviewed and tested by Matt Thomas. |
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genassym.cf | ||
sa11x0_com.c | ||
sa11x0_comreg.h | ||
sa11x0_comvar.h | ||
sa11x0_dmacreg.h | ||
sa11x0_gpioreg.h | ||
sa11x0_io_asm.S | ||
sa11x0_io.c | ||
sa11x0_irq.S | ||
sa11x0_irqhandler.c | ||
sa11x0_mcpreg.h | ||
sa11x0_ost.c | ||
sa11x0_ostreg.h | ||
sa11x0_ppcreg.h | ||
sa11x0_reg.h | ||
sa11x0_sspreg.h | ||
sa11x0_var.h | ||
sa11x0.c | ||
sa11x1_pcic.c | ||
sa11x1_pcicreg.h | ||
sa11x1_pcicvar.h | ||
sa11xx_pcic.c | ||
sa11xx_pcicreg.h | ||
sa11xx_pcicvar.h | ||
sa1111_kbc.c | ||
sa1111_reg.h | ||
sa1111_var.h | ||
sa1111.c |