NetBSD/sys/arch/sparc64/include/pci_machdep.h
mrg 03adf4aad1 PCI driver for the UltraSPARC. this only works on the Ultra5/10 machines
(`SUNW,sabre') for now, and it doesn't really quite work there yet anyway.
the bus space/dma code is cloned from the sbus driver.  the IOMMU code also
is cloned from the sbus code, but separated out into iommu.c so that we can
share it with the sbus driver.  hopefully, much of the bus space/dma code
can also be re-shared with the sbus driver and the ebus driver but for now
these copies will do.

support for the real UltraSPARC PCI (`SUNW,psycho') is unwritten, though
most of this code is shared with it.

we can probe PCI config space and try to configue devices, but interrupts
don't work yet...
1999-06-04 13:42:14 +00:00

63 lines
2.6 KiB
C

/* $NetBSD: pci_machdep.h,v 1.1 1999/06/04 13:42:15 mrg Exp $ */
/*
* Copyright (c) 1999 Matthew R. Green
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef _MACHINE_PCI_MACHDEP_H_
#define _MACHINE_PCI_MACHDEP_H_
/*
* define some bits used to glue into the common PCI code.
*/
typedef struct sparc_pci_chipset *pci_chipset_tag_t;
typedef u_int pcitag_t;
typedef u_int pci_intr_handle_t;
struct sparc_pci_chipset {
void *cookie; /* psycho_pbm, but sssh! */
int node; /* OFW node */
/* do we need any more here? */
};
void pci_attach_hook __P((struct device *, struct device *,
struct pcibus_attach_args *));
int pci_bus_maxdevs __P((pci_chipset_tag_t, int));
pcitag_t pci_make_tag __P((pci_chipset_tag_t, int, int, int));
pcireg_t pci_conf_read __P((pci_chipset_tag_t, pcitag_t, int));
void pci_conf_write __P((pci_chipset_tag_t, pcitag_t, int,
pcireg_t));
int pci_intr_map __P((pci_chipset_tag_t, pcitag_t, int, int,
pci_intr_handle_t *));
const char *pci_intr_string __P((pci_chipset_tag_t, pci_intr_handle_t));
void *pci_intr_establish __P((pci_chipset_tag_t, pci_intr_handle_t,
int, int (*)(void *), void *));
void pci_intr_disestablish __P((pci_chipset_tag_t, void *));
#endif /* _MACHINE_PCI_MACHDEP_H_ */