thorpej 1b20a04772 * Split pte_cache_mode into pte_l1_s_cache_mode, pte_l2_l_cache_mode, ... and pte_l2_s_cache_mode. The cache-meaningful bits are different for these descriptor types on some processor models. * Add pte_*_cache_mask, corresponding to each above, which has a mask of the cache-meangful bits, and define those for generic and XScale MMU classes. Note, the L2_S_CACHE_MASK_xscale definition requires use of the Extended Small Page L2 descriptor (the "X" bit overlaps with AP bits otherwise).		2002-04-09 22:37:00 +00:00
..
acorn32	* Split pte_cache_mode into pte_l1_s_cache_mode, pte_l2_l_cache_mode,	2002-04-09 22:37:00 +00:00
compile
conf	Rename MEMORY_DISK_SIZE (formerly MINIROOTSIZE) to MEMORY_DISK_ROOT_SIZE,	2002-04-02 05:30:34 +00:00
dev	Rename MEMORY_DISK_SIZE (formerly MINIROOTSIZE) to MEMORY_DISK_ROOT_SIZE,	2002-04-02 05:30:34 +00:00
doc
include	* Change all uses of KERNEL_SPACE_START to KERNEL_BASE.	2002-03-23 02:53:59 +00:00
mainbus	__RCSID -> __KERNEL_RCSID	2002-03-10 15:47:43 +00:00
podulebus	* Rewrite the 32-bit ARM pte.h based on the ARM architecture manual.	2002-04-05 16:58:01 +00:00
stand	Fix detection of ARM 610 processors in the bootloader. NetBSD/acorn32 now	2002-03-24 21:59:48 +00:00
Makefile