308 lines
8.5 KiB
C
308 lines
8.5 KiB
C
/* $NetBSD: ihphy.c,v 1.20 2021/11/05 01:53:30 msaitoh Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center, and by Frank van der Linden.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1997 Manuel Bouyer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Driver for Intel's 82577 (Hanksville) Ethernet 10/100/1000 PHY
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* Data Sheet: http://download.intel.com/design/network/datashts/319439.pdf
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.20 2021/11/05 01:53:30 msaitoh Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/miidevs.h>
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#include <dev/mii/ihphyreg.h>
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static int ihphymatch(device_t, cfdata_t, void *);
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static void ihphyattach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(ihphy, sizeof(struct mii_softc),
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ihphymatch, ihphyattach, mii_phy_detach, mii_phy_activate);
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static int ihphy_service(struct mii_softc *, struct mii_data *, int);
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static void ihphy_status(struct mii_softc *);
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static void ihphy_reset(struct mii_softc *);
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static const struct mii_phy_funcs ihphy_funcs = {
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ihphy_service, ihphy_status, ihphy_reset,
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};
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static const struct mii_phydesc ihphys[] = {
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MII_PHY_DESC(INTEL, I82577),
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MII_PHY_DESC(INTEL, I82579),
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MII_PHY_DESC(INTEL, I217),
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MII_PHY_DESC(INTEL, I82580),
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MII_PHY_DESC(INTEL, I350),
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MII_PHY_END,
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};
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static int
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ihphymatch(device_t parent, cfdata_t match, void *aux)
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{
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struct mii_attach_args *ma = aux;
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if (mii_phy_match(ma, ihphys) != NULL)
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return 10;
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return 0;
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}
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static void
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ihphyattach(device_t parent, device_t self, void *aux)
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{
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struct mii_softc *sc = device_private(self);
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struct mii_attach_args *ma = aux;
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struct mii_data *mii = ma->mii_data;
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const struct mii_phydesc *mpd;
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uint16_t reg;
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mpd = mii_phy_match(ma, ihphys);
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aprint_naive(": Media interface\n");
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aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
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sc->mii_dev = self;
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
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sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
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sc->mii_mpd_rev = MII_REV(ma->mii_id2);
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sc->mii_funcs = &ihphy_funcs;
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sc->mii_pdata = mii;
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sc->mii_flags = ma->mii_flags;
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mii_lock(mii);
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PHY_RESET(sc);
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PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
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sc->mii_capabilities &= ma->mii_capmask;
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if (sc->mii_capabilities & BMSR_EXTSTAT)
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PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities);
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mii_unlock(mii);
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mii_phy_add_media(sc);
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mii_lock(mii);
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/* Link setup (as done by Intel's Linux driver for the 82577). */
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PHY_READ(sc, IHPHY_MII_CFG, ®);
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reg |= IHPHY_CFG_TX_CRS;
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reg |= IHPHY_CFG_DOWN_SHIFT;
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PHY_WRITE(sc, IHPHY_MII_CFG, reg);
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mii_unlock(mii);
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}
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static int
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ihphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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uint16_t reg;
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KASSERT(mii_locked(mii));
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switch (cmd) {
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case MII_POLLSTAT:
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/* If we're not polling our PHY instance, just return. */
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return 0;
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break;
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case MII_MEDIACHG:
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/*
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* If the media indicates a different PHY instance,
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* isolate ourselves.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
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PHY_READ(sc, MII_BMCR, ®);
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PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
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return 0;
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}
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/* If the interface is not up, don't do anything. */
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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/* If media is deselected, disable link (standby). */
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PHY_READ(sc, IHPHY_MII_ECR, ®);
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if (IFM_SUBTYPE(ife->ifm_media) == IFM_NONE)
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reg &= ~IHPHY_ECR_LNK_EN;
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else
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reg |= IHPHY_ECR_LNK_EN;
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PHY_WRITE(sc, IHPHY_MII_ECR, reg);
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/* XXX Adjust MDI/MDIX configuration? Other settings? */
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mii_phy_setmedia(sc);
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break;
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case MII_TICK:
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/* If we're not currently selected, just return. */
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return 0;
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if (mii_phy_tick(sc) == EJUSTRETURN)
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return 0;
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break;
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case MII_DOWN:
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mii_phy_down(sc);
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return 0;
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}
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/* Update the media status. */
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mii_phy_status(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return 0;
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}
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static void
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ihphy_status(struct mii_softc *sc)
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{
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struct mii_data *mii = sc->mii_pdata;
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uint16_t esr, bmcr, gtsr;
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KASSERT(mii_locked(mii));
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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PHY_READ(sc, IHPHY_MII_ESR, &esr);
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if (esr & IHPHY_ESR_LINK)
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mii->mii_media_status |= IFM_ACTIVE;
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PHY_READ(sc, MII_BMCR, &bmcr);
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if (bmcr & (BMCR_ISO | BMCR_PDOWN)) {
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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if (bmcr & BMCR_LOOP)
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mii->mii_media_active |= IFM_LOOP;
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if (bmcr & BMCR_AUTOEN) {
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if ((esr & IHPHY_ESR_ANEG_STAT) == 0) {
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/* Erg, still trying, I guess... */
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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}
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switch (esr & IHPHY_ESR_SPEED) {
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case IHPHY_SPEED_1000:
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mii->mii_media_active |= IFM_1000_T;
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PHY_READ(sc, MII_100T2SR, >sr);
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if (gtsr & GTSR_MS_RES)
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mii->mii_media_active |= IFM_ETH_MASTER;
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break;
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case IHPHY_SPEED_100:
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/* 100BASE-T2 and 100BASE-T4 are not supported. */
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mii->mii_media_active |= IFM_100_TX;
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break;
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case IHPHY_SPEED_10:
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mii->mii_media_active |= IFM_10_T;
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break;
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default:
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mii->mii_media_active |= IFM_NONE;
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mii->mii_media_status = 0;
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return;
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}
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if (esr & IHPHY_ESR_DUPLEX)
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mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
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else
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mii->mii_media_active |= IFM_HDX;
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}
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static void
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ihphy_reset(struct mii_softc *sc)
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{
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int i;
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uint16_t reg;
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KASSERT(mii_locked(sc->mii_pdata));
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PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO);
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/* Wait another 100ms for it to complete. */
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for (i = 0; i < 100; i++) {
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PHY_READ(sc, MII_BMCR, ®);
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if ((reg & BMCR_RESET) == 0)
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break;
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delay(1000);
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}
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if (sc->mii_inst != 0)
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PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
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}
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